SpikeInterface, a unified framework for spike sorting.

The scale of in vivo electrophysiology has expanded in recent years, with simultaneous recordings across thousands of electrodes now becoming routine. These advances have enabled a wide range of discoveries, but they also impose substantial computational demands. Spike sorting, the procedure that extracts spikes from extracellular voltage measurements, remains a major bottleneck: a dataset collected in a few hours can take days to spike sort on a single machine, and the field lacks rigorous validation of the many spike sorting algorithms and preprocessing steps that are in use. Advancing the speed and accuracy of spike sorting is essential to fully realize the potential of large-scale electrophysiology. Here, we present an end-to-end spike sorting pipeline that leverages parallelization to scale to large datasets. The same workflow can run reproducibly on individual workstations, high-performance computing clusters, or cloud environments, with computing resources tailored to each processing step to reduce costs and execution times. In addition, we introduce a benchmarking pipeline, also optimized for parallel processing, that enables systematic comparison of multiple sorting pipelines. Using this framework, we show that Kilosort4, a widely used spike sorting algorithm, outperforms Kilosort2.5 (). We also show that 7× lossy compression, which substantially reduces the cost of data storage, has minimal impact on spike sorting performance. Together, these pipelines address the urgent need for scalable and transparent spike sorting of electrophysiology data, preparing the field for the coming flood of multi-thousand-channel experiments.

BackgroundPrincipal component analysis (PCA) has been widely employed for automatic neuronal spike sorting. Calculating principal components (PCs) is computationally expensive, and requires complex numerical operations and large memory resources. Substantial hardware resources are therefore needed for hardware implementations of PCA. General Hebbian algorithm (GHA) has been proposed for calculating PCs of neuronal spikes in our previous work, which eliminates the needs of computationally expensive covariance analysis and eigenvalue decomposition in conventional PCA algorithms. However, large memory resources are still inherently required for storing a large volume of aligned spikes for training PCs. The large size memory will consume large hardware resources and contribute significant power dissipation, which make GHA difficult to be implemented in portable or implantable multi-channel recording micro-systems.MethodIn this paper, we present a new algorithm for PCA-based spike sorting based on GHA, namely stream-based Hebbian eigenfilter, which eliminates the inherent memory requirements of GHA while keeping the accuracy of spike sorting by utilizing the pseudo-stationarity of neuronal spikes. Because of the reduction of large hardware storage requirements, the proposed algorithm can lead to ultra-low hardware resources and power consumption of hardware implementations, which is critical for the future multi-channel micro-systems. Both clinical and synthetic neural recording data sets were employed for evaluating the accuracy of the stream-based Hebbian eigenfilter. The performance of spike sorting using stream-based eigenfilter and the computational complexity of the eigenfilter were rigorously evaluated and compared with conventional PCA algorithms. Field programmable logic arrays (FPGAs) were employed to implement the proposed algorithm, evaluate the hardware implementations and demonstrate the reduction in both power consumption and hardware memories achieved by the streaming computingResults and discussionResults demonstrate that the stream-based eigenfilter can achieve the same accuracy and is 10 times more computationally efficient when compared with conventional PCA algorithms. Hardware evaluations show that 90.3% logic resources, 95.1% power consumption and 86.8% computing latency can be reduced by the stream-based eigenfilter when compared with PCA hardware. By utilizing the streaming method, 92% memory resources and 67% power consumption can be saved when compared with the direct implementation of GHA.ConclusionStream-based Hebbian eigenfilter presents a novel approach to enable real-time spike sorting with reduced computational complexity and hardware costs. This new design can be further utilized for multi-channel neuro-physiological experiments or chronic implants.

Objective. Spike sorting is a set of techniques used to analyze extracellular neural recordings, attributing individual spikes to individual neurons. This field has gained significant interest in neuroscience due to advances in implantable microelectrode arrays, capable of recording thousands of neurons simultaneously. High-density electrodes, combined with efficient and accurate spike sorting systems, are essential for various applications, including brain machine interfaces (BMIs), experimental neural prosthetics, real-time neurological disorder monitoring, and neuroscience research. However, given the resource constraints of modern applications, relying solely on algorithmic innovation is not enough. Instead, a co-optimization approach that combines hardware and spike sorting algorithms must be taken to develop neural recording systems suitable for resource-constrained environments, such as wearable devices and BMIs. This co-design requires careful consideration when selecting appropriate spike-sorting algorithms that match specific hardware and use cases. Approach. We investigated the recent literature on spike sorting, both in terms of hardware advancements and algorithms innovations. Moreover, we dedicated special attention to identifying suitable algorithm-hardware combinations, and their respective real-world applicabilities. Main results. In this review, we first examined the current progress in algorithms, and described the recent departure from the conventional ‘3-step’ algorithms in favor of more advanced template matching or machine-learning-based techniques. Next, we explored innovative hardware options, including application-specific integrated circuits, field-programmable gate arrays, and in-memory computing devices (IMCs). Additionally, the challenges and future opportunities for spike sorting are discussed. Significance. This comprehensive review systematically summarizes the latest spike sorting techniques and demonstrates how they enable researchers to overcome traditional obstacles and unlock novel applications. Our goal is for this work to serve as a roadmap for future researchers seeking to identify the most appropriate spike sorting implementations for various experimental settings. By doing so, we aim to facilitate the advancement of this exciting field and promote the development of innovative solutions that drive progress in neural engineering research.

Accurate spike sorting is an important issue for neuroscientific and neuroprosthetic applications. The sorting of spikes depends on the features extracted from the neural waveforms, and a better sorting performance usually comes with a higher sampling rate (SR). However for the long duration experiments on free-moving subjects, the miniaturized and wireless neural recording ICs are the current trend, and the compromise on sorting accuracy is usually made by a lower SR for the lower power consumption. In this paper, we implement an on-chip spike sorting processor with integrated interpolation hardware in order to improve the performance in terms of power versus accuracy. According to the fabrication results in 90nm process, if the interpolation is appropriately performed during the spike sorting, the system operated at the SR of 12.5 k samples per second (sps) can outperform the one not having interpolation at 25 ksps on both accuracy and power.

Accurate spike sorting is an important issue for neuroscientific and neuroprosthetic applications. The sorting of spikes depends on the features extracted from the neural waveforms, and a better sorting performance usually comes with a higher sampling rate (SR). However the long duration experiment on free-moving subjects is the current trend. For low power considerations, the compromise on sorting accuracy is made for the miniaturized and wireless neural recording ICs with a lower SR. In this paper, we introduce the cubic spline interpolation to strike the power and accuracy tradeoff on the recording microsystems for the off-site and on-chip spike sorter. According to the simulation results, the recorder operated with the SR of 12.5k sample per second (sps) outperforms the system with 25ksps SR on both accuracy and power if the interpolation is appropriately performed before the spike sorting.

We propose an unsupervised compressed sensing (CS)-based framework to compress, recover, and cluster neural action potentials. This framework can be easily integrated into high-density multi-electrode neural recording VLSI systems. Embedding spectral clustering and group structures in dictionary learning, we extend the proposed framework to unsupervised spike sorting without prior label information. Additionally, we incorporate group sparsity concepts in the dictionary learning to enable the framework for multi-channel neural recordings, as in tetrodes. To further improve spike sorting success rates in the CS framework, we embed template matching in sparse coding to jointly predict clusters of spikes. Our experimental results demonstrate that the proposed CS-based framework can achieve a high compression ratio (8:1 to 20:1), with a high quality reconstruction performance (>8 dB) and a high spike sorting accuracy (>90%).

Spike sorting is a fundamental process for decoding neural activity, involving preprocessing, spike detection, feature extraction, clustering, and validation. However, conventional spike sorting methods are highly fragmented, labor-intensive, and heavily reliant on expert manual curation, limiting their scalability and reproducibility. This challenge has become more pressing with advances in neural recording technology, such as high-density Neuropixels for large-scale neural recording or flexible electrodes for long-term stable recording over months to years. The volume and complexity of these datasets make manual curation infeasible, requiring an automated and scalable solution. Here, we introduce SpikeAgent, a multimodal large language model (LLM)-based AI agent that automates and standardizes the entire spike sorting pipeline. Unlike traditional approaches, SpikeAgent integrates multiple LLM backends, coding functions, and established algorithms, autonomously performing spike sorting with reasoning-based decision-making and real-time interaction with intermediate results. It generates interpretable reports, providing transparent justifications for each sorting decision, enhancing transparency and reliability. We benchmarked SpikeAgent against human experts across various neural recording technology, demonstrating its versatility and ability to achieve curation consistency that are equal to, or even higher than human experts. It also drastically reduces the expertise barrier and accelerates the curation and validation time by orders of magnitude. Moreover, it enables automated interpretability of the neural spiking data, which cannot be achieved by any conventional methods. SpikeAgent presents a paradigm shift in processing signals for neuroscience and brain-computer interfaces, while laying the ground for AI agent-augmented science across various domains.

Objective. The OSort algorithm, a pivotal unsupervised spike sorting method, has been implemented in dedicated hardware devices for real-time spike sorting. However, due to the inherent complexity of neural recording environments, OSort still grapples with numerous transient cluster occurrences during the practical sorting process. This leads to substantial memory usage, heavy computational load, and complex hardware architectures, especially in noisy recordings and multi-channel systems. Approach. This study introduces an optimized OSort algorithm (opt-OSort) which utilizes correlation coefficient (CC), instead of Euclidean distance as classification criterion. The CC method not only bolsters the robustness of spike classification amidst the diverse and ever-changing conditions of physiological and recording noise environments, but also can finish the entire sorting procedure within a fixed number of cluster slots, thus preventing a large number of transient clusters. Moreover, the opt-OSort incorporates two configurable validation loops to efficiently reject cluster outliers and track recording variations caused by electrode drifting in real-time. Main results. The opt-OSort significantly reduces transient cluster occurrences by two orders of magnitude and decreases memory usage by 2.5–80 times in the number of pre-allocated transient clusters compared with other hardware implementations of OSort. The opt-OSort maintains an accuracy comparable to offline OSort and other commonly-used algorithms, with a sorting time of 0.68 µs as measured by the hardware-implemented system in both simulated datasets and experimental data. The opt-OSort’s ability to handle variations in neural activity caused by electrode drifting is also demonstrated. Significance. These results present a rapid, precise, and robust spike sorting solution suitable for integration into low-power, portable, closed-loop neural control systems and brain–computer interfaces.

Unsupervised spike sorting, a vital processing step in real-time brain-implantable microsystems, is faced with the prominent challenge of managing nonstationarity in neural signals. In long-term recordings, spike waveforms gradually change and new source neurons are likely to become activated. Adaptive spike sorters combined with on-implant training units effectively process the nonstationary signals at the cost of high hardware resource utilization. On the other hand, static approaches, while being hardware-friendly, are subjected to decreased processing performance in such recordings where the neural signal characteristics gradually change. To strike a balance between the hardware cost and processing performance, this study proposes a hardware-efficient novelty-aware spike sorting approach that is capable of dealing with both variated spike waveforms and spike waveforms generated from new source neurons. Its improved hardware efficiency compared to adaptive ones and capability of dealing with nonstationary signals make it attractive for implantable applications. The proposed novelty-aware spike sorting especially would be a good fit for brain-computer interfaces where long-term, real-time interaction with the brain is required, and the available on-implant hardware resources are limited. Our unsupervised spike sorting benefits from a novelty detection process to deal with neural signal variations. It tracks the spike features so that in case of detecting an unexpected change (novelty detection) both on and off-implant parameters are updated to preserve the performance in new state. To make the proposed approach agile enough to be suitable for brain implants, the on-implant computations are reduced while the computational burden is realized off-implant. The performance of our proposed approach is evaluated using both synthetic and real datasets. The results demonstrate that, in the mean, it is capable of detecting 94.31% of novel spikes (wave-drifted or emerged spikes) with a classification accuracy (CA) of 96.31%. Moreover, an FPGA prototype of the on-implant circuit is implemented and tested. It is shown that in comparison to the OSORT algorithm, a pivotal spike sorting method, our spike sorting provides a higher CA at significantly lower hardware resources. The proposed circuit is also implemented in a 180-nm standard CMOS process, achieving a power consumption of 1.78[Formula: see text][Formula: see text] per channel and a chip area of 0.07[Formula: see text]mm2 per channel.

Overlapping is one of the serious problems in the spike sorting of multi-channel recordings. Although techniques to resolve this problem have been developed, there still remains much room for improvement. We present in this paper a new overlapping resolution method which is simple and can easily be incorporated in the existing spike sorting systems. The proposed method combines spike sorting algorithms with the linear projections, such that each projection eliminates single-neuronal activity. Simulations show that our method successfully resolves overlapping in real neural data

Neural decoding and its applications to brain computer interfaces (BCI) are essential for understanding the association between neural activity and behavior. A prerequisite for many decoding approaches is spike sorting, the assignment of action potentials (spikes) to individual neurons. Current spike sorting algorithms, however, can be inaccurate and do not properly model uncertainty of spike assignments, therefore discarding information that could potentially improve decoding performance. Recent advances in high-density probes (e.g., Neuropixels) and computational methods now allow for extracting a rich set of spike features from unsorted data; these features can in turn be used to directly decode behavioral correlates. To this end, we propose a spike sorting-free decoding method that directly models the distribution of extracted spike features using a mixture of Gaussians (MoG) encoding the uncertainty of spike assignments, without aiming to solve the spike clustering problem explicitly. We allow the mixing proportion of the MoG to change over time in response to the behavior and develop variational inference methods to fit the resulting model and to perform decoding. We benchmark our method with an extensive suite of recordings from different animals and probe geometries, demonstrating that our proposed decoder can consistently outperform current methods based on thresholding (i.e. multi-unit activity) and spike sorting. Open source code is available at https://github.com/yzhang511/density_decoding.

Recent progress in multi-electrode spike sorting methods

Transmitting large amounts of data sensed by multi-electrode array devices is widely considered to be a challenging problem in designing implantable neural recording systems. Spike sorting is an important step to reducing the data bandwidth before wireless data transmission. The feasibility of spike sorting algorithms in scaled CMOS technologies, which typically operate on low frequency neural spikes, is determined largely by its power consumption, a dominant portion of which is leakage power. Our goal is to explore energy saving architectures for online spike sorting without sacrificing performance. In the face of non-stationary neural data, training is not always a feasible option. We present a low-power architecture for real-time online spike sorting that does not require any training period and has the capability to quickly respond to the changing spike shapes.

Spike sorting is an important processing step in various neuroscientific and clinical studies. Energy-efficient spike-sorting ASICs are necessary to allow real-time processing of multi-channel, wireless neural recordings. Spike-sorting ASICs have to meet stringent power-density constraints and must provide significant data-rate reduction for wireless transmission. Most existing designs either provide only spike detection for multi-channel processing, or they provide detection and feature extraction only for a single channel. In this paper, we demonstrate the design of a spike-sorting DSP chip that can perform detection, alignment, and feature extraction simultaneously for 64 channels. Spike-sorting algorithms chosen based on a complexity-performance analysis were implemented on ASIC using a MATLAB/Simulink-based architecture design framework. Energy-delay tradeoffs of the design were analyzed to identify the optimal degree of interleaving. The chip was implemented with a modular architecture, and can be configured to process 16, 32, 48, or 64 channels. Inactive cores are power-gated when the chip is operated to process a reduced number of channels. The chip, implemented in a 90-nm CMOS process, has a power dissipation of 130 μW (power density of 30 μW/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) when processing all 64 channels and provides a data-rate reduction of 91.25% (11.71 Mb/s to 1.02 Mb/s).

Brain-machine interfaces (BMIs) based on extracellular recordings with microelectrodes provide means of observing the activities of neurons that orchestrate fundamental brain function, and are therefore powerful tools for exploring the function of the brain. Due to physical restrictions and risks for post-surgical complications, wired BMIs are not suitable for long-term studies in freely behaving animals. Wireless BMIs ideally solve these problems, but they call for low-complexity techniques for data compression that ensure maximum utilization of the wireless link and energy resources, as well as minimum heat dissipation in the surrounding tissues. In this paper, we analyze the performances of various system architectures that involve spike detection, spike alignment and spike compression. Performance is analyzed in terms of spike reconstruction and spike sorting performance after wireless transmission of the compressed spike waveforms. Compression is performed with transform coding, using five different compression bases, one of which we pay special attention to. That basis is a fixed basis derived, by singular value decomposition, from a large assembly of experimentally obtained spike waveforms, and therefore represents a generic basis specially suitable for compressing spike waveforms. Our results show that a compression factor of 99.8%, compared to transmitting the raw acquired data, can be achieved using the fixed generic compression basis without compromising performance in spike reconstruction and spike sorting. Besides illustrating the relative performances of various system architectures and compression bases, our findings show that compression of spikes with a fixed generic compression basis derived from spike data provides better performance than compression with downsampling or the Haar basis, given that no optimization procedures are implemented for compression coefficients, and the performance is similar to that obtained when the optimal SVD based basis is used.