Stability-Guaranteed Odd-Order Notch-Width System Design Employing Unity-Bounded Function

Straightforward methods for the design of digital notch filters are presented. The design method is based on setting a zero of the filter at a notch frequency and placing a pole in its neighborhood such that the notch width is narrow enough while keeping the group delay of the filter sufficiently flat. A technique for efficient and well-behaved implementation with fixed-point signal processors is advanced, based on the use of quantization error feedback for roundoff noise reduction. The design approach is illustrated with numerical examples, and an assembly-language program for the family of TMS320 signal processors is provided. >

A new look-ahead (LA) scheme, distributed look-ahead (DLA), is proposed for pipelined implementation of recursive digital filters. It is established that, in the case of many recursive filters, DLA can provide equivalent and stable implementation with reduced multiplication and latch complexities, and higher area-efficiency. It also produces outputs with reduced delays, when compared with some existing LA schemes. Stability regions for the proposed scheme are also well defined. Next, a time-domain approximation method is proposed for direct design of pipelined recursive filters that can achieve superior match with reduced pipelined filter orders.

This paper presents a general lattice structure for the realization of two-dimensional (2-D) recursive digital filters. We employ two basic lattice sections to realize 2-D recursive digital filters with general coefficient support regions like a nonsymmetric half-plane (NSHP) support region. The matrix representations for the basic lattice sections are proposed and used to derive the transfer functions of the realized 2-D digital lattice filters. We use the Roesser state space model to verify the minimal realization of the proposed 2-D recursive digital lattice filter.

In this paper, the design of two-dimensional (2D) notch filter using bandpass filter and fractional delay filter is presented. First, the design of 2D notch filter is decomposed into the designs of 2D parallel-line filter and straight-line filter. Then, parallel-line filter is designed by bandpass filter and straight-line filter is designed by fractional delay filter. Next, the FIR fractional delay filters are used to implement the designed notch filter. Finally, several numerical examples are demonstrated to show the effectiveness of the proposed design method.

A real coefficient IIR notch filter design problem is investigated. The notch filter specification is first transformed into that of an allpass filter. Then, we develop an effective approach to design this desired allpass filter. The realization of the proposed notch filter is equivalent to the realization of an allpass filter. Due to the mirror-image symmetry relation between the numerator and denominator polynomials of the allpass filter, the notch filter can be realized by a computationally efficient lattice structure with very low sensitivity. Moreover, some design and application examples are presented to examine the effectiveness of proposed method.

The task of removing sinusoidal components from observed signals can be accomplished by using a notch filter with a specific attenuation at a particular frequency. In some applications, however, such as acoustic feedback control, the frequency at which attenuation is required is unknown and possibly time-varying, and hence an adaptive notch filter is a more appropriate solution. Transitioning from a fixed notch filter to an adaptive one is by no means trivial and involves the understanding of a range of digital signal processing (DSP) topics from pole-zero placement techniques for designing infinite impulse response filters to optimal and adaptive filtering algorithms. In the signal processing algorithms and implementation graduate course taught at KU Leuven (Belgium), we study the design of an adaptive notch filter, which is based on a constrained biquadratic IIR representation, andwhose parameters are updated using a least-mean-square algorithm. Students also have to implement the algorithm on a 16-bit DSP TMS320C5515. In this presentation, we will discuss the design and implementation challenges of this adaptive notch filter and how it serves as an illustrative example/homework problem where several aspects of DSP are interwoven.

This paper presents a new Recursive Digital Filter (RDF) architecture for discrete time filters. This novel architecture allows decomposition of any discrete time filter into recursive filter of multiple order systematically. This decomposition results in reduction of the hardware when compared to conventional implementation. This hardware complexity reduction is feasible for both fixed and programmable filter coefficients. As an illustrative example, the hardware reduction is demonstrated for a programmable 100 tap symmetric FIR filter. Here, the complexity is quantified in terms of number of multipliers and adders with specific bit widths needed. Matlab numerical results are provided to compare the performance between the conventional and RDF implementation. The resources utilized in both architectures (conventional as well as RDF) are compared for Xilinx Kintex-7 FPGA device.

The authors explore various approaches to pipelining recursive digital filters. A past attempt to pipeline directly from recursive filters was based on clustered look-ahead computation, which leads to a linear increase in hardware with respect to the number of loop pipeline stages. However, the pipelined filters derived using this technique are not guaranteed to be stable. The authors introduce a new look-ahead approach (referred to as scattered look-ahead) to pipeline recursive filters in a way that guarantees stability. They also propose a decomposition technique to implement the nonrecursive portion (generated due to the scattered look-ahead) in a decomposed manner (for cases where the number of loop pipeline states is a power of two) to obtain pipelined realizations of logarithmic implementation complexity with respect to the number of loop pipeline stages (as opposed to linear). Based on the scattered look-ahead technique, they present fully pipelined and fully hardware efficient bidirectional linear systolic arrays and unidirectional ring arrays for implementation of high speed recursive digital filters.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

In this paper a method of generating 3-variable strictly Hurwitz polynomials (SHPs) and very strictly Hurwitz polynomials (VSHPs) by using the properties of positive definite matrices and a resistive matrix is presented. It is shown that the derived 3-variable SHPs and VSHPs could be used to design stable 3-dimensional recursive digital filters satisfying a prescribed magnitude specifications.

In a Global Navigation Satellite System (GNSS) receiver the presence of detection and mitigation units, capable of reducing the impact of disturbing signals, can extremely enhance the position accuracy. However the presence of such units is usually limited to professional receivers that dispose of additional computational power that can be used for interference detection and mitigation. In this paper the two-pole notch filter, the natural extension of the one-pole notch filter analyzed in [1], is proposed as computationally effective solution for interference detection and mitigation. The notch filter structure and the adaptive algorithm employed for tracking the disturbing signal are analyzed, and an interference detection unit, based on the adaptive algorithm convergence, is proposed. The two-pole notch filter coupled with the detection unit is used as elementary block for the design of a multi-pole notch filter that can efficiently mitigate more than one CW interference. Theoretical and simulative analyses show the feasibility and the good performance of the proposed method.

The design of pipelined recursive filter with existing Look-ahead CLA and SLA scheme, A new LA scheme, referred to as DLA, is proposed for pipelined implementation of recursive Digital filters. It is established that in case of many recursive filters, DLA can provide equivalent and stable implementation with reduced pipeline delay and hardware, when compared with existing Look-Ahead schemes, comparison between DLA and SLA scheme.

This paper develops a technique for designing recursive and nonrecursive two-dimensional digital filters by the application of a complex transformation to a one-dimensional low-pass filter. A set of transformed filters is presented. The appropriate combination of these filters produces zero-phase fan filters. The advantage of such an approach is that the resulting fan filters are inherently stable and no optimization is needed. Several examples are presented for both finite impulse response (FIR) and infinite impulse response (IIR) fan filters and quadrant fan filters. The paper also includes implementation techniques using the properties of finite area arrays which reduce both computational and storage requirements compared with conventional implementations.

In a companion paper [1], an efficient procedure was given for the design of recursive polyphase filters whose subfilters are distinct allpass filters, and the properties of these filters were considered in detail. Both nonlinear-phase and approximately linear-phase filters were discussed. In this paper, we show how these filters can be used for constructing efficient single-stage and multistage decimators and interpolators. The resulting designs suffer from the inherent limitation that aliasing cannot be prevented into the transition band in the decimation case. It is shown how this limitation can be overcome by using an additional filter stage at the output of the decimator. Working at the lowest sampling rate, this filter increases only slightly the overall computation rate. The optimization of this filter stage, together with the actual decimation stages, is discussed in detail in both the nonlinear-phase and approximately linear-phase case. Several examples illustrate the efficiency of the new overall designs compared to other known decimators and interpolators.

We present a new approach to teaching filter design. In the classroom, students see graphical design methods emphasizing relationships between poles/zeros and frequency response (e.g., Chebyshev pole locations, low-pass to band-pass mapping, and bilinear transformation). In lab, each student develops a MATLAB <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">®</sup> program, capable of designing analog or digital, low-pass/high-pass/band-pass/notch, and Butterworth or Chebyshev filters. Using a ¿bottom-up¿ approach, students write individual functions as topics are covered in class, thereby creating ¿student toolboxes¿ that make no use of inherent MATLAB filter design functions. Students then craft a ¿main program¿ to implement filter design logic by calling their (tested) lower level functions. Finally, students use their programs to filter individually corrupted music files. Students design a digital filter to remove that band-limited noise, while preserving music fidelity, in an iterative process, exploring tradeoffs between maximum passband attenuation, minimum stopband attenuation, filter type, passband and stopband cutoffs, filter order and fidelity. Using graphical techniques, along with bottom-up program development, provides significant insight into fundamental tradeoffs in the filter design process not attainable through design by table lookup or inherent MATLAB function calls. Furthermore, feedback suggests the final design project is very gratifying and unites theory and real world design.

A technique for designing a sparse FIR notch filter is presented. First, a sparse property of the ideal notch filter, whose notch frequency has the form (q/2p)/spl pi/ is derived, where p and q are coprime integers. Then, the Lagrange multiplier method is used to obtain the coefficients of the sparse notch filter which is optimal in the least-squares sense. Next, a design example is presented to demonstrate the effectiveness of this approach. Finally, a sparse notch filter is applied to eliminate the 60 Hz powerline interference superimposed on the electrocardiogram signals.