Stochastic Computing for Sub-0.2V Applications—Technology Evaluation and Design Optimization

As we approach the limits of traditional Moore’s-Law scaling, alternative computing techniques that consume energy more efficiently become attractive. Stochastic computing (SC), as a re-emerging computing technique, is a low-cost and error-tolerant alternative to conventional binary circuits in several important applications such as image processing and communications. SC allows a natural accuracy-energy tradeoff that has been exploited in the past. This article presents an accuracy-energy tradeoff technique for SC circuits that reduces their energy consumption with virtually no accuracy loss. To this end, we employ voltage or frequency scaling, which normally reduce energy consumption at the cost of timing errors. Then we show that due to their inherent error tolerance, SC circuits operate satisfactorily without significant accuracy loss even with aggressive scaling. This significantly improves their energy efficiency. In contrast, conventional binary circuits quickly fail as the supply voltage decreases. To find the most energy-efficient operating point of an SC circuit, we propose an error estimation method that allows us to quickly explore the circuit’s design space. The error estimation method is based on Markov chain and least-squares regression. Furthermore, we investigate opportunities to optimize SC circuits under such aggressive scaling. We find that logical and physical design techniques can be combined to significantly expand the already-powerful accuracy-energy tradeoff possibilities of SC. In particular, we demonstrate that careful adjustment of path delays can lead to significant error reduction under voltage and frequency scaling. We perform buffer insertion and route detouring to achieve more balanced path delays. These techniques differ from conventional path-balancing techniques whose goal is to minimize power consumption by resizing the non-critical paths. The goal of our path-balancing approach is to increase error cancellation chances in voltage-/frequency-scaled SC circuits. Our circuit optimization comprehends the tradeoff between power overheads due to inserted buffers and wires versus the energy reduction from supply voltage downscaling enabled by more balanced path delays. Simulation results show that our optimized SC circuits can tolerate aggressive voltage scaling with no significant signal-to-noise ratio (SNR) degradation. In one example, a 40% supply voltage reduction (1V to 0.6V) on the SC circuit leads to 66% energy saving (20.7pJ to 6.9pJ) and makes it more efficient than its conventional binary counterpart. In the same example, a 100% frequency boosting (400ps to 200ps) of the optimized circuits leads to no significant SNR degradation. We also show that process variation and temperature variation have limited impact on optimized SC circuits. The error change is less than 5% when temperature changes by 100°C or process condition changes from worst case to best case.

As the energy and hardware investments necessary for conventional high-precision digital computing continue to explode in the era of artificial intelligence (AI), a change in paradigm that can trade precision for energy and resource efficiency is being sought for many computing applications. Stochastic computing (SC) is an attractive alternative since, unlike digital computers, which require many logic gates and a high transistor volume to perform basic arithmetic operations such as addition, subtraction, multiplication, sorting, etc., SC can implement the same using simple logic gates. While it is possible to accelerate SC using traditional silicon complementary metal-oxide-semiconductor (CMOS) technology, the need for extensive hardware investment to generate stochastic bits (s-bits), the fundamental computing primitive for SC, makes it less attractive. Memristor and spin-based devices offer natural randomness but depend on hybrid designs involving CMOS peripherals for accelerating SC, which increases area and energy burden. Here, the limitations of existing and emerging technologies are overcome, and a standalone SC architecture embedded in memory and based on 2Dmemtransistors is experimentally demonstrated. The monolithic and non-von-Neumann SC architecture occupies a small hardware footprint and consumes a miniscule amount of energy (<1nJ) for both s-bit generation and arithmetic operations, highlighting the benefits of SC.

Transient bit flips may cause unexpected behaviors in digital arithmetic circuits, and thus computation errors. It is generally believed that stochastic computing (SC) can tolerate bit flips due to its unique number representation format. In SC, a value is encoded by a random bit stream using the probability of 1s in the bit stream. Therefore, one bit flip changes the probability by a small number given a long enough bit stream, and the computation results might not change much. This is verified in previous works mostly through empirical studies. However, we found that bit flips actually change the probability of a stochastic bit stream by a predictable value. This is formulated by considering the bit flips as Bernoulli events. The distorted probability of the bit stream considering bit flips is derived and the SC bit flip models for various stochastic circuits are proposed. The error recovery based on the formulation is also proposed. The SC bit flip model and error recovery scheme are verified on basic SC elements such as the SC multipliers and an FSM-based stochastic circuit. They are then applied to a complex SC system computing a neural network. The results show that the accuracy of MNIST digit recognition can be recovered even with a high bit flip rate of 10%.

Always-on speech interfaces are prevailing in human-machine interaction, especially on wearable devices, Internet of Things, etc., which benefits from the recent breakthroughs in deep learning. For battery-powered devices, ultra-low power and real-time processing are critical. However, the massive memory access and computation of deep neural networks (DNNs) lead to long latency and huge energy consumption, which hinder their further integration in battery-powered devices. Extremely low-bit quantization shows the potential to enhance energy efficiency and speed by orders of magnitudes, but it suffers from the degradation of recognition accuracy. In this paper, we propose a binarized convolutional neural network (BCNN) based speech recognition processor, integrated with on-chip self-learning mechanism to compensate the accuracy loss caused by low-precision. We optimize the BCNN architecture by eliminating the computation redundancy, compressing the weights and tailoring approximate circuits. Fabricated in 28 nm CMOS, this processor supports real time speech recognition with power consumption of $141~\mu \text{W}$ and energy efficiency of 2.46 pJ/Neuron. Compared with state-of-the-art speech recognition implementations, this processor achieves $2.5\times $ reduction on energy consumption per neuron, and $8.0\times $ energy reduction per speech frame.

Stochastic Computing (SC) presents a low-cost and low-power alternative to conventional binary computing. In SC, continuous values are represented by stochastically generated bit streams. By performing simple hardware-friendly bit-wise operations on these streams, complex calculations can be realized very efficiently. However, the inherent randomness and approximation used in SC can result in undesirable computational errors. As Convolutional Neural Networks (CNNs) are inherently error-tolerant, SC could be embedded in them to gain higher speed and lower power without significant accuracy loss. In this paper, we propose using SC techniques to approximate multiplication operations on fixed-point weights and biases during training of CNNs. By employing such techniques, we demonstrate near state-of-the-art learning performance for the MNIST and CIFAR-10 datasets, while achieving significant resource and speed improvements when implementing the deep networks on a Field Programmable Gate Array (FPGA). For MNIST, we demonstrate that SC compared to conventional computing, will result in almost 3 times increase in learning speed with only 1.37% degradation in validation accuracy. Similarly, for CIFAR-10, training is accelerated 3.5 times with a degradation of 3.39%. We also show that our FPGA implementations of CNNs adopting stochastic multipliers consume over 17 times less power than their GPU counterparts.

Max & min architectures for stochastic computing (SC) are introduced. Their key characteristic is the utilization of an accumulator to store the signed difference between the two inputs, without randomizing sources. This property results in fast-converging and highly accurate computations using short sequence lengths, improving on the latency–accuracy tradeoff of existing SC max–min architectures. The operation of the proposed architectures is modeled using Markov Chains, resulting in in-depth analysis, the derivation of their statistical properties, and guidelines for selecting the register’s size to achieve overall design optimization. The computational accuracy and the hardware requirements of the proposed architectures are compared to those of existing ones in the SC literature, using MATLAB and Synopsys Tools. The efficacy of the proposed architectures is demonstrated by realizing a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3 \times 3$ </tex-math></inline-formula> median filter and using it in an image processing application.

Neural networks have been used in a variety of fields including speech process, image recognition and video classification. In this work, based on 16/14nm FinFET technology, the feasibility of the neuron circuit using stochastic computing is evaluated. Considering the practical technology issues, the impact of random variabilities is carefully examined under ultra-low voltage. Using handwritten digital MNIST database, a reliable validation accuracy in neural network based on stochastic computing neuron circuits can be obtained with an ultra-low V dd . The design optimization procedure of neuron circuits is also proposed, which can decrease the energy consumption without the penalty of accuracy.

Deep neural networks (DNNs) have been revolutionizing machine learning research and various applications by achieving better accuracy than human perception. However, a large amount of computational resources are needed due to their complex topologies, restricting the usage of DNNs in embedded systems and portable devices with limited areas and power budgets. This chapter considers stochastic computing (SC) as an alternative to binarized computing. SC uses a random bit sequence where the signal value is computed by counting the number of ones in the bit sequence. This allows the implementation of major arithmetic units like multiplication and addition by a simple logic. Consequently, SC can implement DNNs with essentially low hardware overhead and also offers good scalability. First, the chapter presents a detailed study of processing elements used in neural networks. Then, combining several building blocks, such as stochastic approximation of activation functions in SC, saturation arithmetic, and scaling, a new scheme is proposed for DNN inference and training in SC. At last, the chapter shows that SC-compatible DNNs can be effectively deployed on low-cost hardware. Deep neural network, optimization, accelerator, custom computing, stochastic computing

The article is devoted to consideration of issues related to assessing the energy efficiency of a coal mining enterprise. Coal mining enterprises are characterized by a large volume of energy intensive ore mining operations. The article presents possible ways of energy saving in the mining industry. During the research, a system of energy efficiency indicators for coal mining enterprises is presented. Materials and methods. The article proposes a system of indicators for coal enterprises based on existing methods and approaches to assessing energy efficiency. Energy consumption dependence graphs, benchmarking, and pinch analysis are considered as a starting point. Results. The study presents a system of energy efficiency indicators for coal mining enterprises. The proposed system has several levels. The existing methods and approaches for assessing this important indicator for industrial enterprises in the coal industry as a whole are considered. The author’s approach to formalizing the system of energy efficiency indicators for coal mining enterprises is proposed. The significance of energy audit as a key assessment measure is indicated and its stages are highlighted. The influencing factors determining energy costs and their reduction for a coal mining enterprise are systematized, barriers preventing the practical implementation of energy saving measures are analyzed. Discussion. The proposed metrics system provides a comprehensive framework for assessing the energy efficiency of coal mining enterprises at various levels. Its flexibility allows it to be applied to the analysis of individual equipment units, production processes, and overall enterprise performance. Its multi-level approach provides a detailed understanding of energy consumption, which allows for informed decision-making to optimize operations. At the equipment level, the metrics system evaluates the energy consumption and efficiency of individual machines and devices. At the production process level, the metrics system analyzes the energy consumption and efficiency of various stages of coal mining. At the enterprise level, the metrics system provides a comprehensive assessment of overall energy efficiency. It takes into account energy consumption at all levels and allows enterprises to compare their performance with each other and with industry benchmarks. Conclusion. Energy efficiency assessment of a coal mining enterprise allows to understand how and where energy is used, where its use can be improved, and how to reduce its costs. To conduct an energy efficiency assessment, the article proposes a system of indicators, highlighting the features of an energy audit. The main advantage of the proposed system of indicators is that it covers a wide range of energy consumption indicators, which are carefully selected and located at different levels of detail. In general, a balanced approach to the level of detail and generalization in the system of indicators provides flexibility in adapting indicators to specific research questions and helps to interpret the results in the context of structural differences between energy systems. Resume. Overall, the proposed metrics system offers a comprehensive approach to analyzing the energy efficiency of coal mining enterprises, covering all levels of operations. Its use allows enterprises to improve energy efficiency, reduce operating costs, and contribute to a more sustainable coal mining industry. Suggestions for practical applications and directions for future research. The use and implementation of the developed system at a coal mining company allows it to improve energy efficiency, reduce operating costs and contribute to a more sustainable coal mining industry.

As the Internet of Things (IoT) revolutionizes intelligent environments, energy efficiency remains a critical challenge. Traditional IoT-based energy management systems rely on predefined rule-based automation, which lacks adaptability to dynamic environmental conditions. This study proposes an Agentic AIoT system that integrates AI Agents, Large Language Models (LLMs), and Digital Twin technology to enhance IoT decision-making and optimize energy consumption in smart homes. Unlike conventional IoT frameworks, our system dynamically analyzes contextual factors—including real-time environmental conditions, user behaviors, and external data sources (e.g., weather forecasts and occupancy schedules)—to generate optimal energy-saving decisions autonomously. The proposed system consists of three key components: (1) Information Modules, which aggregate multi-source data beyond traditional IoT sensor inputs and construct a Digital Twin model for real-time environment simulation; (2) AI Agents & LLMs, which process contextual data and generate adaptive energy-saving strategies through intelligent reasoning; and (3) Automated Decision Execution, which seamlessly integrates optimized actions into IoT operations. By incorporating Digital Twin technology, the system can simulate various energy consumption scenarios, predict future power demands, and refine decision-making through AI-driven iterative learning. Experimental results demonstrate that our AIoT system achieves a 47.77% reduction in energy consumption compared to non-IoT environments while enhancing automation, adaptability, and user-centric control. Unlike conventional rule-based IoT solutions, integrating Digital Twin with LLM-powered AI Agents enables real-time context-aware decision-making and predictive energy optimization. This study contributes to intelligent IoT applications, Digital Twin-driven energy management, and AI-enhanced automation. Future research will focus on refining AI-driven autonomous decision-making, improving Digital Twin’s predictive accuracy, and further quantifying the impact of LLM-powered AIoT systems on energy efficiency. Our findings highlight the trans-formative potential of LLM-integrated AIoT with Digital Twin technology in revolutionizing energy management for intelligent environments while ensuring seamless interoperability with existing IoT infrastructures.

Due to the rapid growth of Internet of Things (IoT) devices such as smart appliances, health monitoring and surveillance systems, etc., there is a particular focus on memory design. The IoT connects devices to the internet to acquire information about the usage of sensors and embedded structures. Therefore, the ultimate aim is to reduce the average system energy and increase the battery life for IoT devices. IoT devices need to be portable, should consume less power and be light weight. These features provide the advantage of limiting the primary energy source to smaller batteries. Nowadays, ultra-low-power (ULP) systems on chip (SoCs) have extensively become chip makers’ choice. These SOCs require a low leakage memory architecture to operate at lower voltages with technology scaled devices. However, Static Random Access Memory (SRAM) design is challenging in scaled technology due to process and temperature variations that pose huge challenges in designing robust SoCs. Consequently, this chapter mainly focuses on the strategies to reduce the operating voltage of SRAM designed using FinFET technology and to enhance the battery life for ULP IoT devices.

The global energy crisis has been one of the significant challenges for decades, threatening the global economy, and the health of our environment. The government's efforts to enhance the welfare and lifestyle of citizens have been partially undermined by a significant rise in energy intensity, resulting in increased energy consumption. Over the years, researchers have utilized historical energy consumption data to enhance energy efficiency through various technologies. Innovative smart technologies drive energy efficiency, reducing energy usage throughout all areas of the energy industry, from production and supply to consumption. This creates a balance in all sectors and indicates a decrease in energy demand in all areas of building infrastructure. Green buildings that utilize Internet of Things (IoT) technology employ sensors and software to collect data, optimizing, and enhancing building performance. This includes reducing energy and electricity consumption, improving air quality, and optimizing lighting throughout the day. These buildings can contribute to reaching zero‐energy building targets. It becomes challenging to manage green buildings without using centralized control. Therefore, managing and integrating these buildings with intelligent technologies is vital in achieving environmentally friendly management. This study offers a broad overview of the green building concept and explores the use of the green IoT in enhancing services and conserving energy within green buildings. The article aims to deliver an extensive review of green buildings and their advantages, analyze the technology behind the IoT and its integration with solar panels to lower energy consumption, and ultimately identify the challenges present in this area of research.

Research on the building energy efficiency design strategy of Chinese universities based on green performance analysis

Both binarized and stochastic computing-based neural networks exploit bit-wise operations to replace expensive full-precision multiplications with simple XNOR gates and thus, offer low-cost hardware implementation. In stochastic computing, arithmetic computations are performed on sequences of random bits which can approximate any real values. Stochastic computing-based neural networks benefit from approximate computing and promote fault-tolerant architectures against soft errors in noisy environments. On the other hand, in binarized neural networks, real values are deterministically binarized using the sign function. As a result, any bit-flip in the binarized values dramatically changes the outcome of arithmetic computations and makes binarized neural networks more vulnerable against soft errors. In this paper, we compare these two neural networks against each other in terms of fault-tolerance and hardware complexity (i.e., area and energy efficiency).

With the advent of Internet of Thing (IoT) smart living is no longer a day dream. It advantages people by saving time, cost as well as energy. Energy is the most important facet of IoT. The feature of remote monitoring and controlling applications in real time plays a huge role in saving energy. Energy efficient applications are the assets of IoT. It has become ubiquitous due to its energy efficiency. Its omnipresence results in billions of IoT devices which are able to connect with each other and share information to and fro. However, communication among these devices needs some energy for sensing, transmitting and storing information. IoT applications which are implemented on larger level consumes massive amount of energy which is scarce in nature. Thus, its own energy efficiency is an area of concern and a vital area of research. This paper addresses those common aspects of IoT which usually led to high energy consumption. A survey is done to represent the previous works done in this direction. Also, solutions are suggested to reduce energy consumption in IoT based applications.