Surface code for low-density qubit array

One of the most promising routes towards fault-tolerant quantum computation utilizes topological quantum error correcting codes, such as the $\mathbb{Z}_2$ surface code. Logical qubits can be encoded in a variety of ways in the surface code, based on either boundary defects, holes, or bulk twist defects. However proposed fault-tolerant implementations of the Clifford group in these schemes are limited and often require unnecessary overhead. For example, the Clifford phase gate in certain planar and hole encodings has been proposed to be implemented using costly state injection and distillation protocols. In this paper, we show that within any encoding scheme for the logical qubits, we can fault-tolerantly implement the full Clifford group by using joint measurements involving a single appropriately encoded logical ancilla. This allows us to provide new low overhead implementations of the full Clifford group in surface and color codes. It also provides the first proposed implementations of the full Clifford group in hyperbolic codes. We further use our methods to propose state-of-the art encoding schemes for small numbers of logical qubits; for example, for code distances $d = 3,5,7$, we propose a scheme using $60, 160, 308$ (respectively) physical data qubits, which allow for the full logical Clifford group to be implemented on two logical qubits. To our knowledge, this is the optimal proposal to date, and thus may be useful for demonstration of fault-tolerant logical gates in small near-term quantum computers.

Surface code is an error-correcting method that can be applied to the implementation of a usable quantum computer. At present, a promising candidate for a usable quantum computer is based on superconductor-specifically transmon. Because errors in transmon-based quantum computers appear biasedly as Z type errors, tailored surface and XZZX codes have been developed to deal with the type errors. Even though these surface codes have been suggested for lattice structures, since transmons-based quantum computers, developed by IBM, have a heavy-hexagon structure, it is natural to ask how tailored surface code and XZZX code can be implemented on the heavy-hexagon structure. In this study, we provide a method for implementing tailored surface code and XZZX code on a heavy-hexagon structure. Even when there is no bias, we obtain $$ 0.231 \%$$ as the threshold of the tailored surface code, which is much better than $$ 0.21 \%$$ and $$ 0.209 \%$$ as the thresholds of the surface code and XZZX code, respectively. Furthermore, we can see that even though a decoder, which is not the best of the syndromes, is used, the thresholds of the tailored surface code and XZZX code increase as the bias of the Z error increases. Finally, we show that in the case of infinite bias, the threshold of the surface code is $$ 0.264\%$$ , but the thresholds of the tailored surface code and XZZX code are $$ 0.296 \% $$ and $$ 0.328 \%$$ respectively.

Demonstrating small error rates by integrating quantum error correction (QEC) into an architecture of quantum computing is the next milestone towards scalable fault-tolerant quantum computing (FTQC). Encoding logical qubits with superconducting qubits and surface codes is considered a promising candidate for FTQC architectures. In this paper, we propose an FTQC architecture, which we call Q3DE, that enhances the tolerance to multi-bit burst errors (MBBEs) by cosmic rays with moderate changes and overhead. There are three core components in Q3DE: in-situ anomaly DEtection, dynamic code DEformation, and optimized error DEcoding. In this architecture, MBBEs are detected only from syndrome values for error correction. The effect of MBBEs is immediately mitigated by dynamically increasing the encoding level of logical qubits and re-estimating probable recovery operation with the rollback of the decoding process. We investigate the performance and overhead of the Q3DE architecture with quantum-error simulators and demonstrate that Q3DE effectively reduces the period of MBBEs by 1000 times and halves the size of their region. Therefore, Q3DE significantly relaxes the requirement of qubit density and qubit chip size to realize FTQC. Our scheme is versatile for mitigating MBBEs, i.e., temporal variations of error properties, on a wide range of physical devices and FTQC architectures since it relies only on the standard features of topological stabilizer codes.

Quantum error correction technology is an important method to eliminate errors during the operation of quantum computers. In order to solve the problem of influence of errors on physical qubits, we propose an approximate error correction scheme that performs dimension mapping operations on surface codes. This error correction scheme utilizes the topological properties of error correction codes to map the surface code dimension to three dimensions. Compared to previous error correction schemes, the present three-dimensional surface code exhibits good scalability due to its higher redundancy and more efficient error correction capabilities. By reducing the number of ancilla qubits required for error correction, this approach achieves savings in measurement space and reduces resource consumption costs. In order to improve the decoding efficiency and solve the problem of the correlation between the surface code stabilizer and the 3D space after dimension mapping, we employ a reinforcement learning (RL) decoder based on deep Q-learning, which enables faster identification of the optimal syndrome and achieves better thresholds through conditional optimization. Compared to the minimum weight perfect matching decoding, the threshold of the RL trained model reaches 0.78%, which is 56% higher and enables large-scale fault-tolerant quantum computation.

Scalable solutions are essential to achieving the long-term goal of building a fault-tolerant quantum computer and energy-power consumption are fundamental limiting factors for this target. Among the available types of silicon qubits, this work focuses on Flip-Flop (FF) qubits. Energy consumption and power requirements are estimated for a square array of qubits that hosts the logical qubit. The logical qubit is implemented using the rotated Surface Code (SC) for Quantum Error Correction (QEC). By using a universal set of quantum gates, the energy usage, time and power requirements for a SC cycle are estimated based on noise level, code distance and control levels. These estimates are used to provide insights into the main scaling-up challenges for quantum computer development. This is achieved by extending a thermal model that includes energy contributions from both the cryogenic components (such as the qubit array, the cryogenic control electronics, and the cryostat) and the room temperature (RT) section (RT electronics and heat dissipation systems). The maximum numbers of physical and logical qubits are provided, as well as power consumption across the different temperature sections.

While Clifford operations are relatively easy to implement in fault-tolerant quantum computers, continuous rotation gates remain a significant bottleneck in typical quantum algorithms. In this work, we ask the question: “What is the most efficient approach for implementing continuous rotations in a surface code architecture?” Several techniques have been developed to reduce the T-count or T-depth of rotations, such as Hamming weight phasing and catalyst towers. However, these methods often require additional a number of ancilla qubits, and thus the ultimate cost function one needs to optimise against should rather be the total runtime or the total space required for performing a rotation. We explicitly construct surface code layouts for catalyst towers in two practical application examples in the context of option pricing: (a) implementing a phase oracle circuit, which is a ubiquitous subroutine in many quantum algorithms, and (b) state preparation using a variational quantum circuit. Our analysis shows that, at small and medium code distances, catalyst towers not only reduce the runtime but can also decrease the total spacetime volume of rotations. However, at large code distances, conventional Clifford+T synthesis may prove more efficient. Additionally, we note that our conclusions are sensitive to specific application scenarios and the choices of various parameters. Nevertheless, catalyst towers may be particularly advantageous for early fault-tolerant quantum applications, where low and medium code distances are assumed and a spacetime tradeoff is needed to reduce the runtime of individual circuit runs, such as in scenarios involving high circuit repetition counts.

Fault-tolerant quantum computers that can solve hard problems rely on quantum error correction1. One of the most promising error correction codes is the surface code2, which requires universal gate fidelities exceeding an error correction threshold of 99 per cent3. Among the many qubit platforms, only superconducting circuits4, trapped ions5 and nitrogen-vacancy centres in diamond6 have delivered this requirement. Electron spin qubits in silicon7-15 are particularly promising for a large-scale quantum computer owing to their nanofabrication capability, but the two-qubit gate fidelity has been limited to 98 per cent owing to the slow operation16. Here we demonstrate a two-qubit gate fidelity of 99.5 per cent, along with single-qubit gate fidelities of 99.8 per cent, in silicon spin qubits by fast electrical control using a micromagnet-induced gradient field and a tunable two-qubit coupling. We identify the qubit rotation speed and coupling strength where we robustly achieve high-fidelity gates. We realize Deutsch-Jozsa and Grover search algorithms with high success rates using our universal gate set. Our results demonstrate universal gate fidelity beyond the fault-tolerance threshold and may enable scalable silicon quantum computers.

Fault-tolerant quantum computation critically depends on the ability to detect and correct physical qubit errors faster than they accumulate. The surface code (SC) has emerged as the most experimentally promising quantum error correction (QEC) framework due to its high threshold and local stabilizer structure, yet its practical performance is bottlenecked by decoder efficiency. Traditional decoding approaches such as minimum-weight perfect matching (MWPM) achieve near-optimal accuracy under independent noise but struggle with correlated errors, circuit-level noise, and real-time latency constraints. This paper investigates how neural network (NN)-based decoders reduce logical error rates in SC quantum systems by learning complex syndrome-to-correction mappings from data. We propose a hybrid convolutional-recurrent neural architecture that processes stabilizer measurement syndromes across both spatial and temporal dimensions, enabling the decoder to capture correlated error patterns inherent in realistic hardware. Systematic simulations under depolarizing, biased, and circuit-level noise models demonstrate that the proposed neural decoder achieves a logical error rate reduction of up to 41.3% compared to MWPM at a physical error rate of p = 0.008, while maintaining sub-millisecond decoding latency compatible with superconducting qubit cycle times. These results establish that data-driven neural decoders represent a scalable and hardware-compatible pathway toward achieving the logical error rates required for practical fault-tolerant quantum computing.

A fault-tolerant one-way quantum computer

The Kitaev toric code is widely considered one of the leading candidates for error correction in fault-tolerant quantum computation. However, direct methods to increase its logical dimensions, such as lattice surgery or introducing punctures, often incur prohibitive overheads. In this work, we introduce a ring-theoretic approach for efficiently analyzing topological CSS codes in two dimensions, enabling the exploration of generalized toric codes with larger logical dimensions on twisted tori. Using Gröbner bases, we simplify stabilizer syndromes to efficiently identify anyon excitations and their geometric periodicities, even under twisted periodic boundary conditions. Since the properties of the codes are determined by the anyons, this approach allows us to directly compute the logical dimensions without constructing large parity-check matrices. Our approach provides a unified method for finding new quantum error-correcting codes and exhibiting their underlying topological orders via the Laurent polynomial ring. This framework naturally applies to bivariate bicycle codes. For example, we construct optimal weight-6 generalized toric codes on twisted tori with parameters [[n,k,d]] for n≤400, yielding novel codes such as [[120,8,12]], [[186,10,14]], [[210,10,16]], [[248,10,18]], [[254,14,16]], [[294,10,20]], [[310,10,≤22]], and [[340,16,18]]. Moreover, we present a new realization of the [[360,12,≤24]] quantum code using the (3,3)-bivariate bicycle code on a twisted torus defined by the basis vectors (0,30) and (6,6), improving stabilizer locality relative to the previous construction. These results highlight the power of the topological order perspective in advancing the design and theoretical understanding of quantum low-density parity-check (LDPC) codes.

Developing quantum systems which are robust against noise are of prime importance to the realisation of quantum technologies. Without fault tolerance, we will never be able to preserve delicate quantum states for macroscopic time scales, a necessary requirement in the construction of scalable quantum computer. Topologically ordered models offer very beautiful mechanisms for preserving quantum states. In such models, quantum information is encoded globally over a degenerate topological Hilbert space which offers a natural robustness against local environmental noise. Remarkably, topological order is present in certain realistic condensed-matter systems. This provides a platform for accessing topological order in a laboratory. Moreover, considering condensed-matter systems enables us to combine topological features with other physical effects to enhance their behaviour. In this Thesis we study the physics of topologically ordered lattice models with defects. We seek practical applications of lattice defects for the realisation of a fault-tolerant quantum computer. The first result we present shows that anyonic data of point-like lattice defects, called twists, can be found by measuring the entanglement of the ground state of the host system. The data we learn relates to the capacity of a twist defect to perform quantum computational tasks. The second result in this Thesis concerns the dynamics of the qudit toric code model with line-like defects coupled to a thermal bath. We show we can entropically inspire fragile glassy dynamics in the system. Such dynamics qualitatively improve the coherence times of quantum information encoded in the ground state of the lattice. A novel way of achieving fault-tolerant quantum computation is by producing and manipulating twist defects of topologically ordered systems. In many ways, this paradigm of topological quantum computation is analogous to quantum computation using anyons. The first area of study in this Thesis extends the analogy between anyons and twists. Specifically, we show that the anyonic data of twists in Kitaev’s toric code model can be extracted

We introduce the Trapped-Ion Surface Code Compiler (TISCC), a software tool that generates circuits for a universal set of surface code patch operations in terms of a native trapped-ion gate set. To accomplish this, TISCC manages an internal representation of a trapped-ion system where a repeating pattern of trapping zones and junctions is arranged in an arbitrarily large rectangular grid. Surface code operations are compiled by instantiating surface code patches on the grid and using methods to generate transversal operations over data qubits, rounds of error correction over stabilizer plaquettes, and/or lattice surgery operations between neighboring patches. Beyond the implementation of a basic surface code instruction set, TISCC contains corner movement functionality and a patch translation that is implemented using ion movement alone. Except in the latter case, all TISCC functionality is extensible to alternative grid-like hardware architectures. TISCC output has been verified using the Oak Ridge Quasi-Clifford Simulator (ORQCS).

<sec>Spin qubits in silicon-based semiconductor quantum dots have become one of the prominent candidates for realizing fault-tolerant quantum computing due to their long coherence time, good controllability, and compatibility with modern advanced integrated circuit manufacturing processes. In recent years, due to the remarkable advances in silicon-based materials, the structure of quantum dot and its fabrication process, and qubit manipulation technology, the great progress of high-fidelity state preparation and readout, single- and two-qubit gates of spin qubits for silicon based semiconductor quantum computation has been achieved. The control fidelities for single- and two-qubit gates all exceed 99%—fault tolerance threshold required by the surface code known for its exceptionally high tolerance to errors. In this paper, we briefly introduce the basic concepts of silicon-based semiconductor quantum dots, discuss the state-of-art technologies used to improve the fidelities of single- and two-qubit gates, and finally highlight the research directions that should be focused on.</sec><sec>This paper is organized as follows. Firstly, we introduce three major types of quantum dot (QD) devices fabricated on different silicon-based substrates, including Si/SiGe heterojunction and Si/SiO<sub>2</sub>. The spin degree of electron or nucleus hosted in QD can be encoded into spin qubits. Electron spin qubits can be thermally initialized to ground state by using an electron reservoirs, and can be read out by spin-charge conversion mechanism: energy-selective readout (Elzerman readout) with reservoirs or Pauli spin blockade (PSB) without reservoirs. Additionally, high fidelity single-shot readout has been demonstrated by using radio-frequency gate reflectometry combined with the PSB, which has unique advantages in large-scale qubit array. To coherently control the spin qubits, electron dipole resonance (ESR) or electron dipole spin resonance (EDSR) for electron and nuclear magnetic resonance (NMR) for nucleus are introduced. With the help of isotope purification greatly improving the dephasing time of qubit and fast single-qubit manipulation based on EDSR, fidelity above 99.9% can be reached. For the two-qubit gates based on exchange interaction between electron spins, the strength of interaction <inline-formula><tex-math id="M1">\begin{document}$ J $\end{document}</tex-math><alternatives><graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="23-20221900_M1.jpg"/><graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="23-20221900_M1.png"/></alternatives></inline-formula> combined with Zeeman energy difference <inline-formula><tex-math id="M2">\begin{document}$ \Delta {E}_{z} $\end{document}</tex-math><alternatives><graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="23-20221900_M2.jpg"/><graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="23-20221900_M2.png"/></alternatives></inline-formula> determines the energy levels of system, which lead to the different two-qubit gates, such as controlled-Z (CZ), controlled-Rotation (CROT), and the square root of the SWAP gate (<inline-formula><tex-math id="M3">\begin{document}$ \sqrt{\rm{S}\rm{W}\rm{A}\rm{P}} $\end{document}</tex-math><alternatives><graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="23-20221900_M3.jpg"/><graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="23-20221900_M3.png"/></alternatives></inline-formula>) gates. In order to improve the fidelity of two-qubit gates, a series of key technologies is used experimentally, they being isotope purification, symmetry operation, careful Hamiltonian engineering, and gate set tomography. Fidelity of two-qubit gates exceeding 99% has been demonstrated for electron spin qubits in Si/SiGe quantum dots and nuclear spin qubits in donors. These advances have pushed the silicon-based spin qubit platform to become a major stepping stone towards fault-tolerant quantum computation. Finally, we discuss the future study of spin qubits, that is, how to effectively expand the number of qubits, and many other problems to be explored and solved.</sec>

Quantum error correction is a prerequisite for quantum computing; however, the performance critically depends on the accuracy of the decoding algorithm. To address these challenges, we propose a hybrid decoding architecture, BP + UF + BP. The protocol initiates with a truncated global BP stage to extract probabilistic gradients without requiring full convergence. This soft information guides a reliability-based Union-Find (UF) algorithm to prioritize high-likelihood error mechanisms. Finally, a local subgraph BP refinement maximizes correction accuracy. Numerical simulations on rotated surface codes under circuit-level depolarizing noise demonstrate a fault-tolerance threshold of approximately 0.72%. This significantly outperforms standard Minimum Weight Perfect Matching (MWPM) and Union-Find (UF) baselines. Notably, our method significantly reduces the logical error rate compared to the conventional decoders. With its empirically near-linear scaling under fixed iteration, the proposed architecture presents a scalable solution for real-time fault-tolerant quantum computing.

Quantum circuits are the preferred formalism for expressing quantum information processing tasks. Quantum circuit design automation methods mostly use a waterfall approach and consider that high level circuit descriptions are hardware agnostic. This assumption has lead to a static circuit perspective: the number of quantum bits and quantum gates is determined before circuit execution and everything is considered reliable with zero probability of failure. Many different schemes for achieving reliable fault-tolerant quantum computation exist, with different schemes suitable for different architectures. A number of large experimental groups are developing architectures well suited to being protected by surface quantum error correcting codes. Such circuits could include unreliable logical elements, such as state distillation, whose failure can be determined only after their actual execution. Therefore, practical logical circuits, as envisaged by many groups, are likely to have a dynamic structure. This requires an online scheduling of their execution: one knows for sure what needs to be executed only after previous elements have finished executing. This work shows that scheduling shares similarities with place and route methods. The work also introduces the first online schedulers of quantum circuits protected by surface codes. The work also highlights scheduling efficiency by comparing the new methods with state of the art static scheduling of surface code protected fault-tolerant circuits.