Synthetic impedances using current conveyors and their variants

Despite the recent publication of the analytical synthesis of voltage-mode even/odd- n th-order differential difference current conveyor (DDCC) and fully differential current conveyor II (FDCCII)-grounded resistor and capacitor universal Butterworth/Chebyshev filter structures, an elliptic voltage-mode even/odd- n th-order DDCC and FDCCII-based filter structure is yet to be presented in the literature. Under the restriction of a finite order, the elliptic filter is better at meeting the stringent cut-off rate of a very narrow transition band as compared to other kinds of filters, thus making the synthesis of such an elliptic filter to be extremely useful. In this study, one even- n th-order and two odd- n th-order elliptic filter structures are analytically synthesised using DDCCs and FDCCIIs. The feasibility of such structures is validated through H-spice simulations on the proposed elliptic third-order low-pass and elliptic fourth-order low-pass, high-pass, band-pass, and band-reject filters.

MOS-C realizations of the Kerwin–Huelsman–Newcomb (KHN) circuit using the commercially available Voltage Operational Amplifier (VOA) and the Current Feedback Operational Amplifier (CFOA) are reviewed in this paper. Additional MOS-C KHN realizations using the Operational Transresistance Amplifier (OTRA) and the Differential Current Voltage Conveyor (DCVC) are also included. MOS-C realizations of the KHN circuit using CMOS operational amplifier, CMOS current feedback operational amplifier and CMOS operational transresistance amplifier are also given.Spice simulation results using 0.18 CMOS technology model from MOSIS are included together with detailed comparison tables to demonstrate the differences between MOS-C KHN circuits using both of the commercially available active building blocks and CMOS integrated building blocks. A comparison with the Gm-C KHN circuit is also included.

This study presents a new active building block for analog signal processing applications, namely fully differential current conveyor transconductance amplifier. The proposed circuit is realized using differential difference current conveyors and transconductance amplifiers. Unlike, previous building blocks, both fully differential input and electronic tuning capability can be obtained into a single new device. The proposed building block is used to realize a universal biquadratic filter as an example application. PSPICE simulation results using 0.5 μm CMOS technology from MIETEC are used to confirm the presented building block. The simulation results express that the proposed active building block can be used to realize analog signal processing circuits.

Three port gyrator circuits using transconductance amplifiers or generalized conveyors

A differential pair-based, high-performance, first-generation current conveyor is proposed. The proposed circuit is laid out using the Mentor Graphics IC Station layout editor. The performance characteristics have been determined from HSpice postlayout simulations using the Austria Mikro Systeme 0.35 \mu m, 3.3 V process parameters. During the simulations, \pm 1.65 V supply voltages and a 25 \mu A biasing current are used. The power consumption is about 1.12 mW. The circuit also has very high voltage swings on ports X and Y, a very small impedance value on port X, high impedance values on ports Y and Z, and high-valued current and voltage transfer bandwidths. It is shown that the presented circuit can satisfy both the low-voltage/low-power and high-frequency performance current conveyor needs of the analog circuit applications. Furthermore, 2 new all-pass filter circuits as application examples are given and a procedure that can be used to search for the opportunities that would result from the use of the modified current conveyors is presented. Some special circuit topologies and new circuit function possibilities can be obtained by redesigning circuits with modified current conveyors, which is not possible with a standard current conveyor. The proposed approach is expected to allow deeper insight into circuit synthesis using modified current conveyors.

The paper presents a general structure for realizing current-mode (CM) fractional-order all-pass filters (FOAPFs) using generalized first-kind five-port current conveyors (GCC5s). The proposed circuit topology employs two GCC5s and minimum number of passive components, i.e.. one resistor and one fractional-order capacitor, both in grounded form. A total of eight CM FOAPFs using second-generation current conveyor are derived, which are capable of providing simultaneously both inverting and non-inverting current-outputs from high impedance terminals. A theoretical study of a variant created using universal current conveyor is provided, which verify the concept of the proposed circuit topology.

The design methods of nth-order filters by means of current conveyor (CC) are studied, the filter circuits using second-generation CC and multi-output CC (MOCC) are compared, and the merit and defect of two design methods are analyzed. The result states clearly that an nth-order filter designed by means of MOCC has a small mount component and simple structure and has good potential for use in information processing.

In this paper, the compensation advantage of the first-generation current conveyor (CCI) over the second-generation current conveyor (CCII) in tunable circuits is shown. For this purpose, a new floating frequency dependent negative resistor (FDNR) simulator using three CCIs is presented and employed in a third-order high-pass filter. The compensation feature of the CCI is shown for the proposed high-pass filter. As a second example, the presented compensation method is tested in a second-order band-pass filter constructed with two CCIs. Applying the proposed compensation technique, the CCI-based circuits can operate in lower biasing currents, which result in lower power consumption.

The design procedure of general immittance inverters is described. Three types of such an inverter were derived using general current or general voltage conveyors. Realizations of grounded inductors employing DVCC (differential-voltage current conveyor) elements and their simulated frequency characteristics are shown.

In this paper, a new first-order current-mode (CM) universal filter employing two dual output second-generation current conveyors (DO-CCIIs), one resistor and a grounded capacitor is proposed. The proposed filter has low input and high output impedances; thus, it can be easily connected with other CM circuits. It can simultaneously realize first-order low-pass (LP) and all-pass (AP) responses and can provide high-pass (HP) response with interconnection of LP and AP responses. It can be tuned electronically by replacing with dual output second-generation current controlled conveyors (DO-CCCIIs) instead of DO-CCIIs and removing the resistor. It has only a resistor but no capacitor connected in series to X terminal of DO-CCII; accordingly, it can be operated at high frequencies. Also, it does not need any critical passive component matching conditions and cancellation constraints. A number of simulation results based on SPICE program are included to exhibit performance, workability and effectiveness of the proposed filter configuration.

This paper presents a comparison and performance analysis of CMOS-based VDCC (Voltage Differencing Current Conveyor) circuits and differential amplifier FGMOS-based circuits. Differential amplifiers at the input stage of the VDCC circuit are designed using FGMOS instead of CMOS. Designing the differential amplifiers in the input stages of the VDCC circuit using FGMOS instead of CMOS amplifies the input signal of the circuit, providing a significant increase in linearity and voltage following properties. At the same time by using FGMOS transistors, the input stage of the circuit, which provides arithmetic calculations, is simplified. A three-input single output (TISO) type band-pass filter application is given to show the versatility of the VDCC circuit topology. The THD value of the CMOS-based VDCC filter circuit is found to be 15.99%. The THD value of the proposed differential amplifiers FGMOS-based VDCC filter circuit is found to be 1.03%. Theoretical analysis results confirm the simulation results. The presented CMOS and FGMOS-based band-pass filters are simulated using TSMC CMOS 0.18 μm technology with VDD, a power supply voltage equal to 0.9 V. The proposed circuit topology will be an essential reference in the literature for researchers to design new linearly tunable filters.

This study presents a high common-mode rejection ratio (CMRR), and high power-supply rejection ratio (PSRR) current-mode instrumentation amplifier (CMIA) to overcome the limitations of existing differential voltage second-generation current conveyors (DVCCII)-based CMIAs in achieving high CMRR. The design is based on a fully differential second-generation current conveyor block with a novel circuit design following by a current subtracting stage. The CMIA is designed and laid out in 130 nm CMOS technology operating under ± 1.2 V supply voltage in Cadence software. The post-layout simulation results show that the CMIA achieves low-frequency voltage and current CMRR- BW of 228.8 dB–10 kHz and 246 dB–10.6 kHz, respectively, with PSRR + /PSRR- of 108.2 dB/99.7 dB, power consumption of 507 µW, and a core area of 0.0015 mm2. The unique quality of the circuit is that, it does not need well-matched active blocks, but inherently improves CMRR, bandwidth, and PSRR; hence it gains an excellent choice for integration.

This paper presents a novel One-shot pulse Generator Circuit, which is composed of only one differential voltage current conveyor (DVCC) as the active element. The application circuits utilizing the DVCC are introduced and implemented. Only one DVCC and two resistors and one capacitor are required to construct every circuit. Each circuit is able to provide a pulse-shaped response having changeable width via a positive-edge triggered signal. The first one is a general one-shot pulse generating circuit. The second design can reduce the recovery time after applying triggered signals. Is-Spice is the simulation software to simulate every model. To fabricate the models commercially available ICs (AD844AN) and passive elements are required. Program and experimental outputs satisfy theoretical results.

This paper introduces two Kervin-Huelsman-Newcomb(KHN) filters. One is constructed with a negative type Differential-Difference Current Conveyor (DDCC-), a positive type second-generation current conveyor (CCⅡ+) and two buffers. While another is constructed with a DDCC+ (positive type DDCC), a CCⅡ-(negative type CCII)and two buffers. The input impedance is large and output impedance is small, and the loading effect is decreased. Hspice simulations based on UMC 0.5μm process to confirm these analyses in this paper are also given.

The design of transconductance-mode multifunction biquad filter containing three input voltage nodes and single-output current node is proposed. Its circuit principle is emphasized on employing Voltage Differencing Current Conveyor (VDCC) to be an active building block. The proposed filter description uses three VDCCs co-working with two grounded capacitors and three grounded resistors. The synthesis of the proposed multifunction filter is based on avoidance of using multiple-output active elements to achieve commercially available integrated circuits for practical implementation. Additionally, without multiple-output active element, it can alleviate current tracking error from the current mirrors used in output ports. It also decreases the amounts of the transistors inside the active elements. The proposed multifunction filter offers all 5 filter functions, which are non-inverting Low-Pass (LP), non-inverting High-Pass (HP), non-inverting Band-Pass (BP), non-inverting Band-Reject (BR) and also non-inverting All-Pass (AP) functions from same circuit topology under different circuit condition for input signals. Furthermore, the natural frequency for all filtering responses is independently achieved from the bandwidth or the quality factor of the proposed filter. For cascade-able connectivity, the output current port indeed provides a high impedance. In addition, the magnitude of the output current for all filtering functions can be resistively adjusted. The consideration for non-ideal case of the presented multifunction filter is also analyzed. The simulation and experimental results of the presented transconductance multifunction biquad filter based on VDCC practically implemented by the commercially available ICs, LM13700 and AD844 can validate the theoretical anticipation.