Temperature dependence of electrical properties for MOS capacitor with HfO2/SiO2 gate dielectric stack

The unique physical, chemical, and electronic properties of rare earth oxides have been of immense interest to replace SiO2 as a dielectric material in metal–oxide–semiconductor (MOS)-based sensors applications to accurately measure the radiation dosage and increase sensor sensitivities in as diverse applications as space radiation, nuclear physics, medical diagnostics, radiation cancer therapy, and personal dosimetry devices. Hence, the electrical characteristics of oxides prior to and after irradiation of MOS-based devices are needed since they are the backbone of the devices such as MOSFETs and ICs. In addition, an understanding of the behaviour of high-k dielectric oxides in an MOS configuration is necessary since the radiation-induced damage occurs in the bulk oxide film and/or near the oxide–semiconductor interface resulting in creation of lattice defects. Hence, MOS structures with the rare earth oxides of Er2O3, Gd2O3, Yb2O3, and a transition metal oxide of HfO2 were produced by RF magnetron sputtering to determine (a) the structure of the films, (b) dielectric constants, (c) capacitance versus voltage behaviour of Er2O3, Gd2O3, Yb2O3, and HfO2 prior to and after irradiation of the devices in the dose range of 0–76 Gy. The experimental results were analysed with a theoretical framework on the energy band diagram and the radiation effects on the electrical characteristics of the MOS capacitors. The characteristics of the devices were evaluated by using effective oxide charge density ( $$ Q_{\text{EFF}} $$ ), variation in the oxide trapped charge density ( $$ \Delta N_{\text{ox}} $$ ), and interface trapped charge density ( $$ \Delta N_{\text{it}} $$ ). In addition, barrier height ( $$ \phi_{\text{b}} $$ ), image force barrier lowering ( $$ \Delta \phi_{\text{b}} $$ ), acceptor concentration ( $$ N_{\text{a}} $$ ) were calculated before and after irradiation and examined the nature of interface states. The radiation responses of the Er2O3 and HfO2 MOS capacitors did not show a stable behaviour with an increase in radiation dose due to possible neutral electron trap centres. Contrary to expectations, we infer that more negative charges are trapped in Gd2O3-based device than positive charges with an increase in radiation dose. The C–V curves of the Yb2O3 MOS capacitor shifted in the same direction at both 100 kHz and 1 MHz, and as expected, positive charge traps in the structure are more efficient than negative charges. The observed sensitivities of Yb2O3 MOS capacitors are 4–7 times higher than those of SiO2, and the sensitivities of the Yb2O3 MOS capacitors with a total radiation dose of 70 Gy were found to be around 28.08 mV/Gy at both 100 kHZ and 1 MHz frequencies. The Yb2O3 appears to be a promising dielectric candidate for developing a new generation of radiation sensors with an excellent interface quality when compared to rare earth mixed oxides such as silicates, transition metal oxides, and the silicates based on transition metals, Al2O3, and BiFeO3. Our review of the literature suggests that while the radiation damage has been assessed comprehensively based on the C–V characteristics, microstructural characterization of the irradiated films and their interfaces is lacking even though the quality of oxide/Si interface is the most important feature of the devices. The electrical data should be correlated with the inferences from XPS, AFM, TEM, XRD, and other techniques. Further progress requires selection and validation of material properties based on theoretical calculations and predications, utilization of diverse thin film processing and characterization techniques, determining the effect of thickness on the properties of MOS capacitors, a thorough understanding of the interfaces, effect of frequency on the MOS capacitors and the interface characteristics, effect of radiation on the physical, interfacial, and electrical characteristics of MOS capacitors, and preparation and characterization of sensors based on thin films of novel mixed oxides and silicates of different chemistries.

The electrical properties of hafnium oxide (HfO2) gate dielectric as a metal–oxide–semiconductor (MOS) capacitor structure deposited using pulse laser deposition (PLD) technique at optimum substrate temperatures in an oxygen ambient gas are investigated. The film thickness and microstructure are examined using ellipsometer and atomic force microscope (AFM), respectively to see the effect of substrate temperatures on the device properties. The electrical J–V, C–V characteristics of the dielectric films are investigated employing Al–HfO2–Si MOS capacitor structure. The important parameters like leakage current density, flat-band voltage (Vfb) and oxide-charge density (Qox) for MOS capacitors are extracted and investigated for optimum substrate temperature. Further, electrical studies of these MOS capacitors have been carried out by incorporating La2O3 into HfO2 to fabricate HfO2/La2O3 dielectric stacks at an optimized substrate temperature of 800 °C using a PLD deposition technique under oxygen ambient. These Al–HfO2–La2O3–Si dielectric stacks MOS capacitor structure are found to possess better electrical properties than that of HfO2 based MOS capacitors using the PLD deposition technique.

Metal oxide semiconductor (MOS) capacitors were fabricated based on oxygen-terminated p-type (100) oriented diamond and SiO2 grown by atomic layer deposition. A detailed electrical characterization consisting of I–V, C–V, and C–F was performed in order to analyze the electrical properties of the structure. The MOS capacitor presented no detectable leakage current in forward and very low leakage current in reverse sustaining at least 6 MV/cm without degradation. The C–V measurements showed depletion and deep depletion regimes in forward and accumulation regimes in reverse, with a low density of interface states of ∼1011 cm−2 along the diamond bandgap. The latter results were further validated by conductance and capacitance vs frequency measurements.

In n-type 4H-SiC, over-oxidation of an implanted surface-near, Gaussian nitrogen-profile results in MOS capacitors, which possess a distinctly reduced density of interface states Dit and an undesirable large negative flatband voltage UFB. Their values are determined by the implantation parameters and the thickness of the oxide layer. The negative flatband voltage can strongly be compensated in the case that a Gaussian aluminum-profile is co-implanted prior to the oxidation. Depending on the conditions of the Al implantation, UFB can be controlled within a wide range. Secondary ion mass spectrometry analyses reveal that the implanted N and Al atoms are mobile in the oxide layer during the oxidation process and are partly accumulated at the SiC/SiO2 interface.

Metal oxide semiconductor (MOS) capacitance within field effect transistors are of great interest in terahertz (THz) imaging, as they permit high-sensitivity, high-resolution detection of chemical species and images using integrated circuit technology. High-frequency detection based on MOS technology has long been justified using a mechanism described by the plasma wave detection theory. The present study introduces a new interpretation of this effect based on the self-mixing process that occurs in the field effect depletion region, rather than that within the channel of the transistor. The proposed model formulates the THz modulation mechanisms of the charge in the potential barrier below the oxide based on the hydrodynamic semiconductor equations solved for the small-signal approximation. This approach explains the occurrence of the self-mixing process, the detection capability of the structure and, in particular, its frequency dependence. The dependence of the rectified voltage on the bias gate voltage, substrate doping, and frequency is derived, offering a new explanation for several previous experimental results. Harmonic balance simulations are presented and compared with the model results, fully validating the model’s implementation. Thus, the proposed model substantially improves the current understanding of THz rectification in semiconductors and provides new tools for the design of detectors.

This paper presents a compact model for metal oxide semiconductor (MOS) capacitors, based on a time-dependent solution for the surface potential. This enables modeling of the frequency dependence of MOS capacitors, which is not possible with existing compact models. The model is implemented in Verilog-A, and is verified against two-dimensional (2-D) numerical device simulations with DESSIS.

An unbalanced magnet (UM) is commonly employed in ionization magnetron sputtering (IMS) in order to increase the ionization rates of sputtering species. In this paper, sputtering using an UM is compared with that using a balanced magnet (BM) during the deposition of Ti thin layers. Ti layers were fabricated on the top of polycrystalline silicon (poly-Si) gate electrodes of antenna metal oxide semiconductor (MOS) capacitors with various thicknesses of gate SiO2 layers ranging from 25 to 80 Å, and the durability of the gate SiO2 layers was monitored by current–voltage (I–V) measurements. It was found that the MOS capacitors with thin SiO2 layers fabricated with the UM were much more damaged than those fabricated with the BM. This characteristic became more marked for thinner SiO2 layers. Its origin was investigated by monitoring the current injected from the plasma to the substrate using a specially designed electrical configuration, and was explained as follows. Electrons are carried toward substrates by curvature drift originating from the diverging magnetic field perpendicular to the substrate. This causes the accumulation of electrons on the gate SiO2 thin layers where the diverging magnetic field is developed at the beginning of discharge, i.e., before the uniform Ti deposition starts to occur. Consequently, the accumulated electrons break the gate SiO2 layer. These results suggest that a new design of magnetic fields for the UM is needed so that the magnetic field does not reach the substrate. It is particularly important to keep the diverging magnetic fields away from the substrates at the beginning of discharge.

In the present study, the electrical characteristics of metal–insulator–semiconductor capacitors with Cu and Ta electrodes on porous SiCOH dielectric subjected to bias-temperature stress (BTS) are investigated. The capacitor with Cu electrode exhibits stable capacitance–voltage characteristics after being subjected to BTS of at , while Ta ions readily drift into porous SiCOH under the BTS of and a lower temperature at , as indicated by the observation of a larger flatband voltage shift during sweep afterward. The leakage behavior of porous SiCOH is investigated using a voltage ramp method after the capacitors are subjected to BTS to study the conduction mechanism associated with the metal-ion drift into the dielectric. It appears that the leakage of capacitors with Ta electrodes starts to increase after BTS and falls into the Poole–Frenkel conduction regime, indicating that Ta ions drift into porous low- under BTS and subsequently act as electron traps. The leakage of capacitors with Cu electrodes, however, retains almost the same characteristics as those before BTS, suggesting that the increase of leakage for capacitors with Ta electrodes is induced by the drifted Ta ions instead of the degradation of dielectric material.

The mixing of field-induced and current-induced degradation mechanisms can result in TDDB data showing a strong non-Arrhenius temperature dependence. Generally, at higher fields and lower temperatures, the current-induced mechanism dominates and a small activation energy is observed. At lower fields and higher temperatures, the field induced degradation mechanism tends to dominate and a strong temperature dependence is produced. The mixing of the current-induced and field-induced mechanisms can result in an activation energy associated with TDDB which is not unique but strongly dependent on test conditions and oxide thickness. The mixing is validated over various voltage, field, thickness and temperature regimes.

Thermally stimulated current in SiO2

Characterization of interface defects in ALD Al2O3/p-GaSb MOS capacitors using admittance measurements in range from kHz to GHz

We present studies on the limits of oxide reliability on a local, microscopic scale, using scanning tunneling microscope (STM)-based ballistic electron emission microscopy/spectroscopy (BEEM/S). In these studies, electrons are injected from the STM tip into the conduction band of a SiO2 layer that is imbedded in a metal–oxide–semiconductor (MOS) structure. The electron energy is determined both by the tip bias that can be set up to −13 V and by the applied oxide bias. Combining the two biases can heat electrons to energies that are unreachable in thin oxides by conventional Fowler–Nordheim injection methods. Our studies indicate that breakdowns are difficult to achieve for 7.1 nm oxides. A local breakdown was not observed even for an injected charge dosage of 1.8×103 C/cm2 at equivalent Fowler–Nordheim stress fields of ∼25 MV/cm, although defect densities in the oxide were as high as ∼5×1013/cm2. Evidence of anode hole injection is also observed under high oxide biases ∼8 MV/cm. Therefore we conclude that trap creation and hole injection processes are not sufficient to cause breakdowns at arbitrary locations on the 7.1 nm oxides. Whereas electron trapping is dominant during electron injection for 7.1 nm oxides, only a positive charge buildup was observed in the 2.8 nm oxides while stressing with only 1 eV electrons. For 2.8 nm oxides, a local breakdown did not occur for dosages of 3.1×103 C/cm2 at equivalent fields >43 MV/cm. The observed breakdowns were accompanied by gate metal failure and are hence believed to occur at weak spots in MOS capacitors. We conclude that an intrinsic breakdown limit of SiO2 has not yet been reached.

A plasma enhanced atomic layer deposition (PEALD) HfO2/AlN dielectric stack was used as the gate dielectric for AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors (MOS-HEMTs) for high-frequency power device applications. The capacitance–voltage (C–V) curves of the HfO2/AlN/GaN MOS capacitor (MOSCAP) showed a small frequency dispersion along with a very small hysteresis (∼50 mV). Moreover, the interface trap density (Dit) was calculated to be 2.7 × 1011 cm−2 V−1 s−1 at 150 °C. Using PEALD-AlN as the interfacial passivation layer (IPL), the drain current of the HfO2/AlN MOS-HEMTs increased by about 46% and the gate leakage current decreased by six orders of magnitude as compared with those of the conventional Schottky gate AlGaN/GaN HEMTs processed using the same epitaxial wafer. The 0.3-µm-gate-length HfO2/AlN/AlGaN/GaN MOS-HEMTs demonstrated a 2.88 W/mm output power, a 23 dB power gain, a 30.2% power-added efficiency at 2.4 GHz, and an improved device linearity as compared with the conventional AlGaN/GaN HEMTs. The third-order intercept point at the output (OIP3) of the MOS-HEMTs was 28.4 as compared with that of 26.5 for the conventional GaN HEMTs. Overall, the MOS-HEMTs with a HfO2/AlN gate stack showed good potential for high-linearity RF power device applications.

An enhanced BSIM3 non-quasi-static (NQS) model for the large signal transient has been developed. The enhancement followed the same device topology adopted in the BSIM3 NQS model with the addition of a unified equation for the transient gate and substrate current in both the accumulation and inversion operation region. During strong inversion, the existing relaxation time approach is used to model the NQS effect, while in the accumulation region, the MOS transistor behavior is like a MOS capacitor without the source and drain region. The dynamic conversion among the accumulation, depletion and inversion charges is modeled to give the transient substrate and gate current. The enhancement has been implemented in the newly released BSIM3 version 3.2, and comparison has been made with results obtained from a 2-D device simulator. The time penalty for using the new enhancement is about 18% more than the original model.

We report on experimental observations of room temperature low frequency capacitance-voltage (CV) behaviour in metal oxide semiconductor (MOS) capacitors incorporating high dielectric constant (high-k) gate oxides, measured at ac signal frequencies (2 kHz to 1 MHz), where a low frequency response is not typically expected for Si or GaAs MOS devices. An analysis of the inversion regions of the CV characteristics as a function of area and ac signal frequency for both n and p doped Si and GaAs substrates indicates that the source of the low frequency CV response is an inversion of the semiconductor/high-k interface in the peripheral regions outside the area defined by the metal gate electrode, which is caused by charge in the high-k oxide and/or residual charge on the high-k oxide surface. This effect is reported for MOS capacitors incorporating either MgO or GdSiOx as the high-k layers on Si and also for Al2O3 layers on GaAs(111B). In the case of NiSi/MgO/Si structures, a low frequency CV response is observed on the p-type devices, but is absent in the n-type devices, consistent with positive charge (>8 × 1010 cm−2) on the MgO oxide surface. In the case of the TiN/GdSiOx/Si structures, the peripheral inversion effect is observed for n-type devices, in this case confirmed by the absence of such effects on the p-type devices. Finally, for the case of Au/Ni/Al2O3/GaAs(111B) structures, a low-frequency CV response is observed for n-type devices only, indicating that negative charge (>3 × 1012 cm−2) on the surface or in the bulk of the oxide is responsible for the peripheral inversion effect.