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  • https://doi.org/10.1109/icsigp.1996.567300Copy DOI Icon

The design and implementation of DSP TMS320C40 parallel processing system

  • Oct 14, 1996
  • Wang Baoli +2 more
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Abstract

This paper presents the design and implementation of four C40 based parallel processing system. It is comprised of four single CPU ISA-bus board. All four C40s are fully connected together through comports. The supporting software include basic tools such as simulator, assembler, linker, C compiler, parallel run-time support library. Four CPU debug/monitor software was also developed to ease programming. As an example, parallel FFT has been implemented using the system. Under the control of an IBM-PC, the system peak performance is 200 MFLOPS and can be further expanded. It is suitable for radar, sonar, image signal processing.

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