The performance impact of computational efficiency on HPC clusters with hyper-threading technology

Typically, a High Performance Computing (HPC) cluster loosely couples multiple Symmetric Multi-Processor (SMP) platforms into a single processing complex. Each SMP uses shared memory for its processors to communicate, whereas communication across SMPs goes through the intra-cluster interconnect. By analyzing the communication pattern of processes, it is possible to arrive at a mapping of processes to processors to ensure optimal communication paths for critical traffic. This critical traffic refers to the communication pattern of the program, which can be characterized by either frequency or size (or both) of the messages. To find an ideal mapping, it is imperative to understand the communication characteristics of the SMP memory system, intra-cluster interconnection, and the Message Passing Interface (MPI) program running on a cluster.Our approach is to study the ideal mapping for two classes of interconnects: 1) standard, high-volume Ethernet interconnects, and 2) proprietary, low-latency high-bandwidth interconnects. In the first installment of our work presented in this paper, we have focused on the ideal mapping for the first class.We configured a 16-node dual-processor cluster, interconnected with Fast Ethernet, Gigabit Ethernet, Giganet, and Myrinet. We used High Performance Linpack (HPL) benchmark to demonstrate that re-mapping of processes to processors (or changing the order of processors used) can affect the overall performance. The mappings are based on the HPL program analysis obtained from running a MPI profiling tool. Our results suggest that the performance of HPL using Fast Ethernet as the interconnect can be improved from 10% to 50% depending on the process mapping and the problem size. Conversely, an ad hoc mapping can adversely affect the cluster performance.

In the UNIX/Linux environment the kernel can log every command process created by every user with process accounting. Thus process accounting logs have many potential uses, particularly the monitoring and forensic investigation of security events. Previous work successfully leveraged the use of process accounting logs to identify a difficult to detect and damaging intrusions within high performance computing (HPC) clusters, masquerade attacks, where intruders pose as legitimate users with purloined authentication credentials. This paper incrementally advances the goal of more accurately identifying masqueraders on HPC clusters by seeking to identify features within command sets that distinguish masqueraders. To accomplish this goal, we created NVision-PA, a software tool which produces text and graphic statistical summaries describing input processing accounting logs. This research is both a promising next step toward creating a real-time masquerade detection sensor for production HPC clusters as well as providing another tool for system administrators to use for statistically monitoring and managing legitimate workloads in HPC environments

HDFS (Hadoop Distributed File System) is the primary storage of Hadoop. Even though data locality offered by HDFS is important for Big Data applications, HDFS suffers from huge I/O bottlenecks due to the tri-replicated data blocks and cannot efficiently utilize the available storage devices in an HPC (High Performance Computing) cluster. Moreover, due to the limitation of local storage space, it is challenging to deploy HDFS in HPC environments. In this paper, we present a hybrid design (Triple-H) that can minimize the I/O bottlenecks in HDFS and ensure efficient utilization of the heterogeneous storage devices (e.g. RAM, SSD, and HDD) available on HPC clusters. We also propose effective data placement policies to speed up Triple-H. Our design integrated with parallel file system (e.g. Lustre) can lead to significant storage space savings and guarantee fault-tolerance. Performance evaluations show that Triple-H can improve the write and read throughputs of HDFS by up to 7x and 2x, respectively. The execution times of data generation benchmarks are reduced by up to 3x. Our design also improves the execution time of the Sort benchmark by up to 40% over default HDFS and 54% over Lustre. The alignment phase of the Cloudburst application is accelerated by 19%. Triple-H also benefits the performance of SequenceCount and Grep in PUMA over both default HDFS and Lustre.

This paper focuses on theoretical analysis, computational test and optimization of High Performance Computing Cluster (HPCC). Also known as Data Analytics Supercomputer (DAS), HPCC is built on Intel Many Integrated Core (MIC) for High Performance Linpack (HPL) test. Initially, a platform is configured by 5 nodes with an Intel® Xeon Phi <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">™</sup> Coprocessor 31S1P per node to analyze power consumption as well as parallel level of Intel MIC accelerator. Compiling with Message Passing Interface (MPI) library and Math Kernel Library (MKL), the "Make" file is modified and debugged by adjusting parameters in hpccinf.txt. According to multiple Infiniband nodes evaluation, the libhpl library of Intel is employed and value of NB is set to be 960 for a single node with one MIC while debugging. Moreover, this paper optimized the algorithm on Double Precision General Matrix Multiplication (DGEMM) test and PTRANS to acquire efficient, precise and truncated working time duration. From HPL and Gridding Program experimental results, it's clear that the theoretical analysis and experiments were performed successfully.

Contention for shared resources in High-Performance Computing (HPC) clusters occurs when jobs are concurrently executing on the same multicore node (there is a contention for shared caches, memory buses, memory controllers and memory domains). The shared resource contention incurs severe degradation to workload performance and stability and hence must be addressed. The state-of-the-art HPC clusters, however, are not contention-aware. The goal of this work is the design, implementation and evaluation of a virtualized HPC cluster framework that is contention aware.

We benchmarked the performance of the GROMACS 2024 molecular dynamics (MD) code on a modern high-performance computing (HPC) cluster with AMD CPUs on up to 65,536 CPU cores. We used five different MD systems, ranging in size from about 82,000 to 204 million atoms, and evaluated their performance using two different Message Passing Interface (MPI) libraries, Intel-MPI and Open-MPI. The largest system showed near-perfect strong scaling up to 512 nodes or 65,536 cores, maintaining a parallel efficiency above 0.9 even at the highest level of parallelization. Energy efficiency for a given number of nodes was generally equal to or slightly better than parallel efficiency. We achieved peak performances of 687 ns/d for the 82k atom system, 116 ns/d for the 53M atom system, and about 35 ns/d for the largest 204M atom system. These results demonstrate that highly optimized software running on a state-of-the-art HPC cluster provides sufficient computing power to simulate biomolecular systems at the mesoscale of viruses and organelles, and potentially small cells in the near future.

Data-intensive computing has become one of the major workloads on traditional high-performance computing (HPC) clusters. Currently, deploying data-intensive computing software framework on HPC clusters still faces performance and scalability issues. In this paper, we develop a new two-level storage system by integrating Tachyon, an in-memory file system with OrangeFS, a parallel file system. We model the I/O throughputs of four storage structures: HDFS, OrangeFS, Tachyon and two-level storage. We conduct computational experiments to characterize I/O throughput behavior of two-level storage and compare its performance to that of HDFS and OrangeFS, using TeraSort benchmark. Theoretical models and experimental tests both show that the two-level storage system can increase the aggregate I/O throughputs. This work lays a solid foundation for future work in designing and building HPC systems that can provide a better support on I/O intensive workloads with preserving existing computing resources.

This Research to Practice Full Paper presents the experience of implementing micro HPC (μHPC) clusters in the education context. In developing countries, access to and experience of High Performance Computing (HPC) facilities (which are important for the economic development of those countries) has presented challenges to academic institutions due to prohibitive costs of acquisition and maintenance of HPC systems. These challenges affect the delivery of courses, which include HPC and parallel computation in their syllabi. However, due to advancements in integrated circuit technologies, credit-card-sized personal computers (PCs) have emerged with the capabilities of a fully-fledged PC. These credit-card-sized PCs offer an opportunity for system integrators to build micro HPC (μHPC) clusters which, apart from their efficiency, scalability and availability, have a number of attributes which are not shared with conventional data-center based HPC clusters These include their low power consumption, portability, diskless nodes, cost-effectiveness and excellent price to performance ratios. μHPC clusters are, therefore, ideally suited to support curricula in all educational disciplines that demand parallel computation. The purpose of this study is to investigate the implementation of μHPC to find out from students how ease of use of a μHPC system is to acquire skills and knowledge of HPC. We used focus groups and surveys to gather data in the framework of the design science research paradigm. The implementation of μHPC clusters involved a demonstration of the system in the problem context that provided valuable lessons. The results indicate that μHPC is the ease of use HPC artifact for learning about management, integration, deployment, installation, downloading, and running of parallel programs.

For the High Performance Linpack (HPL) benchmark at the coming Exascale and beyond, silent errors like bit flipping in memory are expected to become inevitable. However, since bit flipping errors are difficult to be detected and located, their impact to the numerical correctness of HPL has not been evaluated thoroughly and quantitatively, while the impact at Exascale is especially susceptible. In this paper, an initial quantitative analysis of the impact of bit flipping errors to the numerical correctness of HPL has been investigated. To validate the numerical correctness of computed solution using HPL, there is a residual check after the approximate solution obtained. This paper has shown that in the case of only one bit flipping to any element in the original data matrix, if the flipped position is not the leading position of exponent, the residual check in HPL will almost surely pass at the scale of Exa flops and beyond. Experiments on modified HPL in single precision at small scales have verified the theoretical results in double precision at Exascale. The results obtained in this paper can provide a better understanding to the impact of bit flipping errors to numerical correctness of scientific computing applications.

Aiming at realizing a high performance computing (HPC) cloud with vector supercomputers, this paper presents the world’s first prototype of wide-area vector meta computing infrastructure named a vector computing cloud by virtualizing remote vector computing resources as an HPC service over the Internet. The prototype system consists of two remote NEC SX-9 nodes connected through a long fat-pipe network (LFN), and each node is located at Tohoku University and Osaka University with a distance of 800 km. The vector computing cloud also provides a single sign on environment and jobs are automatically assigned to appropriate sites. Wide-area co-operation of distributed vector supercomputers is realized by adopting the NAREGI Grid Middleware, and a virtual machine for NEC SX vector supercomputer series, job scheduling algorithms, and an MPI operating environment are newly developed to enhance the job and resource management capabilities of the NAREGI Grid Middleware. In addition, to achieve fairness and efficient job scheduling on the vector computing cloud, this paper presents a history-based job scheduling mechanism for a queue system. Based on the estimation, the job scheduling mechanism automatically allocates the job to an appropriate site, which can execute the job earlier. The operation tests and experiment results indicate that the prototype system realizes single sign on for multiple vector resources and has enough potential for transparently operating jobs between the two SX-9 systems. This paper also evaluates and discusses the performance of the proposed job scheduling mechanism and MPI operation between both SX-9 systems using the High Performance Linpack (HPL) benchmark.

High-Performance Computing (HPC) systems consume large amounts of energy. As the energy consumption predictions for HPC show increasing numbers, it is important to make users aware of the energy spent for the execution of their applications. Drawing from our experience with exposing cost and performance in public clouds, in this paper we present a generic mechanism to compute fast and accurate estimates for the tradeoffs between the performance (expressed as makespan) and the energy consumption of applications running on HPC clusters. We validate our approach by implementing it in a prototype, called E-BaTS and validating it with a wide variety of HPC bags-of-tasks. Our experiments show that E-BaTS produces conservative estimates with errors below 5%, while requiring at most 12% of the energy and time of an exhaustive search for providing configurations close to the optimal ones in terms of trade-offs between energy consumption and makespan.

PCI Express는 고속, 저전력 등의 특성으로 인하여 프로세서와 주변 I/O 장치들을 연결하는 업계 표준의 버스 기술이다. PCI Express는 최근 고성능 컴퓨터나 클러스터/클라우드 컴퓨팅 등의 분야에서 시스템 인터커넥션 네트워크로서 그 활용가능성을 검증하고 있는 추세이다. PCI Express가 시스템 인터커넥션 네트워크로서 활용가능하게 된 계기는 PCI Express에 NTB(non-transparent bridge) 기술이 도입되면서부터이다. NTB 기술은 물리적으로 두 PCI Express subsystem을 연결가능하도록 하지만, 필요할 경우 논리적인 격리(isolation)를 제공하는 특징이 있다. 또한, PGAS(partitioned global address space)와 같은 공유 주소 공간(shared address space) 프로그래밍 모델은 최근 멀티코어 프로세서의 보편화로 인하여 병렬컴퓨팅 프레임워크로 각광받고 있다. 따라서, 본 논문에서는 차세대 병렬컴퓨팅 플랫폼을 위하여 PCI Express 환경에서 OpenSHMEM을 구현하기 위한 초기 OpenSHMEM API를 설계 및 구현하였다. 본 연구에서 구현한 15가지 OpenSHMEM API의 정확성을 검증하기 위해서 Github의 openshmem-example 벤치마크의 수행을 통하여 확인하였다. 현재 시중에서는 PCI Express 기반 인터커넥션 네트워크는 가격이 매우 비싸고 아직 일반인이 사용하기 용이하도록 NIC형태로 널리 보급되지 않은 실정이다. 이러한 기술개발 초기단계에서 본 연구는 PCI Express 기반 interconnection network를 RDK(evaluation board) 수준에서 실제로 동작하는 실험환경을 구축하고, 여기에 추가로 최근 각광받는 OpenSHMEM software stack를 자체적으로 구현하였다는 데 의의가 있다. PCI Express is a bus technology that connects the processor and the peripheral I/O devices that widely used as an industry standard because it has the characteristics of high-speed, low power. In addition, PCI Express is system interconnect technology such as Ethernet and Infiniband used in high-performance computing and computer cluster. PGAS(partitioned global address space) programming model is often used to implement the one-sided RDMA(remote direct memory access) from multi-host systems, such as computer clusters. In this paper, we design and implement a OpenSHMEM API based on PCI Express maintaining the existing features of OpenSHMEM to implement RDMA based on PCI Express. We perform experiment with implemented OpenSHMEM API through a matrix multiplication example from system which PCs connected with NTB(non-transparent bridge) technology of PCI Express. The PCI Express interconnection network is currently very expensive and is not yet widely available to the general public. Nevertheless, we actually implemented and evaluated a PCI Express based interconnection network on the RDK evaluation board. In addition, we have implemented the OpenSHMEM software stack, which is of great interest recently.

The Data Center (DC) and High-Performance Computing (HPC) sector is increasingly becoming one of the single largest energy consuming sectors in the energy system and the demand for new DCs is growing with the rising use of cloud-based services, social media and internet usage in general. DCs and HPC clusters employ energy intensive cooling in order to dissipate the generated heat from the Information Technology (IT) equipment. Conventionally, the cooling is almost exclusively done by air-based systems; however, the use of liquid based cooling has shown potential to increase computational efficiency of the systems and decrease cooling needs by operation above the free cooling limit. Furthermore, the liquid coolant can operate at higher temperatures allowing high temperature waste heat recovery. In addition, load shifting through Latent Thermal Energy Storage (LTES) will allow the non-controllable waste heat resource to be stored seasonally, thereby granting the ability to cover larger District Heating (DH) loads. In this work, a decision support model is developed that will take basic information regarding a HPC cluster or DC as inputs. The decision support model will provide a parameterized output that shows different configurations and design parameters that can be utilized for the system. The main outputs includes yearly energy savings, yearly cost savings and efficiency gains through the Power Usage Efficiency and the Energy Reuse Efficiency. The decision support model is demonstrated in a Danish case study. Electricity savings between 8.14 % and 10.8 % of the total cluster electricity consumption and a waste heat recovery potential of 85 MWh/year to 576 MWh/year are obtained. It is shown that if the DH covered is needed to be self-sufficient the configuration would require an LTES with PCM mass of 500 kg, but system configurations that operate as an addition to an existing local heating source shows increases in yearly energy savings of 332 % compared to self-sufficient configurations. The goal of the decision support model is to assist the design of future waste heat recovery applications through selection of system parameters including coolant temperatures, energy storage design parameters, DH supply temperatures and DH load coverage from the DC or HPC cluster.

Hydrology is the study of water. Hydrology tracks various attributes of water such as its quality and movement. As a tool Hydrology allows researchers to investigate topics such as the impacts of wildfires, logging, and commercial development. With perfect and complete data collection researchers could answer these questions with complete certainty. However, due to cost and potential sources of error this is impractical. As such researchers rely on simulations. The Distributed Hydrology Soil Vegetation Model(also referenced to as DHSVM) is a scientific mathematical model to numerically represent watersheds. Hydrology, as with all fields, continues to produce large amounts of data from researchers. As the stores of data increase the scientific models that process them require occasional improvements to better handle processing the masses of information. This paper investigates DHSVM as a serial C program. The paper implements and analyzes various high performance computing advancements to the original code base. Specifically this paper investigates compiler optimization, implementing par- allel computing with OpenMP, and adding distributed computing with OpenMPI. DHSVM was also tuned to run many instances on California Polytechnic State Uni- visity, San Luis Obispo’s high performance computer cluster. These additions to DHSVM help speed-up the results returned to researches, and improves DHSVM’s ability to be used with uncertainty analysis methods. iv This paper was able to improve the performance of DHSVM 2 times with serial and compiler optimization. In addition to the serial and compiler optimizations this paper found that OpenMP provided a noticeable speed up on hardware, that also scaled as the hardware improved. The pareallel optimization doubled DHSVM’s speed again on commodity hardware. Finally it was found that OpenMPI was best used for running multiple instances of DHSVM. All combined this paper was able to improve the performance of DHSVM by 4.4 times per instance, and allow it to run multiple instances on computing clusters.

Analysis and evaluation of MapReduce solutions on an HPC cluster