The ROBDD Size of Simple CNF Formulas

Specific physical defects of high performance circuits manifest themselves as path delay faults (PDFs). A pair (v1, v2) of test patterns is required to detect a PDF. A PDF is robust testable if there is a test pair on which the fault manifestation does not depend on delays of other circuit paths. A PDF is non robust testable if manifestation of the fault on any test pair is possible only when all other paths of the circuit are fault free. For high quality delay testing it is desirable to detect delay of any path regardless of delays of other paths. In this paper, synthesis of a circuit by covering each nonterminal node of the reduced ordered binary decision diagram (ROBDD) or free binary decision diagram (Free BDD) system with the original subcircuit from gates is suggested. Delay testability of such circuits is investigated. It is specified that the PDF of each path of the circuit is detected without injecting additional inputs into the circuit. It is well known that the BDD is a directed acyclic graph based on the Shannon decomposition in each nonterminal node v: 0 1 i i x x v i v i v f x f x f = = = ∨ . Here fv is the function corresponding to the node v, and the decomposition variable xi marks the node v. The dashed edge drops in the node corresponding to the function 0 i x v f = , and the bold edge drops in the node corresponding to the function 1 i x v f = . The BDD is called ordered (OBDD) if variables are encountered in the same order in all paths connecting the BDD root with the terminal node. The BDD is called reduced (RBDD) if it does not contain either isomorphic subgraphs or nonterminal nodes such that 0 1 i i x x v v f f = = = . An example of reduced and ordered BDD (ROBDD) is shown in Fig. 1. When deriving the Free BDD, a suitable decomposition variable is chosen for each nonterminal node v independently of other nonterminal nodes. That may cut the number of Free BDD of nonterminal nodes in comparison with the ROBDD (for the same function). Let 1 { ,..., } m F f f = be a system of Boolean functions describing combinational circuit behavior. Derive the ROBDD using the same order of variables for each Boolean function from F. Join isomorphic subgraphs in different ROBDDs. Combine different ROBDDs of 1-terminal nodes into one 1-terminal node and their 0-terminal nodes into one 0-terminal node. As a result, we obtain the graph with m roots and two terminal nodes. This graph represents a system of m Boolean functions. It is called the shared ROBDD. Without loss of generality, we will further consider systems with one function as an example. In Fig. 1, the ROBDD for one Boolean function is shown. The ROBDD represents the disjoint sum of products (DSoP) of the function f as follows:

Exponential space complexity for OBDD-based reachability analysis

Optimal ordered binary decision diagrams for read-once formulas

This paper introduces a technique for localizing model checking of concurrent state-based systems. The technique, called partial model checking, is fully automatic and performs model checking by gradually specializing the specification with respect to the concurrent components one by one, computing a “concurrent weakest precondition.” Specifications are invariance properties and the concurrent components axe sets of transitions. Both are expressed as predicates represented by Reduced Ordered Binary Decision Diagrams (ROBDDs). The self-reducing properties of ROBDDs are important for the success of the technique.

Reduction of OBDDs in linear time

Branching problems are considered as a nonuniform model of computation in complexity theory as well as a data structure for boolean functions in several applications. In many applications (e.g., verification), exact representations are required. For learning boolean functions f on the basis of classified examples, it is sufficient to produce the representation of a function g approximating f. This motivates the investigation of the size of the smallest branching program approximating f. Although several non-approximability results are contained in the papers on randomized branching programs, these results often do not work for the uniform distribution (which is the most important one in applications). Here, the following non-approximability results are presented. (1) It is proven that a simple function from the branching program literature requires exponential size to be approximated with respect to the uniform distribution by OBDDs, which are the most important type of branching programs in applications. (2) The first truly exponential lower bound on the size of approximating syntactic read-k-times branching programs with respect to the uniform distribution and error probability 1/2-2/sup -/spl Omega/(n)/, n the input size, is shown. In order to improve upon the so far best results for error probabilities smaller than 1/3, a strong combinatorial lemma from a recent paper of Ajtai on linear-length branching programs is exploited.

On the Nonapproximability of Boolean Functions by OBDDs and Read-k-Times Branching Programs

Hardness of identifying the minimum ordered binary decision diagram

Reduced ordered binary decision diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI design automation. The variable ordering largely influences the size of the BDD, varying from linear to exponential. In this paper we study BDD minimization problem based on scatter search optimization. The results we obtained are very encouraging in comparison with other heuristics (genetic and simulated annealing). This work is the first successful experience of using scatter search approach in design automation area. The approach can be applied to many design automation applications.

Ordered Binary Decision Diagrams (OBDDs) have found widespread use in CAD applications such as formal verification, logic synthesis, and test generation. OBDDs represent Boolean functions in a form that is both canonical and compact for many practical cases. They can be generated and manipulated by efficient graph algorithms. Researchers have found that many tasks can be expressed as series of operations on Boolean functions, making them candidates for OBDD-based methods. The success of OBDDs has inspired efforts to improve their efficiency and to expand their range of applicability. Techniques have been discovered to make the representation more compact and to represent other classes of functions. This has led to improved performance on existing OBDD applications, as well as enabled new classes of problems to be solved. This paper provides an overview of the state of the art in graph-based function representations. We focus on several recent advances of particular importance for formal verification and other CAD applications.

A Binary Decision Diagram (BDD) is one of possible representations of a Boolean function. Unlike other representations, such as truth table or symbolic expression, it is able to represent functions of many variables in an efficient way and can be simply processed on a computer. In case of a Boolean function that can be decomposed into smaller functions joined by an associative operation, the final BDD can be obtained by creating BDDs of smaller functions and then by their merging using the associative operation. Since the operation is associative, the merging can be done in two principal ways. The first one is linear fold, in which the BDDs of smaller functions are processed sequentially. This includes strategies known as left fold (processing from left to right), right fold (processing from right to left), and random linear fold (sequential processing in random order). The second one is tree fold, which processes the BDDs of smaller functions in a hierarchic way. Although, the number of processed BDDs is same in both types of fold, it has been shown that time needed for processing BDDs using linear fold and tree fold can be very different. To further investigate this interesting result, we focus in this paper on creation of BDDs of Boolean functions defined in standard set of benchmarks known as IWLS'93 and compare time that is needed for creation of BDDs representing these functions using linear fold and tree fold.

Model checking with the standard Kripke models used in (Dynamic) Epistemic Logic leads to scalability issues.Hence alternative representations have been developed, in particular symbolic structures based on Binary Decision Diagrams (BDDs) and succinct models based on mental programs.While symbolic structures have been shown to perform well in practice, their theoretical complexity was not known so far.On the other hand, for succinct models model checking is known to be PSPACEcomplete, but no implementations are available.We close this gap and directly relate the two representations.We show that model checking DEL on symbolic structures encoded with BDDs is also PSPACE-complete.In fact, already model checking Epistemic Logic without dynamics is PSPACE-complete on symbolic structures.We also provide direct translations between BDDs and mental programs.Both translations yield exponential outputs.For the translation from mental programs to BDDs we show that no small translation exists.For the other direction we conjecture the same.

Memory repair by using spare rows/columns to replace faulty rows/columns has been proved to be NP-complete. Traditional perfect algorithms are comparison-based exhaustive search algorithms and are not efficient enough for complex problems. To overcome the deficiency of performance, a new algorithm has been devised and presented in this paper. The algorithm transforms a memory repair problem into Boolean function operations. By using BDD (binary decision diagram) to manipulate Boolean functions, a repair function which encodes all repair solutions of a memory repair problem can be constructed. The optimal solution, if it exists, can be found efficiently by traversing the BDD of a repair function only once. The algorithm is very efficient due to the fact that BDD can remove redundant nodes, combine isomorphic subgraphs together, and have very compact representations of Boolean functions if a good variable ordering is chosen. The remarkable performance of the algorithm can be demonstrated by experimental results. Because a memory repair problem can be modeled as a bipartite graph, the algorithm may be useful for researchers in other fields such as graph theory.

Translation among CNFs, characteristic models and ordered binary decision diagrams

The ordered binary decision diagram (OBDD) has proven useful in many applications as an efficient data structure for representing and manipulating Boolean functions. A serious drawback of OBDD's is the need for application-specific heuristic algorithms to order the variables before processing. Further, for many problem instances in logic synthesis, the heuristic ordering algorithms which have been proposed are insufficient to allow OBDD operations to complete within a limited amount of memory. The paper proposes a solution to these problems based on having the OBDD package itself determine and maintain the variable order. This is done by periodically applying a minimization algorithm to reorder the variables of the OBDD to reduce its size. A new OBDD minimization algorithm, called the sifting algorithm, is proposed and appears especially effective in reducing the size of the OBDD. Experiments with dynamic variable ordering on the problem of forming the OBDD's for the primary outputs of a combinational circuit show that many computations complete using dynamic variable ordering when the same computation fails otherwise.