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  • https://doi.org/10.1109/ahs.2010.5546249Copy DOI Icon

Thermal-aware fault-tolerant system design with coarse-grained reconfigurable array architecture

  • Jun 1, 2010
  • Ganghee Lee +1 more
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Abstract

Coarse-grained reconfigurable array architectures have drawn increasing attention due to their performance and flexibility. A typical coarse-grained reconfigurable array architecture has many PEs in the array, which is suitable for implementing spatial redundancy used for fault-tolerant systems design. In this paper, we propose to implement replications and a voting function on the PE array of a coarse-grained reconfigurable array architecture to design a fault-tolerant system. We also introduce thermal-aware application mapping onto the coarse-grained reconfigurable array architecture for reliability. The experiment with Viterbi decoder shows that our approach enables implementing fault-tolerance with 12% area overhead which comes from implementing conditional execution.

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