Ultra shallow junction (USJ) formation using plasma assisted doping on 3D devices structures

Advanced SOI material can be treated in advantageous manner regarding ultra shallow junction (USJ) formation using millisecond annealing techniques. Especially, strained Si and SiGe/Si heterostructures on insulator (sSOI and sHOI) are promising channel materials for future nanoelectronic devices. Their successful integration into new device architectures depends on the ability of forming ultra shallow and ultra steep junctions. We present results for dopant activation in SOI, sSOI, HOI and sHOI. Flash Lamp Annealing (FLA) allows complete suppression of diffusion while obtaining sheet resistances lower than 500 Ω/□ in both, SOI and sSOI. Strained and unstrained SiGe heterostructures indicated significant diffusional broadening of Sb implant profiles and low electrical activation. In contrast, B shows higher activation but significant dopant loss in the near surface region. Moreover, we demonstrate that, after diamond and silicon, the third elemental group-IV semiconductor, germanium, exhibits superconductivity at ambient pressure. For the first time, techniques of the state-of-the-art semiconductor processing as ion implantation and FLA were used to fabricate such material, i.e. a highly Ga-doped Ge (Ge:Ga) layer in near-intrinsic Ge. It is shown that superconductivity can be generated and tailored in the Ge host at temperatures as high as 0.5 K. Results of critical-field measurements demonstrate the quasi-two-dimensional character of superconductivity in the 60 nm thick Ge:Ga layer.

One of the main challenges to the scaling of CMOS devices involves the formation of ultra shallow junctions (USJ) in the source drain extension region of a transistor. This paper describes the response of a Therma-Probet metrology tool for the non-destructive measurement of USJ samples. Samples consisted of Boron and BF2 USJ samples fabricated with low energy implants and rapid thermal spike anneals. These junctions were measured by SIMS analysis, and their junction depths were correlated to the therma-wave signal. The thermawave response was found to be linear. The results demonstrate the ability of the Therma-Probe technique to accurately measure shallow junctions as low as 11.5nm. These types of shallow junctions are targeted around 2007, as outlined in the 2001 ITRS roadmap.

We report for the first time results on infusion doping of boron for ultra shallow junctions (USJ). Using B/sub 2/H/sub 6/ or BF/sub 3/ source gas, the resulting USJ boron dopant profile measured by SIMS shows no evidence of channeling with extreme abruptness of <2.5nm/decade for a 12 nm shallow junction. Infusion doping shows a power log to the 1/3 relationship between energy to junction depth in contrast to the traditional linear fit observed with ion implantation due to nuclear stopping power effects. Boron surface doping levels of 1-2E22/cm/sup 3/ for 2E16/cm/sup 2/ doses were achieved. Dopant activation using low temperature furnace annealing from 450/spl deg/C to 950/spl deg/C were compared using standard 4PP and non-penetrating elastic material 4PP for sheet resistance measurements,on these USJ structures. Also, electrically active dopant profiling was conducted using spreading resistance profile (SRP) for USJ junction depth (Xj) comparison to SIMS. Use of amorphizing implantation resulted in lower Rs values after low temperature SPE annealing.

Fabrication of ultra shallow junctions with low contact resistances is desired to advance current CMOS technology. The low Boron activation on Group V for ultra shallow junction formation will makes the chip fabrication works effectively. SilvacoTCAD (Technology Computer Aided Design) manages simulation tasks and analyzing simulation results when ultra-shallow junction formation is using low-boron activation on Phosphorus, Antimony and Arsenic.A stimulate process like implantation, diffusion and dopant activation and epitaxial growth in different semiconductor materials has been analyzed as well as investigate the effects of energy of boron ion beams on ultra shallow junction formation.As a result, the electrical characteristics of NMOS structure by obtaining graph of IDVGSand IDVDShas been studied when there are variations in junction length (Xj), and gatelength (Lg).

Laser annealing is one of the process solutions to enable ultra shallow junction (USJ) formation for the 45 nm technology node. However, variations in the front-side optical properties of device wafers cause large temperature variations on the wafer surface which, in turn, cause large variations in activation of the dopants that form the junction. As a result, pyrometry and closed loop temperature control are critical to establish process uniformity and repeatability for laser annealing. Pyrometry results are presented along with the correlation between the process results (dopant activation) and the pyrometer signal. Closed loop control and future technical challenges are discussed

The silicide‐As‐diffusion‐source (SADS) process was studied for ultra shallow junction fabrication using , ,, , and . The diffusion of both boron and arsenic from silicide into silicon was measured after cobalt silicide removal and was seen to be enhanced over conventional diffusion in Si. At 1100°C, the enhancement was greater for arsenic (≈100 times) than for boron (≈5 times); at 850°C, more normal diffusion was observed. The activation energy of the effective diffusivity is 5.3 eV for As and 4.7 eV for boron. Dopant evaporation affected the interface dopant concentration and thereby the diffusion depth in Si. The time limit, at which the silicide sheet resistance increased by 30% due to its thermal instability, was found to have an activation energy of approximately 5 eV in , 3.5 eV in , and 3.1 eV in . The thermal degradation of was slower for annealing in than in Ar, and the degradation diffusivity was found to have nearly the same activation energy as dopant diffusion in Si from . For uncapped silicides, all SADS diodes except As+, or and B+ junctions, showed high leakage current.

Heavily n-doped epitaxially grown Si layers are of great importance for source/drain (S/D) application in advanced node nMOS devices. For contact resistivity reduction, the dopant activation level is very important. Various techniques are being used to evaluate dopant activation in Si:P layers. Among these two methods are Scanning Spreading Resistance Microscopy (SSRM) and Differential Hall Effect Metrology (DHEM). SSRM uses an atomic force microscope equipped with a hard conductive probe that is scanned in contact mode on the cross-sectioned sample’s surface and measures spreading resistance. Measured resistance values as a function of depth are converted into resistivity and carrier concentration depth profiles using calibration measurements and conversion relationships. DHEM provides depth profiles of mobility, resistivity and carrier concentration through a semiconductor layer by making successive sheet resistance (Rs) and Hall voltage measurements using Hall effect/Van der Pauw techniques, as the electrically active thickness of the layer is reduced through successive oxidation steps. Controlled oxidation is achieved by electrochemical anodization. Data collected can then be processed to yield the depth profiles. In this contribution we have carried out SSRM and DHEM measurements on Si:P epi layers subjected to different processing conditions including annealing and ohmic contact fabrication. Secondary Ion Mass Spectrometry (SIMS) was used to measure the total (active + inactive) dopant profiles through the films. Effects of these processes on dopant diffusion and activation were studied and the results from DHEM and SSRM were compared.In-situ phosphorus (P) doped Si epi-layers were grown over 300mm diameter boron doped monitor wafers. While one set was kept as the reference, a second set was treated by a spike-annealing process at 1000 °C. In a third set a Ti/TiN contact fabrication process was carried out and the contact was removed before analysis. In the fourth set contact process was applied to the spike annealed wafer before removal of the Ti/TiN layers. Bulk sheet resistance measurements were made using 4-point probe (4PP) for all the samples. SSRM measurements were carried out at IMEC. Cross-shaped Van der Pauw test-patterns were formed on 8mmx8mm areas on the samples and DHEM measurements were performed at ALP. Figure below shows the dopant depth profiles obtained by SIMS and the carrier concentration profiles from DHEM and SSRM techniques for samples D02 (as deposited Si:P) and D03 (spike annealed). One can make some general observations from the data in this figure. The total dopant concentration as measured by SIMS is ~ 1.4E21/cm3. There is only a small difference in the total dopant distribution profiles (SIMS) between the as deposited sample and the spike annealed sample. However, the spike annealed sample shows much higher dopant activation as measured by DHEM. Carrier concentration is ~2.5x higher in sample D03 (~5E20/cm3) compared to sample D02 (~2E20/cm3). Activation levels measured by SSRM, however, are lower for both samples, and the peak carrier concentration value increases only slightly upon spike annealing, going from ~2E20/cm3 in sample D02 to ~2.2E20/cm3 in sample D03. DHEM clearly indicates the sharp interface between the p-type substrate and the n-type epi-layer and its depth calibration agrees well with the expected thicknesses of the epi layers. The tail of the SSRM data is much more graded. Data from other samples will be presented and discussed in the final manuscript. Figure 1

Materials and device issues in the formation of sub-100-nm junctions

In this letter, we present direct and unambiguous experimental evidence for nonthermal illumination effects in boron or arsenic implanted silicon. Both, dopant diffusion and activation vary significantly with illumination. Depending on annealing temperature, diffusion is either enhanced or inhibited. The results have significant implications for modeling and formation of ultrashallow junctions.

Formation of ultra shallow junctions (USJ) with sufficiently low resistance in the source/drain extension (SDE) region is necessary for MOSFETs at the 45-nm node and beyond. Several doping technologies, such as plamsa doping, cluster ion implantation and gas cluster ion beam (GCIB) doping have been studied as possible replacements for conventional sub-keV ion implantation. In this work we used GCIB boron doping to form the SDE and have demonstrated the importance of controlling the removal process of photo resist (PR). Additionally to previous work, advantages of GCIB doping with an optimized fabrication process compared to low energy ion implantation are reported.

KrF excimer laser annealing has been investigated for ultra-shallow low resistive junction formation necessary for MOS device scaling. The junction sheet resistance can be improved by multi-pulse irradiation or introduction of heat assist. By the heat assist method, laser energy density to obtain 500 W/sq. for 20 nm depth junction was reduced about by half.

Atomistic Kinetic Monte Carlo (KMC) diffusion modeling is used for dopant diffusion and defect analysis in ultra shallow junction formation in Si and SiGe. An analysis of dopant diffusion and defects in SiGe-channel Quantum Well (QW) using an atomistic KMC approach are shown. Thin SiGe layer with high Ge content for SiGe-channel QW has an impact on implantation damage and Boron-Transient Enhanced Diffusion (TED) suppression, and defect evolution. KMC shows that As-pocket in SiGe-channel pFET shows enhanced diffusion toward SiGe-channel and higher As concentration in SiGe-channel. The difference of pocket diffusion is one of possible reason for the higher Vth mismatch for SiGe-channel with As pocket than for Si-channel. To avoid implant damage influence, Implant-Free SiGe channel-QW with B-doped SiGe epi for extension-S/D formation is used. KMC simulation and SSRM shows that B migration from B-doped SiGe raised-S/D to SiGe-channel can form S/D-extension overlap.

An advanced CMOS structure, in which a raised source/drain and contact windows formed over the field oxide, was fabricated. Ultrashallow junction formation using solid-phase diffusion from doped SiGe layers was used to fabricate MOSFETs. These MOSFETs demonstrated excellent short-channel characteristics and 70%-80%-reduced parasitic drain-junction capacitance. They have ultrashallow junctions with a depth of 25 nm and a low source/drain extension (SDE) resistance: 350 /spl Omega//sq (NMOSFETs) and 390 /spl Omega//sq (PMOSFETs). The isotropic diffused SDE structure was formed by using solid-phase diffusion, which could effectively form a shallow junction and a suitable overlap between gate and SDE. This structure results in good short-channel characteristics and high current drivability.

The redistribution of B and As ions implanted into thin layers of WSi2 and CoSi2 on poly- or monocrystalline Si and the outdiffusion into the Si substrate during furnace annealing (FA) and rapid thermal processing (RTP) were investigated by several analytical techniques. Shallow junctions (depth xj &amp;lt; 100 nm) with interface concentrations Cint close to the solid solubility of the respective dopant in Si (Cint≳3×1020 cm−3 for As; (Cint ≳ 8 × 1019 cm−3 for B) were obtained with RTP. For FA above 800 °C, the diffusion of B from CoSi2 into Si results in a drop of Cint &amp;lt; 2 × 1019 cm−3 because of strong B segregation and probably reactive loss at the SiO2/CoSi2 interface. No evidence on metal-dopant-compound formation could be found. The dopant redistribution is demonstrated to be a superposition of lattice and grain-boundary diffusion, solubility limits, layer inhomogeneities, dopant segregation at the interface and grain boundaries, and probably phase transformation of the dopants segregated at the SiO2/silicide interface. Electrical results such as, e.g., CoSi2 diode leakage currents (≊1 nA/ cm2) and contact resistances ( 2–5 × 10−7 Ω cm2 for RTP) clearly show that the formation of shallow silicided junctions by diffusion from an implanted silicide is a highly useful technological approach.

Ion Implantation Defects and Shallow Junctions in Si and Ge