Understanding Jitter and Phase Noise

This paper describes the new paradigm of control-ling and optimization of the jitter noise in the transimpedance amplifier-TIA circuit of the light-to-frequency converter design. In this study, the primary circuit blocks of the light to frequency converter include the transimpedance amplifier-TIA, a low dropout regulator an integrator and a pulse generator. The noise optimisation scheme in this work exploits a new methodology to control the jitter noise in the driver-circuit of the TIA. The study involves both the mathematical and the simulation analysis to prove the theory suggested. Jitter noise performance of the design was perceived through periodic steady state analysis (PSS) and periodic noise analysis (Pnoise). An outstanding mutual agreement between the mathematical analysis and the obtained waveform results was seen throughout the study. RMS Jitter noise behavior was focused and pitched from the periodic phase noise waveforms obtained during the analysis. The conversion of the phase noise into the jitter and the effect of spur jitter on the RMS jitter is exclusively discussed in this study. The design requires a 3.3 V supply voltage and an initial input current of 125pA. The CMOS transistor level implementation of the design was simulated with 40nm SMIC technology node in cadence Virtuoso IC-615.

Radio frequency (RF) receivers are common in many modern communications and radar systems, and they suffer from many performance degradation factors due to hardware limitations. Among all performance degradation contributors, phase noise and time jitter are particularly troublesome since they cause random errors which are difficult to compensate. The local oscillator in the receiver front end is a major contributor of phase noise, while the analog-to-digital converter (ADC) introduces time jitter. It is desired to know the accumulated effect of individual phase noise sources and time jitter. The total effect of all phase noise and jitter can be represented by an accumulated phase noise term at the ADC's output, called total phase noise (TPN) in this brief. The focus of this work is on measuring and modeling TPN in the RF receiver by applying optimization techniques. In contrast to traditional phase noise measurement that typically requires a high-quality tunable downconverter, a digital approach using the data captured directly by the RF receiver is proposed. In addition, iterative optimization-based TPN spectral model fitting and statistic modeling are introduced. The model is examined using the measured TPN. It is confirmed that the RF receiver TPN can be viewed as a wide-sense stationary zero-mean Gaussian process with certain spectral profile.

In this article, jitter and phase noise of all-digital phase-locked loop due to power supply noise (PSN) with deterministic frequency are analysed. It leads to the conclusion that jitter and phase noise heavily depend on the noise frequency. Compared with jitter, phase noise is much less affected by the deterministic PSN. Our method is utilised to study a CMOS ADPLL designed and simulated in SMIC 0.13 µm standard CMOS process. A comparison between the results obtained by our method and those obtained by simulation and measurement proves the accuracy of the predicted model. When the digital controlled oscillator was corrupted by PSN with 100 mVpk-pk, the measured jitters were 33.9 ps at the rate of fG = 192 MHz and 148.5 ps at the rate of fG = 40 MHz. However, the measured phase noise was exactly the same except for two impulses appearing at 192 and 40 MHz, respectively.

Microwave generator is the foundation of all the applications in the area in microwave. It is widely used in electronic systems. Note that, the phase noises in microwave sources them are so important that if the phase noises in them are reduced, the performance of many electronic systems will be significantly improved, such as radar and so on. Optoelectronic oscillators, with a characteristic of ultra-low phase noise, have attracted great attention in recent years. In this paper, a novel scheme of optoelectronic oscillator based on dual-loop structure with different wavelengths is demonstrated. In this structure, two beams of continuous-wave light at different wavelengths, emitted by two lasers separately, are combined together by a wavelength division multiplexer and then are injected into an electro-optical modulator. After injection, the optical carriers at different wavelengths are divided into two paths again by using a second wavelength division multiplexer. The two optical beams at different wavelengths go through two optical fibers of different lengths, and then the two paths are combined together by a third wavelength division multiplexer. This constitutes the dual-loop structure. According to Vernier effects, this dual-loop structure can achieve effective side-mode suppression, since only the modes that satisfy the oscillation conditions of the two loops will be selected. Theoretical work has demonstrated that there are few beating noises when the two optical carriers at different wavelengths are combined. Compared with the scheme of dual-loop optoelectronic oscillator with orthogonal states of polarizations (SOPs), the interference between the two beams with different wavelengths in a wavelength division multiplexer system is much less than those with orthogonal SOPs in polarization-beam splitter/polarization-beam combiner devices. Therefore, the scheme in our experiment can reduce the beating noise due to random interference. Meanwhile, the stability in the dual-loop structure with different wavelengths could be achieved by using ordinary single-mode fiber, instead of adopting polarization maintaining fiber in the dual-loop structure with orthogonal SOPs. Hence, the cost of the system is reduced. In this experiment, the high-quality and tunable microwave signal within the X-band (8-12 GHz) is achieved. The measurement results indicate that the side-mode suppression ratio of the signal is 60 dB and the phase noise is -132.6 dBc/Hz@10 kHz. The loop drift of the system is compensated effectively by a fiber stretcher using phase-loop locked technology and the stability of the RF has been improved greatly. Then the frequency drift in terms of the loop drift in the system becomes less than ±84.3 mHz within 2 h. In addition, the linewidth is measured as 5.3 mHz and the Q-factor is on the order of 1012. Therefore, the signal is of a high spectral purity.

Recent advances in intelligence technology have boosted the development of micro- Unmanned Air Vehicles (UAVs) including Sliver Fox, Shadow, and Scan Eagle for various surveillance and reconnaissance applications. These affordable and reusable devices have to fit a series of size, weight, and power constraints. Cameras used on such micro-UAVs are therefore mounted directly at a fixed angle without any motion-compensated gimbals. This mounting scheme has resulted in the so-called <i>jitter effect</i> in which jitter is defined as sub-pixel or small amplitude vibrations. The jitter blur caused by the jitter effect needs to be corrected before any other processing algorithms can be practically applied. Jitter restoration has been solved by various optimization techniques, including Wiener approximation, maximum <i>a-posteriori</i> probability (MAP), etc. However, these algorithms normally assume a spatial-invariant blur model that is not the case with jitter blur. Szu et al. developed a smart real-time algorithm based on auto-regression (AR) with its natural generalization of unsupervised artificial neural network (ANN) learning to achieve restoration accuracy at the sub-pixel level. This algorithm resembles the capability of the human visual system, in which an agreement between the pair of eyes indicates "signal", otherwise, the jitter noise. Using this non-statistical method, for each single pixel, a deterministic blind sources separation (BSS) process can then be carried out independently based on a deterministic minimum of the Helmholtz free energy with a generalization of Shannon's information theory applied to open dynamic systems. From a hardware implementation point of view, the process of jitter restoration of an image using Szu's algorithm can be optimized by pixel-based parallelization. In our previous work, a parallelly structured independent component analysis (ICA) algorithm has been implemented on both Field Programmable Gate Array (FPGA) and Application-Specific Integrated Circuit (ASIC) using standard-height cells. ICA is an algorithm that can solve BSS problems by carrying out the all-order statistical, decorrelation-based transforms, in which an assumption that neighborhood pixels share the same but unknown mixing matrix <b>A</b> is made. In this paper, we continue our investigation on the design challenges of firmware approaches to smart algorithms. We think two levels of parallelization can be explored, including pixel-based parallelization and the parallelization of the restoration algorithm performed at each pixel. This paper focuses on the latter and we use ICA as an example to explain the design and implementation methods. It is well known that the capacity constraints of single FPGA have limited the implementation of many complex algorithms including ICA. Using the reconfigurability of FPGA, we show, in this paper, how to manipulate the FPGA-based system to provide extra computing power for the parallelized ICA algorithm with limited FPGA resources. The synthesis aiming at the pilchard re-configurable FPGA platform is reported. The pilchard board is embedded with single Xilinx VIRTEX 1000E FPGA and transfers data directly to CPU on the 64-bit memory bus at the maximum frequency of 133MHz. Both the feasibility performance evaluations and experimental results validate the effectiveness and practicality of this synthesis, which can be extended to the spatial-variant jitter restoration for micro-UAV deployment.

In wireless communications, massive multiple-input multiple-output (MIMO) systems in which the base station (BS) is equipped with a large number of antennas can provide significant spectral and energy efficiency by means of simple signal processing. Therefore, massive MIMO is an attractive technology for next-generation wireless communication systems and for green communications. However, phase noise (PN) introduced by the impairment of oscillators can cause a severe performance loss in wireless communication systems. Solving the PN problem for massive MIMO systems in both the downlink and uplink is challenging as it is a multivariate joint PN estimation and data detection problem. The optimal solution is difficult to derive and may lead to high complexity. In this paper, we propose a zero-forcing (ZF) based precoding scheme with PN suppression to solve the PN problem for massive MIMO downlink systems. By using the ideal PN free output signal-to-noise ratio (SNR) of the ZF precoding as a performance upper bound, analytical and numerical results show that when the required SNR is satisfied, the output SNR of the proposed scheme can approach the upper bound, except for very large PN variances. Moreover, the complexity of the proposed scheme is low on both the BS and the user sides, and the BS does not need any feedback information from the users.

In this paper, we present the design of 2 PLL for low power Bluetooth applications, one in 130 nm PDSOI and the other in 28 nm FDSOI technologies. The PDSOI one is based on a classical LC tank VCO and uses the possibility of body contact to modulate the current core of the VCO in order to decrease the phase noise. Good performances in terms of phase noise are achieved with this technique, but we do not gain any size nor power consumption compared to a more classical bulk solution. This LC tank VCO is mandatory for such telecommunication applications. We propose to use a ring oscillator VCO to build a PLL in FDSOI technology. Despite the fact that such VCO topology exhibits a larger phase noise, this design will address aggressively the size and power consumption reduction. Indeed we are using the efficient backgate biasing offered by the FDSOI MOS transistor to compensate the mismatches between the different inverters of the ring oscillator to decrease jitter and phase noise.

In this paper, a novel phase-sensitive optical time-domain reflectometry ($\Phi $Φ-OTDR) based on the optimized dual-pulse heterodyne detection scheme (DHDS) is proposed, which is designed to implement distributed vibration sensing with low phase noise and high sensitivity. The optimized DHDS employs an unbalanced interferometer to separate a light pulse into dual probe pulses so that they are generated by the laser at the same time. This ensures that the measurement sensitivity of a phase-interrogation-based $\Phi $Φ-OTDR can be improved simply by increasing the space interval of the dual probe pulses while the phase noise of the $\Phi $Φ-OTDR does not deteriorate. In addition, the proposed DHDS utilizes only one acousto-optic modulator (AOM) to shift the frequencies of the dual probe pulses so as to eliminate the effects of frequency shift jitters, and thus guarantees low phase noise level of a $\Phi $Φ-OTDR. The distributed vibration sensing performances of the $\Phi $Φ-OTDR with the proposed DHDS are theoretically and experimentally studied in terms of multi-event signal restoration and phase noise level. The proposed approach solves the contradiction between the measurement sensitivity and phase noise of a $\Phi $Φ-OTDR and promotes the $\Phi $Φ-OTDR to the applications of distributed weak vibration sensing.

The optical source phase noise is one of the main factors influencing the noise performance of fiber-optic interferometric measurement systems. The phase noise is directly proportional to the optical path length difference of the interferometer and wavelength instability of the optical source. Conventional phase noise suppression techniques involve the use of highly stable optical sources and reduction of path length differences of sensing interferometers. However, such methods are not always appropriate for all interferometric configurations. Alternative phase noise suppression techniques suggest the use of an auxiliary reference interferometer for independent measurements of the phase noise. In this case, the phase noise signal can be directly subtracted from the sensor signal. But equal path length differences are required for all interferometers in the measurement system. In this paper, an adaptive phase noise cancellation technique for fiber-optic interferometric sensors is presented. The proposed technique is based on the real-time evaluation of optical path length differences for all interferometers in the measurement system. This approach doesn't require identical path length differences and takes into account their variations caused by environmental conditions. Thus, the optical source phase noise can be independently measured by the reference interferometer and subtracted from the sensor signal with the required attenuation. The results of experimental investigations of the proposed technique for two types of interferometric schemes are presented. It is shown that the proposed technique demonstrates the phase noise reduction up to 30 dB in the frequency range up to 500 Hz.

This paper presents an in-depth analysis of effect of oscillator phase noise (PN) on the performance of orthogonal frequency division multiplexing (OFDM) systems in sub-terahertz (Sub-THz) band. We use the empirical PN measurement of current Sub-THz signal sources to propose a two-part PN model that captures the unique characteristics of PN in Sub-THz band. Subsequently, the proposed model is used to analyze the performance of OFDM systems affected by PN. Our analysis reveals some key distinctions between the effect of PN on the OFDM systems operating at Sub-THz and the same systems operating at conventional microwave frequency bands. In particular, we show that in these systems: 1) the PN floor has a significant effect on the performance degradation, 2) the assumption of PN being a low-pass process is inaccurate, and 3) the existing OFDM PN mitigation schemes are less effective. To verify our analysis the upper bound on the signal-to-interference-and-noise ratio (SINR) after using the existing PN mitigation schemes under limited computational complexity constraint is derived and the effect of PN floor on the SINR is analytically calculated.

Phase noise causes significant degradation in the performance of Orthogonal Frequency Division Multiplexing (OFDM) based wireless communication systems. In the proposed compensation scheme, the communication between the transmitter and receiver blocks consists of two stages. In the first stage, block-type pilot symbols are transmitted and the channel coefficients are jointly estimated with the phase noise in the time domain. In the second stage, comb-type OFDM symbols are transmitted such that the receiver can jointly estimate the data symbols and the phase noise. It is shown by computer simulations that the proposed scheme can effectively mitigate the inter-carrier interference caused by phase noise and improve the bit error rate of OFDM systems.

The high frequency oscillator circuit is relatively more susceptive to Electro-Magnetic Interference (EMI) in Embedded Systems (ES). The effect of EMI can be both deterministic and random in nature that shows up as jitter in the time domain and translates into the phase noise in the frequency domain. If the impact of EMI is too large, the performance of the entire system would be affected in terms of accuracy, stability, start-up, and phase noise. In this paper, the likelihood of observing such a failure in a noisy electromagnetic environment is discussed for giving brief insights about the EMI dynamics and EMI-induced failure mode of the crystal oscillator circuits. The goals of this paper is to provide the design philosophy by which time jitter and phase noise due to radiated EMI can be reduced to below operational levels.

Phase Locked Loop (PLL) circuit plays an important part in electronic communication system in providing high-frequency clock, recovering the clock from data signal and so on. The performance of PLL affects the whole system. As the frequency of PLL increases, designing a PLL circuit with lower jitter and phase noise becomes a big challenge. To suppress the phase noise, the optimization of Voltage Controlled Oscillator (VCO) is very important. As the power supply voltage degrades, the VCO becomes more sensitive to supply noise. In this work, a three-stage feedforward ring VCO (FRVCO) is designed and analyzed to increase the output frequency. A novel supply-noise sensing (SNS) circuit is proposed to suppress the supply noise’s influence on output frequency. Based on these, a 1.2 V 2 GHz PLL circuit is implemented in 110 nm CMOS process. The phase noise of this CMOS charge pump (CP) PLL is 117 dBc/Hz@1 MHz from test results which proves it works successfully in suppressing phase noise.

Jitter is the limiting effect for high speed analog-to digital converters with high resolution and wide digitization bandwidth, which are required in receivers in order to support high data rates. The rapid development of digital wireless system has led to a need of high resolution and high speed analog to digital converter. The proper selection of data converters, both analog to digital converters and digital to analog converters (DACs) is one of the most challenging steps in designing software radio. The performance of a data converter is dependent upon the accuracy and stability of the clock supplied to the circuits. When data converter employ a high sampling rate, clocking issues become magnified and significant distortion can be result. This paper describes the effect of aperture jitter on the performance of sigma delta ADC and present analytical evaluation of the performance and mean error power spectrum due to aperture jitter application has favored the use of oversampling delta sigma ADC (analog-to-digital converters) due to their better speed-accuracy tradeoff. Delta-sigma modulator is one of the key building blocks, which can be implemented using DT (discrete-time) and CT (continuous-time) techniques. Compared to their DT counterparts, CT delta-sigma modulators have recently attracted more and more attentions due to their advantages in terms of high speed, low power, low noise and intrinsic anti-aliasing capability. In this paper, we concentrate on the discrete implementation. Section 2 presents an aperture jitter effect in SDM in terms of SNR. In the last few years different authors derived formulas to quantify the SNR limiting effect of jitter in ADCs. While Walden used a worst case approach, Kobayashi presented an exact formula which allows calculating the SNR in the presence of an aperture jitter.

Oscillator phase noise (PN) is one of the major problems that affect the performance of communication systems. In this paper, a direct connection between oscillator measurements, in terms of measured single-side band PN spectrum, and the optimal communication system performance, in terms of the resulting error vector magnitude (EVM) due to PN, is mathematically derived and analyzed. First, a statistical model of the PN, considering the effect of white and colored noise sources, is derived. Then, we utilize this model to derive the modified Bayesian Cramer-Rao bound on PN estimation, and use it to find an EVM bound for the system performance. Based on our analysis, it is found that the influence from different noise regions strongly depends on the communication bandwidth, i.e., the symbol rate. For high symbol rate communication systems, cumulative PN that appears near carrier is of relatively low importance compared to the white PN far from carrier. Our results also show that 1/f^3 noise is more predictable compared to 1/f^2 noise and in a fair comparison it affects the performance less.