- https://doi.org/10.1109/iccons.2017.8250715
Verification of programmable timing generator
- Jun 1, 2017
- Divyaben Shah +1 more
Charge Coupled Devices (CCD) work by converting light into a pattern of electronic charge on a silicon chip. CCDs have features like high sensitivity, high linear dynamic range, electronic shuttering capability and low dark current. One of the main units in a CCD-based satellite imaging system is Timing Generator producing various kinds of readout clocks and control signals for various CCD architectures like linear, full frame, interline, TDI, etc. based on the application. Timing generator defines the performance of the system as it gives clocks to the CCD detector and signal processing unit. This paper discusses how to verify the generic and precision timing generator and find the bugs, try to correct it and find the functional coverage. Verification is using the system Verilog language and an automated verification environment will be developed by the constrain random test case. For simulation VCS tools are used.
- # Charge Coupled Devices
- # High Linear Dynamic Range
- # System Verilog Language
- # Signal Processing Unit
- # Low Dark Current
- # Charge Coupled Devices Signal
- # Full Frame
- # CCD-based Imaging System
- # Silicon Chip
- # CCD-based Imaging
