X-ray characterization of a multichannel smart-pixel array detector.

High-resolution pixel detectors for second generation digital mammography

This report documents the results and findings of a one-year scoping study investigating multichannel readout application specific integrated circuits (ASICs) for interfacing to, and processing data from, silicon photomultiplier (SiPM) arrays. We document ASIC desired and required specifications for four applications supporting national security mission areas: neutron radiography, associated particle imaging, and two versions of kinematic neutron imaging cameras. While each application has a few unique requirements that stress capability, there is generally good agreement among most. Two recently developed ASIC devices were evaluated in a system-like configuration by interfacing these to scintillator crystals exposed to gamma and neutron sources. The 64-channel ORNL device delivered functional capability while meeting most mission requirements for neutron radiography. The Nalu Scientific device, a 32-channel full waveform digitizer, did not demonstrate reliable neutron / gamma separation but it is unclear if this was an ASIC issue or problems with test setup or firmware. A literature survey of other commercial and academic ASICs was undertaken to with the conclusion that existing devices do not meet all requirements.

We present a low-power, low-noise prototype pixel readout application specific integrated circuit (ASIC) for hyperspectral enegy-resolving X-ray imaging detectors. The ASIC provides 16-by-16 channels to read out positive and negative charges from 16-by-16 heagonal silicon or CZT detector arrays, at a pitch size of $250 \mu \mathrm{m}$, to achieve good spatial resolution and the ability to record the energy of a detected photon as well as its position. The readout is done by bumpbonding the anodes to the inputs of the ASIC. Each channel of the ASIC provides low-noise charge amplification, high-order shaping with baseline stabilization, discrimination, extraction of amplitude (with neighbour channels), multiplexing, and dissipates $\sim0.6$ mW. A smart readout of the triggered pixel and its adjacent six pixels in the hexagonal configuration allows reconstruction of events with charge sharing correction, and can be used to estimate the depth of the photon interaction and to suppress background events. The target equivalent noise charge (ENC) is $\sim10$ electrons for silicon detector pixel and $\sim15$ electrons for CZT detector pixel.

Pixel radiation detectors for X-rays and gammarays are commonly built by hybridization of sensor and readout application-specific integrated circuit (ASIC) chips using flip-chip bonding. A typical example is pixelated high-Z semiconductor sensor material (e.g. CdTe) bonded to a matching pixel array on an ASIC to form a hybrid module. Conventionally, the I/O connections of the ASIC for such hybrids are wire bonded to a Printed Circuit Board (PCB) which subsequently is connected to a data acquisition system. The wire bond pads and PCB connections require a considerable amount of the module's footprint and usually protrude at one side of the detector module by approximately 1.5mm. The disadvantage of this practice is that those modules are only suitable for close proximity tiling modules along three sides of the detector (3-side buttable) to form larger sensor areas. In recent years Through-Silicon Via (TSV) technology was introduced to overcome this disadvantage which permits the fabrication of potentially 4-side buttable modules. Commonly a TSV-last process step in the ASIC production is integrated. However, ASICs with TSV are expensive and the TSV-last process step is prone to failure of the TSV metallization. The consequences of the latter are missing I/O connections. Alternatively, 4-side buttable hybrid detector modules can be fabricated using interposers as pitch convertors. Here the sensor has a larger pixel-pitch than the ASIC and therefore the sensor covers a larger area than the ASIC. A Re-Distribution-Layer (RDL) on the interposer facilitates connections to the I/O of the ASIC. Therefore, ASIC and all other wire bonded connections can be placed under the sensor with all four sides of the sensor being the boundary of the full-sized module. This was demonstrated in the past with a conversion from 250um-pitch on the ASIC to a 500um-pitch on the sensor using a layered PCB. In order to achieve detectors with smaller sensor pixel pitch, the layout of pitch re-routing on the interposer has to be considerably reduced in size. As a consequence, the fabrication of such interposers becomes more difficult. This paper studies desirable designs and interposer materials and compares these with the limitations of current fine-pitch interposer fabrication methods and design rules for a pitch convertor interposer. In addition, the paper will also present necessary changes such as indium deposition on individual sensor die instead of wafer-level fabrication that have to be taken into consideration for sensor/ASIC hybridization of fine-pitch radiation detectors.

The X-ray Astronomy and Observational Cosmology (XOC) group at Stanford University, in collaboration with the Massachusetts Institute of Technology (MIT) and MIT Lincoln Laboratory (MIT-LL), is developing next generation X-ray detector and readout technologies. Specifically, the XOC group is developing a fast, low noise readout application specific integrated circuit (ASIC) that is intended to be paired with X-ray charge-coupled device (CCD) detectors in development at MIT-LL. This readout ASIC is denoted as the MIT CCD Readout Chip or MCRC. The MCRC prototype is designed in a 350 nm technology node featuring 8 channels. Each channel is composed of two inputs. One is dedicated to read out the proven source follower-based (SF) CCD architecture with two selectable gain settings, an input referred noise of 1.63 e⁻_RMS, an input dynamic range of ±160 mV, channel to channel crosstalk less than -75 dBc, a power consumption of roughly 30 mW/channel, and a bandwidth of approximately 50 MHz, translating to an effective rise time of around 5 ns. Such a response can comfortably support readout speeds for large CCD pixel matrices in excess of 5 Mpixel/s/channel. The chip also features a second input which is an experimental drain-current readout (DR) topology to support Single electron Sensitive Read Out (SiSeRO) CCD stages currently in development at MIT-LL. The MCRC excels in speed while its input noise and bandwidth are on par with commercial discrete offerings, but with smaller power and real-estate footprints. Here we present the latest measurement results for this state-of-the-art prototype readout ASIC.

The Keck-PAD (pixel array detector) was developed at Cornell as a burst-rate imager capable of recording images from successive electron bunches (153 ns period) from the Advanced Photon Source (APS). Both Si and hole-collecting Schottky CdTe have been successfully bonded to this ASIC (application-specific integrated circuit) and used with this frame rate. The facility upgrades at the APS will lower the bunch period to 77 ns, which will require modifications to the Keck-PAD electronics to image properly at this reduced period. In addition, operation at high X-ray energies will require a different sensor material having a shorter charge collection time. For the target energy of 40 keV for this project, simulations have shown that electron-collecting CdTe should allow >90% charge collection within 35 ns. This collection time will be sufficient to sample the signal from one frame and prepare for the next. 750 µm-thick electron-collecting Schottky CdTe has been obtained from Acrorad and bonded to two different charge-integrating ASICs developed at Cornell, the Keck-PAD and the CU-APS-PAD. Carrier mobility has been investigated using the detector response to single X-ray bunches at the Cornell High Energy Synchrotron Source and to a pulsed optical laser. The tests indicate that the collection time will meet the requirements for 77 ns imaging.

Vertex detectors in high luminosity particle colliders are subject to high hit rates leading to high occupancies. The proposed Timing Vertex Detector (TVD) is a potential solution that requires a readout application specific integrated circuit (ASIC) that measures pulse arrival times with a timing resolution in the range of $100 fs$ or less. Present efforts are centered on the development of such an ASIC, called the RFpix. One of the critical requirementsis low added jitter. In this paper, we present results of the study on added jitter and jitterpropagation in inverter chains for $\mathrm{a130 nm}$ technology node. Furthermore, we proposea novel fully differential two-level delay-locked loop (DLL) circuit for the RFpix prototype with a simulated (layout parasitics included) worst case added jitter of $28 fs$.

We present time resolved X-ray diffraction (TRXD) experiments on the transport of a coherent acoustic wave-packet and nonlinear carrier relaxation processes across the nearly ideal AlGaAs/GaAs interface. A femtosecond laser impulsively excites the underlying substrate such that the coherent acoustic phonons take the form of two counter propagating unipolar strain pulses and associated hot carrier dynamics. Picosecond TRXD is used to observe the laser-induced strain separately for the film and substrate.

A fully integrated 100 kHz X-ray charge coupled device (CCD) readout application specific integrated circuit (ASIC) employing delta sigma ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Delta \Sigma $</tex-math></inline-formula> ) digitization is presented. To achieve high linearity with small chip size and low power consumption, the correlated double sampling (CDS) is realized by the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Sigma \Delta{\rm ADC}$</tex-math></inline-formula> instead of the analog front end (AFE) as in conventional CCD readout circuits. Besides, the proposed decimation filter features simple structure and eases the integration. The chip is fabricated in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$0.35\ \upmu\hbox{m}$</tex-math></inline-formula> CMOS technology and the measured integral nonlinearity (INL) throughout the input dynamic range of ASIC is 0.055% with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$35.1 \pm 0.3\ \upmu\hbox{V}$</tex-math></inline-formula> input referred noise. A CCD detection system is built and tested with the sensitivity of CCD being <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$4\ \upmu\hbox{V}/\hbox{e}^-$</tex-math></inline-formula> . The integration test results show that the readout noise is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$11.8\ \hbox{e}^ {-} $</tex-math></inline-formula> at 100 kHz readout pixel rate and the achieved energy spectrum resolution is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$168\ \hbox{eV} \pm 4.7\ \hbox{eV}$</tex-math></inline-formula> (Full Width at Half Maximum: FWHM) at 5.9 keV.

This paper reports a newly developed chip-level micro-electromechanical system (MEMS) accelerometer for tilt sensing based on differential array area-change capacitive displacement transducer and through-silicon-wafer etching process. The proposed MEMS accelerometer consists of a silicon-based acceleration-sensitive spring-mass structure, a upper glass cover plate and an universal capacitive readout application specific integrated circuit (ASIC) die, which is used to apply differential driving signals and pickup capacitance change due to area-variation under in-plane motion. The MEMS accelerometer has a linear measurement range of ±30° with a scale factor of 33.6 mV/°. The tilt measurement resolution of the MEMS accelerometer is evaluated by the modified Allan deviation with the results showing that an angle resolution of 0.003° at an integral time of 3 seconds. Compared with the commercial MEMS tilt sensors, the proposed MEMS accelerometer in this work has a larger full measurement range and a larger bandwidth but a little bit poor linearity. Hence, it is believed that the proposed chip-level MEMS accelerometer is promising to be a high-resolution tilt sensor with a lower power consumption and smaller volume.

In this paper, we present a single-chip 65 ×42 element ultrasonic pulse-echo fingerprint sensor with transmit (TX) beamforming based on piezoelectric micromachined ultrasonic transducers directly bonded to a CMOS readout application-specific integrated circuit (ASIC). The readout ASIC was realized in a standard 180-nm CMOS process with a 24-V high-voltage transistor option. Pulse-echo measurements are performed column-by-column in sequence using either one column or five columns to TX the ultrasonic pulse at 20 MHz. TX beamforming is used to focus the ultrasonic beam at the imaging plane where the finger is located, increasing the ultrasonic pressure and narrowing the 3-dB beamwidth to [Formula: see text], a factor of 6.4 narrower than nonbeamformed measurements. The surface of the sensor is coated with a poly-dimethylsiloxane (PDMS) layer to provide good acoustic impedance matching to skin. Scanning laser Doppler vibrometry of the PDMS surface was used to map the ultrasonic pressure field at the imaging surface, demonstrating the expected increase in pressure, and reduction in beamwidth. Imaging experiments were conducted using both PDMS phantoms and real fingerprints. The average image contrast is increased by a factor of 1.5 when beamforming is used.

The Advanced Photon Source (APS), a national user facility for synchrotrons radiation research, is located at Argonne National Laboratory, approximately 25 miles southwest of Chicago, Illinois. The APS is considered a third-generation synchrotrons radiation facility (specifically designed to accommodate insertion devices to serve as radiation sources) and is one of three such facilities in the world. Currently, it is the most brilliant source in the United States for research in such diverse fields as biology, medicine, materials science, chemistry, geology, agriculture and soil science, physics, and manufacturing technology. Researchers use the APS either as members of Collaborative Access Teams (CATS) or as Independent Investigators (IIs). CATS are responsible for designing, building, and operating beamlines in one or more sectors, each sector consisting of an insertion-device (ID) beamline and a bending-magnet (BM) beamline. Each beamline is designed to accommodate a specific type of research program(s) and is optimized accordingly. CAT members are entitled to use 75% of the available beam time to pursue CAT research goals. The remaining 25% of the available beam time must be made available to IIs. This document was written to help prospective IIs determine which beamlines are suitable for their specific experiments.

On December 20,1996, scientists working with the Advanced Photon Source (APS) at Argonne National Laboratory in Illinois conducted “first light” experiments in a new laboratory for synchrotron radiation research in the geosciences. The demonstration marks the dawn of a new era in rock and mineral physics when, as geophysicist Thomas Duffy of Princeton University notes, researchers will be able to 'shine a bright new light on some of our planet's deepest and darkest secrets.”The new light is from the APS, a particle accelerator dedicated to the production of brilliant X rays for research, and it shone on the GeoSoilEnviroCARS (GSECARS) experimental facility. The purpose of GSECARS is to develop X‐ray beamlines at the APS and make them available to scientists for frontier research in Earth, planetary, geophysics, soil, and environmental sciences.

The electron cloud is a possible heat source in the superconducting undulator (SCU) designed for the Advanced Photon Source (APS), a 7-GeV electron synchrotron radiation source at Argonne National Laboratory. In electron cloud generation extensive research has been done, and is continuing, to understand the secondary electron component. However, little work has been done to understand the parameters of photoemission in the accelerator environment. To better understand the primary electron generation in the APS; a beamline at the Australian Light Source synchrotron was used to characterize two samples of the Al APS vacuum chamber. The total photoelectron yield and the photoemission spectra were measured. Four parameters were varied: surface roughness, sample temperature, incident photon energy, and incident photon angle, with their results presented here.

ABSTRACTThe Advanced Photon Source (APS) is a third-generation synchrotron now in operation at Ar-gonne National Laboratory. A national user facility for research in the Earth sciences is being constructed by the GeoSoilEnviro group of the Consortium for Advanced Radiation Sources (GSECARS). One component of this effort is the program for diamond anvil cell (DAC) research, to study materials at ultrahigh pressure and temperature conditions using a variety of techniques.In this paper, we describe the DAC facility that is being developed at the GSECARS. Recent progress in developing a laser heating system is presented.