The electrical and electronic systems (E/E Systems) in the automotive world have been getting increasingly complex over the past decades. New functionality, which is mainly realized through embedded E/E Systems, as well as the growing connectivity (...

The ring buffer is a staple data structure used in many algorithms and applications. It is highly desirable in high-demand use cases such as multimedia, network routing, and trading systems. This work presents a new ring buffer design that is, to the best of our knowledge, the only array-based first-in-first-out ring buffer to provide wait-freedom. Wait-freedom guarantees that each thread completes its operation within a finite number of steps. This property is desirable for real-time and mission critical systems. This work is an extension and refinement of our earlier work. We have improved and expanded algorithm descriptions and pseudo-code, and we have performed all new performance evaluations. In contrast to other concurrent ring buffer designs, our implementation includes new methodology to prevent thread starvation and livelock from occurring.

This paper presents a purely declarative approach to artifact-centric collaborative systems, a model which we introduce in two stages. First, we assume that the workspace of a user is given by a mindmap, shortened to a map, which is a tree used to ...

Existing algorithms of post ranking in a blogosphere do not consider the information on categories and timestamps of posts, which is valuable to improve the accuracy of post rankings. The category, created by a blogger, implies her/his interesting topics, and the timestamps, which indicates the creation times of a post and a blog action, are closely related to the quality of a post. In this paper, we propose three strategies that exploit the information related to the categories and timestamps, and address how to apply it to four existing post ranking algorithms, i.e., PostRank, BAITS, BloggerAVG, and PBFS. We evaluate the accuracy of these algorithms by conducting extensive experiments using real-world blog data. The results show that our strategies help each algorithm improve the accuracy.

The scheduling of parallel real-time tasks on multiprocessor systems is more complicated than the one of independent sequential tasks, specially for the Directed Acyclic Graph (DAG) model. The complexity is due to the structure of DAG tasks and the precedence constraints between their subtasks. The trivial DAG scheduling approach is to directly apply common real-time scheduling algorithms on DAGs despite their lack of compatibility with the parallel model. Another scheduling approach, which is called the stretching method, aims at transforming each parallel DAG task in the set into a collection of independent sequential threads that are easier to be scheduled. In this paper, we are interested in analyzing global preemptive scheduling of DAGs using both approaches by showing that they are not comparable when associated with Deadline Monotonic (DM) and Earliest Deadline First (EDF) scheduling algorithms. Then we use extensive simulations to evaluate their schedulability performance. To this end, we use our simulation tool YARTISS to generate random DAG tasks with many parameter variations so as to guarantee reliable experimental results.

Currently, the multiprocessor architecture platform becomes more and more popular to the applications with higher computational capacity for meeting the fast-grown demand of applications and increasing the performance of whole system. Managing the ...

The smart grid requires a reliable, efficient and cost effective communication network that meets performance requirements. Due to their cost effectiveness and ubiquitous nature, wireless mesh networks have been considered as an alternative for smart grid communication networks. In this paper, we first review smart grid communication network requirements by applying various use cases that enables the design of network models for simulation. Using the ns-3 simulator tool, we then systematically compare the effectiveness of two representative wireless mesh network protocols: Hybrid Wireless Mesh Network Protocol (HWMP) and Ad hoc On-Demand Distance Vector (AODV) Protocol in terms of various performance metrics and network settings. Our evaluation data shows that the HWMP protocol is suitable for small size mesh grids whereas AODV performs better for large mesh grids. We also conduct a simulation study to investigate the performance of Worldwide Interoperability for Microwave Access (WIMAX) technology in smart grid communication networks with different modulation techniques.

In this paper, we present an approach for accelerating model-based robustness testing of state-based software components. We use the Z3 SAT solver to derive executable test cases fully automatically from a state model based on a UML Statechart. The test cases are paths along the Statechart comprising states and transitions. The main advantage of our approach is an accelerated execution of the test cases by refining already reached states as starting points for further test cases using reverse execution. Furthermore, the presented approach is able to check whether a correct target state has been reached or not when executing the path-based test cases using runtime verification and therefore increases the test significance. The runtime verification is done without instrumenting the source code of the component under test.

A hybrid version of a compact genetic algorithm (cGA) is presented as approach to solve the Multi-Level Capacitated Lot Sizing Problem. The present paper extends results reported in [18]. The hybrid method combines a fix and optimize heuristic with cGA aiming to improve solutions generated by cGA. Also a linear mathematical programming model is solved to first evaluated solution provided by cGA. The performance of the hybrid compact genetic algorithm (HcGA) is evaluated over two sets of benchmark instances. The results are compared against methods from literature recently proposed for the same problem: two time-oriented decomposition heuristics and a hybrid multi-population genetic algorithm. A superior performance of HcGA is reported mainly for instances dealing with setup times and against time-oriented decomposition heuristics.

While IPv6 deployment in the Internet continues to grow slowly at present, the imminent exhaustion of IPv4 addresses will encourage its increased use over the next several years. However, due to the predominance of IPv4 in the Internet, the transition to IPv6 is likely to take a long time. During the transition period, translation mechanisms will enable IPv6 hosts and IPv4 hosts to communicate with each other. For example, translation can be used when a server or application works with IPv4 but not with IPv6, and the effort or cost to modify the code is large. Stateless and stateful translation is the subject of several recent IETF RFCs. We evaluate performance of the new IVI translator, which is viewed as a design for stateless translation by conducting experiments in both LAN and Internet environments using a freely available Linux implementation of IVI. To study the impact of operating system overhead on IVI translation, we implemented the IVI translator on a bare PC that runs applications without an operating system or kernel. Our results based on internal timings in each system show that translating IPv4 packets into IPv6 packets is more expensive than the reverse, and that address mapping is the most expensive IVI operation. We also measured packets per second in the LAN, roundtrip times in the LAN and Internet, IVI overhead for various prefix sizes, TCP connection time, and the delay and throughput over the Internet for various files sizes. While both the Linux and bare PC implementations of IVI have low overhead, a modest performance gain is obtained due to using a bare PC.