article Free Access Share on 17th design automation conference report June 23-25, 1980 Author: V. L. Stefan View Profile Authors Info & Claims ACM SIGDA NewsletterVolume 10Issue 2Aut. 1980 pp 110–112https://doi.org/10.1145/382171.382656Published:01 August 1980Publication History 0citation51DownloadsMetricsTotal Citations0Total Downloads51Last 12 Months5Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my Alerts New Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

This paper is a global presentation of solutions for IS design and management. We believe that every solution proposed to a design problem implies that the designer disposes of a design theoretical model, a language for specification, a design method and tools that help him to apply the design method. We define such a quartet (model,language, method, tools) in order to satisfy IS design and management. Furthermore the scope of the approach developed for IS design is to integrate the definition of the data structure, of the program structure and of the synchronization. This paper is more model and language oriented.

<u>1.1 The language CAP</u>While there are a couple of programming languages which allow the representation of parallelism /1,2,5/ there is a lack for languages which allow in an as well disciplined as general manner the description of concurrency.A well defined mathematical description method for concurrent processes is given by the Petri net model /3,7,9/. It fulfils the above requirements and in addition is widely used and extremely easy to understand.This concept is integrated into the language CAP in a very elegant way: Lables are used as places, where one has in mind that a labelled statement puts a token into its label(s) <u>after</u> it has been processed. On the other hand the processability of a statement is controlld by "On-conditions" on labels. Every statement is processed if and only if its "On-condition" has become true. At this time, in accordance with the firing-rule (="On-condition"), "tokens" are withdrawn from certain labels used within the "On-condition" and placed into the labels of the statement.In addition various parameters may be associated to transitions thus offering a description power similar to the Macro-E-Nets /8/. On the other hand there are a lot of language-constructs to support structured programming.<u>1.2 The analysis of CAP-programs at compile-time</u>Since a couple of years Petri nets are object of research. For some rather restricted subclasses of Petri nets sufficiant an necessary conditions for the topology of a net to be well-formed are known /3,4,7/. Under a well-formed net we understand a net <u>without dead-locks</u> being <u>safe</u> (no loss of information) and <u>residue-free</u> (independent from a certain history). Related to results by Herzog an Yoeli /4/ for a subclass of Petri nets we prove that there are six conditions for the topology of a net of the subclass of Petrinets which are used to describe the control-structure of CAP-programs so that the net is well-formed.By this we can decide at compile-time without simulation whether a CAP-program describes a life, safe and residue-free system (i. e. a useful one) or not. After having defined, what we mean ba a "Structured CAP-program" we will have the fine result that every structured CAP-program is well-formed.<u>1.3 The simulation of systems described in CAP</u>As CAP allows the description of systems down to a level of specification which is comparable with the bit-level of digital systems inclusive the detailled description of the real-time-behaviour, for the processing of CAP one needs a system similar to a simulator for digital circuits. On the other hand also very global descriptions on a high level of abstraction are possible.This implies that the run-time system for CAP must be extremely adaptive. We tried to solve this problem by a very flexible and powerful table driven and event oriented simulator with the event-mechanism being directly adopted from the Petri net concept of CAP.

This paper discusses a new line routing algorithm. The algorithm uses a line searching scheme based on topological properties of objects in a continuous plane. It is believed to have the speed, accuracy and low memory performance properties of Hightower'...

M. N. Matelan recently developed an abstract model for the control system design process (Matelan, 1976). Several features of this CSD model make it an attractive structure for an automated design system. These features include a method of stating the design problem independant of any realization technology and an approach which divides the design problem into a series of contingencies to be tested, related tasks to be performed as necessary, and a monitor strategy which controls the time sequencing of these contingency/task pairs. The concept of hardware binding is also introduced, which facilitates the simultaneous development of hardware and software.

The paper presents a three phase approach to the space allocation problem. The first phase is to identify the activities that can be considered as members of component groups by classification methods. Secondly to find organizational form for each of the groups and to locate the members into the layout. Thirdly to find organizational form for the whole system and to locate the groups in the system.

article Survey of design automation in universities Share on Author: W. M. vanCleemput View Profile Authors Info & Claims ACM SIGDA NewsletterVolume 5Issue 4Dec. 1975 pp 15–21https://doi.org/10.1145/382156.382660Online:01 December 1975Publication History 0citation62DownloadsMetricsTotal Citations0Total Downloads62Last 12 Months2Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access

The paper commences with a brief but critical appreciation of some known automatic tracking techniques for multilayer printed circuit boards, viz. Maze-Running, Line-Search and Channel-Allocation. The purpose here is to bring out their inherent similarity and to propound their specific superiority under different combinations of controlling criteria dictated by technological constraints. Consideration is given to the prohibitive core and time requirement for a real life environment involving an approximately 500 x 500 track matrix associated with the request for orthogonally connecting about 2500 pin-pairs, on each board. The paper then proceeds to discuss in detail the evolution of an effective algorithm and list-structure capable of successfully handling this problem. Finally several side issues of major significance are introduced. The efficient pre-sorting of the order in which wires are submitted to the main algorithm has been found to make a significant contribution to the efficiency of the entire system. Profile analysis is developed as a technique for comparing the relative merits of various topological placements of the logic network. The importance of the basic board layout and its relation to the algorithm employed is stressed.