Research Article10.1007/s10470-026-02574-6Modeling and simulation of GaInAsN/GaAs MOS-HEMT for rapid detection in biosensor applicationsMar 01, 2026Analog Integrated Circuits and Signal ProcessingChumki Das + 1 more +1CiteListenSave
Research Article110.1007/s10470-026-02561-xA new low-power low-ripple charge pump based on self-cascode configurationJan 31, 2026Analog Integrated Circuits and Signal ProcessingMostafa Katebi + 3 more +3CiteListenSave
Research Article10.1007/s10470-025-02556-0Diode-based programmable network array (DiProNA) for high-impact reconfigurable instrumentationJan 07, 2026Analog Integrated Circuits and Signal ProcessingErol CanCiteListenSave
Research Article10.1007/s10470-025-02526-6Multiple TRNGs based on random number generation and its application in color image encryption and decryptionNov 13, 2025Analog Integrated Circuits and Signal ProcessingManoj KumarCiteListenSave
Research Article10.1007/s10470-025-02527-5A novel Three-Key mixing text encryption based on A new 3-D chaotic systemOct 24, 2025Analog Integrated Circuits and Signal ProcessingKriti Suneja + 3 more +3CiteListenSave
Research Article10.1007/s10470-025-02517-7A Study of the Efficiency of Output-Matched Radiofrequency Power AmplifiersOct 17, 2025Analog Integrated Circuits and Signal ProcessingDavide Pecile + 3 more +3Abstract This paper presents a large-signal analysis of radiofrequency power amplifier (PA) efficiency under the constraint of conjugate output matching. The study shows that in intrinsically low-efficiency operating regimes such as class-A, enforcing conjugate output matching leads to a factor-of-two reduction in efficiency with respect to an equivalent unmatched design, in agreement with the literature. However, when the amplifier is operated in class-AB and beyond, the efficiency penalty is reduced. Consequently, by appropriately adjusting the drive level and the PA bias point, it is possible to realize an output-matched PA with efficiencies comparable to those of unmatched designs. In addition to the analytical treatment, a practical topology and a design methodology for achieving the required output matching are presented. The findings are validated through transistor-level simulations of both bipolar and MOS RF amplifier designs.Read moreCiteListenSave
Research Article10.1007/s10470-025-02521-xDesign and analysis of CMOS low power variable gain amplifier for biomedical applicationsOct 08, 2025Analog Integrated Circuits and Signal ProcessingRahma Aloulou + 4 more +4CiteListenSave
Research Article10.1007/s10470-025-02508-8An efficient hilbert envelope and factor analysis based Estimation of R-peaks in ECG signalSep 30, 2025Analog Integrated Circuits and Signal ProcessingVarun Gupta + 4 more +4CiteListenSave
Research Article210.1007/s10470-025-02505-xInvestigating the effects of interface trap charges and temperature on n-type step tunneling path TFETSep 10, 2025Analog Integrated Circuits and Signal ProcessingJ K Saha + 3 more +3CiteListenSave
Research Article10.1007/s10470-025-02474-1A quasi-constant frequency AOT applied to buck converter CCM modeAug 18, 2025Analog Integrated Circuits and Signal ProcessingWanli Jia + 3 more +3CiteListenSave