Analytic solutions to the transfer functions required for lumped element quadrature hybrids are derived. These transfer functions are necessary for the synthesis of circuits with optimum Chebychev responses to the through and coupled ports. It is found that high-order functions can be derived with very little computational effort.

The neuron MOS transistor is a recently discovered device which is capable of executing a weighted sum calculation of multiple input signals and threshold operation based on the result of summation, thereby simulating the function of biological neurons. A comprehensive set of neuron test transistors has been designed, where a number of input gates are coupled capacitively to a floating gate, which controls the channel current. Integrated circuits for neural network applications have also been designed, based on the neuron MOS transistors. These circuits include neuron CMOS inverters and A/D and D/A converters. To increase the accuracy of the neuron MOSFET structures, calibration techniques are proposed and tested. All the test structures and circuits are implemented by using a standard 0.8 µm double-polysilicon CMOS technology. Attention was paid to saving of the layout area and reducing power consumption.

The trench insulated gate bipolar transistor (IGBT) is widely regarded as a worthy replacement of DMOS IGBTs and GTO thyristors in a wide range of applications, from motor control (1.4 kV) to HVDC (6.5 kV). An optimum design of 1.4 kV NPT trench IGBTs using a new fully integrated optimisation system comprised of process and device simulators and an RSM optimiser is described. The use of this new TCAD system has contributed largely to realising devices with characteristics far superior to the previous DMOS generation of IGBTs. Full experimental results on 1.4 kV trench IGBTs are reported, which are in excellent agreement with the TCAD predictions.

The development of microrobots is very important in fields where sub-micrometre precision is required. An integrated driving solution based on a commercial BCD (bipolar, CMOS, DMOS) technology is proposed to implement proper drivers for microrobots formed by smart piezoactuator units (SPU). The high voltage signals that demand these actuators are performed by a driver based on a full custom design of a high voltage operational amplifier connected in the inverter configuration. They are able to supply a 50 V sinusoidal waveform at frequencies ranging about 10 kHz with the distortion levels appropriate to the application.

A methodology for constructing double edge-triggered flip-flops (DETFFs) from existing latches, which removes the need for complete flip-flops or the presence of clocked nodes in the combining section is presented. The application of this methodology to designing DETFFs based on latches constructed from pass transistor/transmission gates, true single-phase clocked structures, and differential logic is investigated. The resulting DETFFs deliver high performance and do not suffer from the problems of charge sharing, charge coupling, reduced voltage swing, poor supply voltage scaling properties, and excessive power dissipation plaguing existing DETFFs.

A case study for the design of switched-current filters is presented. While the emphasis is on the step-by-step numerical design of a video filter, the design flow is applicable to any switched-current filter. The chosen design example is a low pass elliptic ladder filter with the following specification: passband 0.5 dB equiripple, stop-band attenuation > 30 dB, –3 dB frequency of 8 MHz, sampling frequency of 80 MHz, signal-to-noise ratio of 60 dB. All aspects of the design are covered from filter specification, through filter synthesis, circuit definition and finally transistor sizing for CMOS implementation.

The oscillation test methodology is presented for active RC filters. The authors develop general guidelines for the design of the oscillation-based test structures and describe in more detail test transformations of filter configurations which are most frequently used in practice. Frequency measurements performed on some implemented test structures and fault detection experimental results are included. The oscillation-based test described in the paper is primarily intended for field testing. In some cases, it can also be used as a functional go no-go test in production. The presented test structures can also be employed for stimulus generation in a built-in self-test.

The author proposes an efficient parallel adder based design for the one-dimensional (1-D) discrete cosine transform (DCT). A new algorithm is developed that exploits the merits of cyclic convolution to facilitate the realisation of a 1-D any-length DCT using parallel adders. Based on this algorithm, the proposed design possesses the advantages of low hardware cost, low input/output (I/O) cost, high computing speed, and high flexibility in transform length. Considering an example using 16-bit coefficients, the proposed design can save about 58% and 80% of the gate area, as compared with the distributed arithmetic (DA)-based designs, for the 64 and 128 transform lengths, respectively.

A lookup table based method to minimise generalised partially-mixed-polarity Reed–Muller (GPMPRM) expansions with k mixed polarity variables is presented. The developed algorithm can produce solutions based on the desired cost criteria for the systems of completely specified functions. A heuristic approach based on the exclusion rule is adopted to extract the best dual polarity variables from any fixed polarity Reed–Muller (FPRM) expansion. The obtained experimental results compared favourably with the recently published results and outperform those generated by the exact minimal FPRM expansion minimisers.

An improved DC model of low- and high-power GaAs MESFETs is proposed. Third-order dependence of fitting parameters on bias conditions is included. The main objective is to obtain a very good agreement between measured and simulated I–V curves, particularly in the knee and saturation regions, regardless of the technological characteristics of the device. The model has been compared with the most significant models presented in the literature, showing some significant improvements of the state-of-the-art.