This paper presents the results of simulation modeling of renewable energy source integration – specifically a solar photovoltaic (PV) plant – into a smart grid using MATLAB/Simulink R2022b. The developed model comprises a 2.19 MW PV array based on A10 Green Technology A10J-M60-220 modules, a boost converter, a three-phase IGBT-based inverter with pulse-width modulation (PWM), and combined RLC filters for harmonic suppression. The grid topology includes three synchronous generators (6.6 kV – primary, two at 3.3 kV – backup), a 100 km transmission line, and a distribution system supplying industrial load at 1100 V and domestic load at 440 V. Simulation was conducted in two stages: analysis of grid operation without renewable integration, followed by evaluation of system parameters after PV plant connection. Results demonstrate that the application of RLC filters with parameters R = 1 mΩ, L = 1 mH (series circuit) and R = 100 kΩ, C = 1 nF (parallel circuit) effectively suppresses harmonic distortions generated by the inverter, ensuring sinusoidal voltage waveforms at all monitoring points. It was established that during parallel operation of the 3.3 kV generators with the PV plant, the grid voltage reaches 5200 V-1200 V lower than when operating solely with synchronous generators – confirming that renewable sources cannot fully replace conventional generation. However, the PV plant effectively performs a supporting role, contributing to voltage stabilization and system reliability during low-demand periods.

Abstract Multi-phase machine drives are gaining attention in the fields of electrical machines and control due to their benefits. However, the application of these motors is challenging due to the inefficiency of conventional control techniques in multiphase systems. This paper presents an enhanced direct torque control (DTC) method for a five-phase permanent magnet synchronous motor (PMSM). The problems of variable switching frequency and limitations of the proportional integral (PI) controller have been overcome by integrating a fractional-order super-twisting sliding mode algorithm (FOSTSMA) with a modified space vector modulation (MSVM) technique. This MSVM approach determines minimum and maximum voltage values to achieve superior performance. The proposed DTC-MSVM-FOSTSMA strategy significantly outperforms traditional DTC by offering better robustness and an improved dynamic response. Simulation results in MATLAB confirmed the proposed DTC-MSVMFOSTSMA strategy’s efficacy in enhancing motor performance. Compared to conventional DTC and DTC-MSVM-PI methods, this approach yielded substantial improvements: an 83.33% and 78.57% reduction in response time, a 61.84% and 32.55% decrease in torque ripple, and a 58.64% and 34.52% minimization of stator flux ripples, respectively. Additionally, the proposed control exhibits robust performance under parameter variations.

Abstract In this study, fluorine-doped tin oxide (FTO) thin films were synthesized using two low-cost solution-based techniques, homemade spray pyrolysis and spin coating, conducted at a substrate temperature of 500 °C. Fluorine was introduced as an n-type dopant in concentrations ranging from 10 to 40 wt% to enhance the electrical conductivity and optical transmittance of the films. The structural, morphological, and optoelectronic properties of the films were characterized via XRD, SEM, UV-Vis spectroscopy, and Hall effect analysis. The spray-deposited FTO films exhibited superior performance, with optimized samples (at 30 wt% F) achieving a sheet resistance of 20 Ω/□, optical transmittance of 80%, and a figure of merit (FOM) of 5.37×10⁻³ Ω⁻¹. In contrast, spin-coated films showed higher resistivity, lower mobility, and reduced FOM (e.g., 1.53×10⁻³ Ω⁻¹ at 840 nm thickness), attributed to inferior film densification and increased structural defects. The results demonstrate that spray pyrolysis enables the formation of dense, well-crystallized FTO layers with enhanced carrier transport and transparency, making it a more suitable deposition technique for optoelectronic and photovoltaic applications.

Abstract This paper presents a high-gain, single-stage cascode low noise amplifier (LNA) tailored for S-band applications, implemented in a 180-nm CMOS process. The design employs a common-source cascode topology with inductive degeneration, enabling a careful trade-off between gain, noise figure, and input matching. Schematic simulations indicate a peak gain of 53.2 dB and a low noise figure of 1.51-1.74 dB across the S-band, with excellent impedance matching. The amplifier is unconditionally stable and occupies a compact core area of only 0.175 mm². Operating with a power consumption of 45 mW, these results demonstrate that the proposed LNA provides a competitive, area-efficient, and robust solution for modern S-band wireless systems, achieving performance levels comparable to more complex multi-stage architectures while maintaining simplicity and design efficiency. The design also achieves excellent reverse isolation ( S 12 < –48 dB), output matching ( S 22 = –12.75 dB), and unconditional stability ( K > 1), further demonstrating the robustness of the proposed LNA.

Abstract The scaling of metal oxide semiconductor field effect transistor (MOSFET) causes many limitations in current scaled technology nodes. The secondary effects limit the application of MOSFETs in nanoscaled logic circuits. Many alternative ways are suggested for the innovation of new technological developments. Quantum-dot cellular automata (QCA) nanotechnology is getting key attention in the current scenario due to the ability of fast, power- and area-efficient implementations of the logic circuits. The exclusive OR (XOR) gate is the basic building block of many logic applications. Hence, this paper proposes an optimized novel structure of a 3-input XOR (XOR3) gate, which is successfully verified for the logic designs of a 4-bit parity generator, a 4-bit full adder, and a 4-bit binary to gray code converter. The proposed XOR3 gate consists of 8 QCA cells only and 2 clock phases. The reliability concern in terms of fault-tolerant analysis for the proposed XOR3 gate is also presented in the paper. The proposed designs are compared with the existing designs and show the improved performance metrics. The QCA Designer-E tool is used for circuit simulations. The energy dissipation values are estimated using the QCA Designer-E and the QCA Pro tools. The proposed XOR3 gate, 4-bit parity generator, 4-bit full adder, and 4-bit binary to gray code converter save a total of 20%, 26.32%, 26.40%, and 17.24% of cells, respectively, in comparison with the best-reported similar design.

Abstract This paper presents the realization of high gain low Noise Figure (NF) Low Noise Amplifier (LNA) employing the variable gain amplifier. The high gain is achieved by cascading three stages while the low NF is achieved by employing the resistive feedback in the input stage. The linearity is achieved by employing the source degeneration technique. The variable gain amplifier gets turned on/off by the input signal causing the change in the transconductance of the LNA and hence the gain of LNA varies according to the input signal strength. The results show that maximum gain for the realized LNA is 21.34 dB at 1.72 GHz for M7 ON position while during M7 OFF position, the maximum gain achieved is 26.05 dB at 1.72 GHz frequency. The S11 value is less than –9 dB for the frequency range of 1.65 GHz to 3.9 GHz, i. e., having the bandwidth of 2.25 GHz and it is matched for the 50 Ω termination at input and output port. The minimum value of the NF during low conductance is 2.88 dB while during the high conductance it is 2.82 dB.

This paper analyzes the performance of a 5G massive MIMO network based on hybrid beamforming (HBF) on geometric channels of 3GPP TR 38.901. The evaluation is carried out through link/system-level simulations at 28 GHz (OFDM 400 MHz), BS 128 antennas, 8 UEs, HBF architecture with N_RF.∈{12,16} and a 3–4 bit phase shifter, covering both UMi street canyon and indoor office (LOS/NLOS) scenarios. Channel estimation and precoder/combiner design follow the framework of compressed/hierarchical beam training and factorization of fully digital solutions; each configuration is evaluated on ≥1000 Monte Carlo drops. Results show that HBF (N_RF=16, 4-bit) achieves ≈90–95% sum spectral efficiency (SE) over fully digital with an average gap of 3–6 bps/Hz, while N_RF=12 reduces SE by an additional ~1–2 bps/Hz but provides the highest energy efficiency (EE). Compared to fully digital, HBF improves EE by ~4–5× due to the RF-chain reduction despite a slight SE decrease. Robustness tests against angle misestimation show SE degradation slopes of approximately 0.5%/° (fully digital), ~1.2%/° (4-bit HBF), and ~1.6%/° (3-bit HBF). The differences between scenarios highlight the sensitivity of HBFs to wider angular spread indoors. Overall, HBFs with ≥4-bit and N_RF selection proportional to the number of user flows provide the best SE-EE compromise, making them feasible for 5G mmWave implementations. Future directions include beam-squint mitigation in broadband, more detailed hardware impairment modeling, and robust machine learning-based HBF design.

This study proposes a layered hybrid control framework for automation and robotics systems that combines Tube-based Robust MPC (RMPC) as a safety envelope, adaptive parameter estimation to narrow online uncertainty, Sliding Mode Control (SMC) as a high-resilience fail-safe, and Reinforcement Learning (RL) as a performance booster through a warm-start/residual policy scheme that is always constrained by Control Barrier Functions (CBF). The study aims to achieve better tracking performance and computational efficiency without sacrificing safety and constraint compliance. The methodology includes constrained nonlinear plant modeling, design of tube invariance-based RMPC with constraint tightening, RLS/concurrent learning-based adaptive estimator, SMC for infeasibility/model drift conditions, and a CBF-based safety filter formulated as an online small QP. Evaluation is done through ablation studies on multi-domain benchmarks and HIL-style tests, with finite-horizon cost, ITAE, constraint violation rate, and computational latency (average and WCET) metrics. The results show that the RL+CBF configuration reduces the finite-horizon cost by about 15.7% compared to pure RMPC, maintaining a violation rate of ~0.35% (better than RMPC: 0.80%) and significantly below that of unfiltered RL (4.20%). The warm-start RL scheme accelerates the completion time of the MPC solver by ≈15–18% over various prediction horizons and reduces the WCET (26.4 → 23.3 ms), supporting real-time implementation. These findings confirm that the integration of RMPC–Adaptive–SMC–RL(+CBF) effectively bridges model-based optimality, online adaptivity, robust resilience, and learning from data in a single architecture that is safety-certified and feasible for real-world applications demanding high uptime.

Abstract This study presents an innovative single-layered toggle flip-flop with highly polarized output designed specifically for Quantum-dot Cellular Automata (QCA), a cutting-edge nanocomputing approach. Building on the capabilities of this advanced flip-flop, a two-bit asynchronous down (ripple) counter was developed using QCADesigner 2.0.3, all within the QCA framework. The counter exhibits exceptional scalability and reliability, addressing key challenges in QCA circuit design. Energy efficiency and cost-effectiveness are standout features of the design, with a 53% improvement in energy efficiency and a 38% reduction in QCA-specific cost, as verified by QCADesigner-E 2.2 simulations. Furthermore, the physical stability of the proposed circuit was thoroughly examined through kink energy calculations, highlighting its robustness. These optimizations were achieved by avoiding complex crossovers and leveraging the benefits of the enhanced flip-flop architecture. The results underscore the significant potential of QCA in improving digital circuit performance, paving the way for more efficient, scalable, and cost-effective nanoelectronic designs and pushing the boundaries of next-generation nanocomputing solutions.

Abstract The confluence of nonlinearity, unavailable states, and unknown time-varying parameters poses profound estimation challenges in fractional-order dynamical systems. This paper presents a novel adaptive observer design for nonlinear fractional-order Lipschitz systems with unknown, slowly time-varying parameters. Drawing on recent advancements in fractional-order calculus, a rigorous stability analysis is conducted, deriving the updating law and formulating the observer’s viability and stability conditions in terms of linear matrix inequalities (LMIs) and linear matrix equalities (LMEs). The proposed observer ensures the stability of both state observation and parameter estimation errors, along with the asymptotic convergence of the observation error norm square mean value to zero. Empirical results from a case study on a fractional-order financial system validate the efficacy of the proposed observer, thereby advancing the field of states and parameters estimation theory for non-integer order nonlinear systems.