This paper presents a dual-nonlinear branch linearizer for reducing the corrected amplitude overshoot of conventional single nonlinear branch linearizer. Theoretical analysis is carried out, the analysis is verified by simulation, and a prototype of Ka band 25.28∼26.08 GHz dual nonlinear branch linearizer is achieved. It indicates that the corrected amplitude overshoot is less than 0.5 dB, the C/I3 improvement is more than 10 dB related to a single carrier IBO 9 dB, when it is linked and tested for 50 W spacebrone Travelling Wave Tube Amplifier (TWTA).

By analyzing the principle of process variations, a lightweight Physical Unclonable Function (PUF) circuit based on selectable cross-coupled inverters is proposed in this paper. Firstly, selectable cross-coupled inverters are chosen for two delay paths. Simultaneously, the circuit takes challenge signal to control each delay path. The PUF cell circuit is implemented in Semiconductor Manufacturing International Corporation (SMIC) 65 nm CMOS technology and the layout area is 2.94 μm × 1.68 μm. Then the 64-bit PUF circuit is achieved with the cascade connection of cell circuits. The simulation results show that the randomness is 49.4% and the reliability is 96.5%. Compared to the other works, this PUF circuit improves the encrypt performance and greatly reduces the area.

Shot boundary detection is the fundamental part in many real applications as video retrieval and so on. This paper tackles the problem of video segment obtaining in complex movie videos. Firstly, intermediate descriptor is proposed to depict the variation of both abrupt and gradual change in shot boundaries, which is formed by distance vector on Local Binary Pattern (LBP), GIST (GIST) or their fusion. Instead of just using the adjacent frames distance, intermediate descriptor keeps the distances between current frame and consecutive frames. It comprehensively characterizes local temporal structure, which is especially important for gradual change. For the excellent ability for feature fusion in random forests, it is adopted here to verify the fusion effect of intermediate descriptor on LBP and GIST. The whole experiments are designed on the subset of TRECVid 2013 INS (INstance Search) task to verify the effectiveness of proposed intermediate descriptor and the fusion ability for random forest. Compared with static and adaptive thresholds approaches, the best performance can be achieved by post-fusion of intermediate descriptor on LBP and GIST.

Arithmetic Logic Unit (ALU) as one of the main parts of any computing hardware plays an important role in digital computers. In quantum computers which can be realized by reversible logics and circuits, reversible ALUs should be designed. In this paper, we proposed three different designs for reversible 1-bit ALUs using our proposed 3×3 and 4×4 reversible gates called MEB3 and MEB4 (Moallem Ehsanpour Bolhasani) gates, respectively. The first proposed reversible ALU consists of six logical operations. The second proposed ALU consists of eight operations, two arithmetic, and six logical operations. And finally, the third proposed ALU consists of sixteen operations, four arithmetic operations, and twelve logical operations. Our proposed ALUs can be used to construct efficient quantum computers in nanotechnology, because the proposed designs are better than the existing designs in terms of quantum cost, constant input, reversible gates used, hardware complexity, and functions generated.

Numerical analysis is presented for the characteristic parameters of centered-inclined coupling slot in rectangular waveguides, taking into account the transverse distribution of the electric field across the slot aperture. Integral equations are formulated based on dyadic Green’s function theories and solved using the method of moments. Trigonometric basis functions are adopted. It is found that the method will converge with up to ten basis functions. The characteristic parameters can be easily obtained for different slot sizes. Resonant length and resonant resistance of the coupling slots are calculated. It is shown that the calculated results have very high accuracy, compared with simulated results obtained from commercial software. Therefore, it can be effectively applied in the synthesis of antenna arrays. Effects of the transverse distribution on calculating resonant parameters of the coupling slot are also analyzed. The results show that if the transverse distribution of the electric field is neglected, the calculated error tends to become larger when the slot gets wider or thinner.

Interferogram noise reduction is a very important processing step in Interferometric Synthetic Aperture Radar (InSAR) technique. The most difficulty for this step is to remove the noises and preserve the fringes simultaneously. To solve the dilemma, a new interferogram noise reduction algorithm based on the Maximum A Posteriori (MAP) estimate is introduced in this paper. The algorithm is solved under the Total Generalized Variation (TGV) minimization assumption, which exploits the phase characteristics up to the second order differentiation. The ideal noise-free phase consisting of piecewise smooth areas is involved in this assumption, which is coincident with the natural terrain. In order to overcome the phase wraparound effect, complex plane filter is utilized in this algorithm. The simulation and real data experiments show the algorithm can reduce the noises effectively and meanwhile preserve the interferogram fringes very well.

A fast half-pixel motion estimation algorithm and its corresponding hardware architecture are presented. Unlike three steps are needed in typical half-pixel motion estimation algorithm, the presented algorithm needs only two steps to obtain all the interpolated pixels of an entire 8 × 8 block. The proposed architecture works in a parallel way and is simulated by Modelsim 6.5 SE, synthesized to the Xilinx Virtex4 XC4VLX15 Field Programmable Gate Array (FPGA) device, and verified by hardware platform. The implementation results show that this architecture can achieve 190 MHz and 11 clock cycles are reduced to complete the entire interpolation process in comparison with typical half-pixel interpolation, which meets the requirements of real-time application for very high defination videos.

A novel low-cost 4-element planar array antenna directly fed by a coaxial cable for Ultra-WideBand (UWB) application is presented. The proposed antenna consists of 2×2 bowtie elements and a simple 1:4 power divider feeding network. Compared to the basic bowtie element, the impedance bandwidth of the array antenna has a significant improvement that the low cut-off frequency is extended from 6 GHz of the bowtie element to 2 GHz. The measured results show that the proposed antenna has a large bandwidth of 2 GHz to 11 GHz for Voltage Standing Wave Ratio (VSWR)<2, and exhibits a bidirectional radiation pattern and a modest gain across the operating band and a peak gain of about 9 dBi at 11 GHz.

Two new design approaches for constructing Low-Density Parity-Check (LDPC) codes are proposed. One is used to design regular Quasi-Cyclic LDPC (QC-LDPC) codes with girth at least 8. The other is used to design irregular LDPC codes. Both of their parity-check matrices are composed of Circulant Permutation Matrices (CPMs). When iteratively decoded with the Sum-Product Algorithm (SPA), these proposed codes exhibit good performances over the AWGN channel.

Phased array radar has been applied broadly because of its sound performance. But signal of phased array radar is of a wide variety of types. Therefore, recognition of phased array radar is the most puzzling aspect of the whole emitter identification domain. To solve the problem, the article proposes the method that identifies phased array radar by pulse amplitude information, and studies the phased array radar, models transmit signal of them, and receiving signal by radar countermeasure reconnaissance receiver. From constructing template of pulse train’s amplitude vector of mechanical scanning radar, computing distance of samples and standard template, finding threshold of the template matching arithmetic, the article puts forward the template matching algorithm of radar beam scan type recognition to identify phased array radar automatically.