The generalized multiframe task model (GMF) extends the sporadic task model and multiframe task model. Each frame in the GMF model contains an execution time, a relative deadline, and a minimum inter-arrival time. These parameters are fixed after task specification time in the GMF model. However, multimedia and adaptive control systems may be overloaded and no longer stabilized when the task parameters in such systems are not flexible. In order to address this problem, deadlines and periods of frames may change to alleviate temporal overload, e.g., in the parameter adaptation and elastic scheduling model. In this paper, we propose a new model GMF-PA (the GMF model with parameter adaptation). This model allows task parameters to be flexible in arbitrary-deadline systems. A necessary schedulability test based on mixed-integer linear programming is given to check the schedulability under EDF scheduling and optimally assign frame deadlines and periods at the same time. We also prove that the test is a sufficient and necessary schedulability test when frame deadlines and periods must be integers. An approximation algorithm is also deployed to reduce computational running time and indicates a sufficient schedulability test in general. The speed-up factor of our approximation algorithm is $$1+\epsilon $$ where $$\epsilon $$ can be arbitrarily small, with respect to the exact schedulability test of GMF-PA tasks under EDF. We also apply the GMF model to self-suspending tasks. By extending recent work on scheduling self-suspending tasks, we remove the assumption that frame deadlines are equally assigned in self-suspending tasks, and the system is extended from constrained-deadline systems to arbitrary-deadline systems. We have done extensive experiments to show that the schedulability ratio is improved using our techniques in our GMF-PA model.

The Network-on-Chip (NoC) architecture is an interconnect network with a good performance and scalability potential. Thus, it comes as no surprise that NoCs are among the most popular interconnect mediums in nowadays available many-core platforms. Over the years, the real-time community has been attempting to make NoCs amenable to the real-time analysis. One such approach advocates to employ virtual channels. Virtual channels are hardware resources that can be used as an infrastructure to facilitate flit-level preemptions between communication traffic flows. This gives the possibility to implement priority-preemptive arbitration policies in routers, which is a promising step towards deriving real-time guarantees for NoC traffic. So far, various aspects of priority-preemptive NoCs were studied, such as arbitration, priority assignment, routing, and workload mapping. Due to a potentially large solution space, the majority of available techniques are heuristic-centric, that is, either pure heuristics, or heuristic-based search strategies are used. Such approaches may lead to an inefficient use of hardware resources, and may cause a resource over-provisioning as well as unnecessarily high design-cost expenses. Motivated by this reality, we take a different approach, and propose an integer linear program to solve the problems of priority assignment and routing of NoC traffic. The proposed method finds optimal routes and priorities, but also allows to reduce the search space (and the computation time) by fixing either priorities or routes, and derive optimal values for remaining parameters. This framework is used to experimentally evaluate both the scalability of the proposed method, as well as the efficiency of existing priority assignment and routing techniques.

TTEthernet is a deterministic, synchronized and congestion-free network protocol based on the Ethernet standard and compliant with the ARINC 664p7 standard network. It supports safety-critical real-time applications by offering different traffic classes: static time-triggered (TT) traffic, rate-constrained (RC) traffic with bounded end-to-end latencies and best-effort traffic, for which no guarantees are provided. TTEthernet uses three integration policies for sharing the network among the traffic classes: shuffling, preemption and timely block. In this paper, we propose an analysis based on network calculus (NC) to determine the worst-case end-to-end delays of RC traffic in TTEthernet. The main contribution of this paper is capturing the effects of all the integration policies on the latency bounds of RC traffic using NC, and the consideration of relative frame offsets of TT traffic to reduce the pessimism of the RC analysis. The proposed analysis is evaluated on several test cases, including realistic applications (e.g., Orion Crew Exploration Vehicle), and compared to related works.

When multiple model predictive controllers are implemented on a shared controller area network (CAN), their performance may degrade due to the variable timing and delays among messages. The priority based real-time scheduling of messages on the CAN introduces complex timing of events, especially when the types and number of messages change at runtime. This paper introduces a novel hybrid timing model to make runtime predictions on the timing of the messages for a finite time window. Controllers can be designed using the optimization algorithms for model predictive control by considering the timing as optimization constraints. This timing model allows multiple controllers to share a CAN without significant degradation in the controller performance. The timing model also provides a convenient way to check the schedulability of messages on the CAN at runtime. Simulation results demonstrate that the timing model is accurate and computationally efficient to meet the needs of real-time implementation. Simulation results also demonstrate that model predictive controllers designed when considering the timing constraints have superior performance than the controllers designed without considering the timing constraints.

In multi-core systems, main memory is a major shared resource among processor cores. A task running on one core can be delayed by other tasks running simultaneously on other cores due to interference in the shared main memory system. Such memory interference delay can be large and highly variable, thereby posing a significant challenge for the design of predictable real-time systems. In this paper, we present techniques to reduce this interference and provide an upper bound on the worst-case interference on a multi-core platform that uses a commercial-off-the-shelf (COTS) DRAM system. We explicitly model the major resources in the DRAM system, including banks, buses, and the memory controller. By considering their timing characteristics, we analyze the worst-case memory interference delay imposed on a task by other tasks running in parallel. We find that memory interference can be significantly reduced by (i) partitioning DRAM banks, and (ii) co-locating memory-intensive tasks on the same processing core. Based on these observations, we develop a memory interference-aware task allocation algorithm for reducing memory interference. We evaluate our approach on a COTS-based multi-core platform running Linux/RK. Experimental results show that the predictions made by our approach are close to the measured worst-case interference under workloads with both high and low memory contention. In addition, our memory interference-aware task allocation algorithm provides a significant improvement in task schedulability over previous work, with as much as 96 % more tasksets being schedulable.

The continuous evolution of technology has an increasing impact in all aspects of human society from personal relations through transport, logistics, communications, information systems and manufacturing. In many cases this evolution comes from embedded computing becoming ubiquitous and converting many devices and systems into cyberphysical systems: fromsimple devices such aswatches or toasters to complex systems such as aircraft or autonomous vehicles. Embedded computers are integral parts of these systems that have to keep upwith the temporal dynamics of their physical environment. As a consequence, many of them have real-time requirements. The Real-Time Systems Symposium (RTSS) is the premier world conference in the area of real-time theory and practice and includes related topics such as cyberphysical systems, wireless sensor networks and design and verification. In 2013 RTSS was celebrated in beautiful Vancouver, Canada, and reached its 34th edition, presenting a very interesting program that included excellent scientific papers carefully selected by the program committee, a work in progress session, five satellite workshops and an open demo session. A selection of the best papers presented at the conference was made, and their authors were invited to submit extended journal versions of their papers to this special issue of the Real-Time Systems Journal. These journal papers were reviewed according to the rigorous standards of the Real-Time Systems Journal. Scheduling the processes being executed in a real-time system and determining whether or not they can meet their timing requirements are at the heart of being able to guarantee a correct temporal response. Consequently, scheduling theory is one of the fundamental parts in the study of real-time systems. Many scheduling algorithms

Audsley's optimal priority assignment (OPA) algorithm can be applied to multiprocessor scheduling provided that three conditions hold with respect to the schedulability tests used. In this short paper, we prove that no exact test for global fixed priority pre-emptive scheduling of sporadic tasks can be compatible with Audsley's algorithm, and hence the OPA algorithm cannot be used to obtain an optimal priority assignment for such systems.

This paper provides a survey on task models to characterize real-time workloads at different levels of abstraction for the design and analysis of real-time systems. It covers the classic periodic and sporadic models by Liu and Layland et al., their extensions to describe recurring and branching structures as well as general graph- and automata-based models to allow modeling of complex structures such as mode switches, local loops and also global timing constraints. The focus is on the precise semantics of the various models and on the solutions and complexity results of the respective feasibilty and schedulability analysis problems for preemptable uniprocessors.

This paper investigates the relative effectiveness of fixed priority (FP) scheduling in a uniprocessor system compared to earliest deadline first (EDF) scheduling. The quantitative metric used in this comparison is the processor speedup factor, defined as the factor by which processor speed needs to increase to ensure that any task set that is schedulable according to EDF can be scheduled using fixed priorities. In the pre-emptive case, exact speedup factors are known for sporadic task sets with implicit or constrained deadlines. In this paper, we derive exact speedup factors for both pre-emptive and non-pre-emptive fixed priority scheduling of arbitrary deadline sporadic task sets. We also show that the exact speedup factor for the pre-emptive case holds when tasks share resources according to the stack resource policy/deadline floor protocol.

As real-time embedded systems integrate more and more functionality, they are demanding increasing amounts of computational power that can only be met by deploying them on powerful and scalable multicore architectures. The use of multicore architectures with on-chip memory hierarchies and shared communication infrastructure in the context of real-time systems poses several challenges for task scheduling. Semi-partitioned scheduling algorithms form a middle ground between the two extreme approaches, namely global and partitioned scheduling. In such an algorithm, a subset of tasks are partitioned onto cores and the remaining tasks are allowed to migrate in a pre-specified manner. By making most tasks non-migrating (partitioned), runtime migration overhead is minimized. On the other hand, by allowing some tasks to migrate among cores, schedulability is improved. In this paper, we present a predictable semi-partitioned scheduling algorithm for independent hard-real-time sporadic tasks executing on homogeneous multicore platforms using cache locking and locked cache migration. As part of the semi-partitioned scheduling algorithm, we propose two different task ordering schemes and two different schemes for the initial partitioning phase. Simulation results demonstrate the effectiveness of the proposed schemes in comparison to existing state-of-the-art techniques.