Axcelis Technologies (United States)

Explosive crystallization (EC) is often observed when using nanosecond-pulsed melt laser annealing (MLA) in amorphous silicon (Si) and germanium (Ge). The solidification velocity in EC is so fast that a diffusion-less crystallization can be expected. In the contacts of advanced transistors, the active level at the metal/semiconductor Schottky interface must be very high to achieve a sub-10−9 ohm·cm2 contact resistivity, which has been already demonstrated by using the dopant surface segregation induced by MLA. However, the beneficial layer of a few nanometers at the surface may be easily consumed during subsequent contact cleaning and metallization. EC helps to address such kind of process integration issues, enabling the optimal positioning of the peak of the dopant chemical profile. However, there is a lack of experimental studies of EC in heavily-doped semiconductor materials. Furthermore, to the best of our knowledge, dopant activation by EC has never been experimentally reported. In this paper, we present dopant redistribution and activation by an EC process induced by UV nanosecond-pulsed MLA in heavily gallium (Ga) ion-implanted high Ge content SiGe. Based on the obtained results, we also highlight potential issues of integrating EC into real device fabrication processes and discuss how to manage them.

Photo-modulated reflectance measurements provide a powerful, non-contact, non-destructive and inline-compatible method with low-cost operation for statistical process control of ion implantation steps on monitor and on product wafers. We present case studies describing how photo-modulated reflectivity measurements (PMR) can be used for ion implantation dose, fluence and tilt angle monitoring with excellent resolution, even for low-energy ion implantation processes. This is important because precise dopant and damage profile control is crucial in state-of-the art semiconductor processes utilizing shallow junctions and complex 3D doping profiles.

The effects of oxygen-inserted (OI) layers and a low-temperature-deposited oxide (LTO) capping layer on rapid thermal activation of ultrashallow implanted boron, phosphorus, and arsenic atoms in silicon (Si) are investigated using sheet resistance (Rsh) measurements, secondary ion mass spectrometry analyses, and technology computer-aided design simulations. The experimental findings suggest that the electrical activation of dopants in Si is not significantly affected by the presence of OI layers so that they can be effective for achieving lower Rsh along with shallower junction depth, thanks to reduced dopant loss and diffusion during thermal annealing. On the other hand, an LTO capping layer is found to result in larger Rsh associated with the lower peak active dopant concentration as a result of dopant segregation and/or reduced uphill diffusion. The presence of OI layers is found to mitigate these detrimental effects.

Photo-modulated Reflectivity Measurement (PMR) is an excellent technology for implantation dose and tilt monitoring of as-implanted pre-annealed production wafers. SEMILAB PMR-3000 is an in-line monitoring unit for ion implantation monitoring use prior to the thermal annealing process step. The enhanced optical system ensures the measurement on the whole dose range without insensitive regions in the mid-dose range. Typical dose detectability is <0.5% (1sigma). The resolution of tilt angle detection is <0.1° (1sigma). This sensitivity to tilt angle fulfills the requirements of state of the art process control requirements.

This paper presents SIMS data for very high energy ion implantations of arsenic (1.9–8.0 MeV), boron (2.0–5.0 MeV), and phosphorus (4.0–8.0 MeV) from Axcelis’ PurionTM VXE implanter with comparison to TCAD simulation results. Arsenic is found to be highly sensitive to implant angle, requiring beam angle control better than 0.05°, and to be relatively insensitive to damage and is generally in good agreement with simulation. It is reported for the first time that the As profile for tilt/twist=1°/0° is more channeled than 0.5°/22°, indicating the significance of planar channeling for this condition even at tilt angles ≤1.0°. Boron is well described by the TCAD model except for a 2.0 MeV highly channeled implant where it underestimates the channeling. Phosphorus is found to be the most challenging to simulate with a general overestimation of the channeling tail.

A sub-lithographic patterning technique using tilted-ion implantation (TII) is discussed herein, as an approach for extending Moore's Law. Its suitability for defining patterns self-aligned to pre-existing linear and non-linear hard-mask features is demonstrated experimentally. In addition, its resolution limit (< 10 nm) and line- edge roughness (LER) are investigated via experiments as well as Monte Carlo process simulations.

Tilted ion implantation (TII) is experimentally demonstrated to be a promising approach to pattern features smaller than pre-existing mask features on the surface of a wafer substrate. A key to this approach is a substantial change in the etch rate of a thin masking layer by TII. Fifteen degrees-tilted Ar+ implantation into a 10 nm-thick thermally grown silicon dioxide (SiO2) masking layer at a dose of 3 × 1014 cm−2 enhances its etch rate in dilute hydrofluoric acid solution by a factor of approximately 9. The features defined by TII are shown to be self-aligned to the pre-existing mask features and to have critical dimensions that can be adjusted by changing the implant tilt angle (θ) and/or geometrical dimensions of the pre-existing mask features. In this work, trenches of width as small as ∼9 nm and sub-20 nm holes are achieved by TII-enhanced patterning.

Two alternative plasma strip processes were developed to meet the photoresist (PR) removal requirements of future technology nodes. Compared to traditional oxidizing chemistries, the new plasma strip approaches showed significantly lower silicon oxidation and substrate loss, while achieving good residue removal capabilities. Plasma strip-induced dopant loss and profile changes were also evaluated for gate-first and gate-last high-k/metal gate applications.

Views Icon Views Article contents Figures & tables Video Audio Supplementary Data Peer Review Share Icon Share Twitter Facebook Reddit LinkedIn Tools Icon Tools Reprints and Permissions Cite Icon Cite Search Site Citation Jonathan David, Dennis Kamenitsa; Angle performance on optima MDxt. AIP Conf. Proc. 6 November 2012; 1496 (1): 344–347. https://doi.org/10.1063/1.4766559 Download citation file: Ris (Zotero) Reference Manager EasyBib Bookends Mendeley Papers EndNote RefWorks BibTex toolbar search Search Dropdown Menu toolbar search search input Search input auto suggest filter your search All ContentAIP Publishing PortfolioAIP Conference Proceedings Search Advanced Search |Citation Search

In the present study, we have extended a previously reported 250 nm logic p‐S/D implant (7 keV B 4.5×1015 cm−2) process matching exercise [5] to include wafer temperature, and demonstrate that matching can be obtained by increasing the temperature of the wafer during implant. We found that the high dose rate delivered by the single wafer implanter caused the formation of a clear amorphous layer, which upon subsequent annealing altered the diffusion, activation, and clustering properties of the boron. Furthermore, increasing the temperature of the wafer during the implant was sufficient to suppress amorphization, allowing profiles and device parameters to become matched. Figure 5 shows a representative set of curves indicating the cluster phenomena observed for the lower temperature, high flux single wafer implanter, and the influence of wafer temperature on the profiles. The results indicate the strong primary effect of dose rate in determining final electrical properties of devices, and successful implementation of damage engineering using wafer temperature control.