ON Semiconductor (South Korea)

Complementary logic and memory circuits based on n-type indium gallium zinc oxide (IGZO) and p-type tin monoxide (SnO) thin-film transistors (TFTs) were demonstrated with low-voltage, hysteresis-free operation. Optimization of IGZO channel thickness precisely tuned the inverter switching point to near VDD/2, achieving a high voltage gain of 146.6 V/V at VDD = 3 V and ultra-low static power consumption in the nanowatt range. SU-8 passivation effectively suppressed bias-stress-induced degradation in both IGZO and SnO TFTs, enhancing long-term stability and reducing device variation. Using these optimized devices, a 3-stage ring oscillator exhibited stable oscillations, and 6T-SRAM cells achieved tunable static noise margins by adjusting transistor strength ratios. This work represents one of the first implementations of IGZO/SnO-based 6T-SRAM and demonstrates the potential of oxide semiconductor complementary circuits for low-power and reliable system integration, with promising future applicability to non-volatile memory and on-device artificial intelligence hardware.Graphical abstract

Wireless bioresorbable electrical stimulators have broad potential as therapeutic implants. Such devices operate for a clinically relevant duration and then harmlessly dissolve, eliminating the need for surgical removal. A representative application is in treating peripheral nerve injuries through targeted stimulation at either proximal or distal sites, with operation for up to one week. This report introduces enhanced devices with additional capabilities: (1) simultaneous stimulation of both proximal and distal sites, and (2) robust operation for as long as several months, all achieved with materials that naturally resorb by hydrolysis in surrounding biofluids. Systematic investigations of the materials and design aspects highlight the key features that enable dual stimulation and with enhanced stability. Animal model studies illustrate beneficial effects in promoting peripheral nerve regeneration, as quantified by increased total muscle and muscle fiber cross-sectional area and compound muscle action potentials. These findings expand the clinical applications of bioresorbable stimulators, particularly for long-term nerve regeneration and continuous neuromodulation-based monitoring.

Traditionally, mobile systems avoid virtual memory swapping to flash memory due to wear-out and latency issues. Instead, mobile systems kill background applications to secure free memory but this leads to long-latency cold startup of applications, thereby resulting in degraded user experience. With the advance of mobile network technologies, network-based memory expansion can offer a solution, allowing users to leverage large back-end memory on edge servers. However, traditional memory expansion methods still suffer from high latency due to on-demand page faults and difficulty in identifying numerous cold pages. We propose a novel memory expansion scheme tailored for fast networks in mobile systems. Our scheme minimizes the on-demand network latency of remote I/O by bulk-prefetching pages based on access sequences during application launches. Our system also effectively identifies and exports cold pages to the edge, freeing up local memory. Our evaluations show a 41% reduction in displayed time and 62% memory expansion with 42% faster launch times, outperforming both traditional swapping and app-killing mechanisms of conventional systems.

Two dimensional honeycomb ferromagnets host massless Dirac magnons which are a bosonic analogue of Dirac fermions in graphene. The Dirac magnons may become massive and topological when the time reversal symmetry breaks and an energy gap opens up at the Dirac point, which was experimentally observed in -based van der Waals magnets. Here, we investigate the spin wave excitations in the 3d magnetic oxide with electrons (). Using inelastic neutron scattering, we observe two magnon bands separated by a 1.2-meV gap at the Dirac points indicating that its Dirac magnons are massive. Using the linear spin-wave and density functional theory calculations, we find that the spin-orbit-coupled antisymmetric Dzyaloshinskii-Moriya exchanges can best account for the observed Dirac gap opening. The associated Berry curvature and Chern number () indicate that hosts topological spin excitations via time-reversal symmetry breaking of Dirac magnons.

This paper presents a referenceless baud-rate clock and data recovery (CDR) circuit with an integrated pattern decoding technique for fast frequency acquisition. The proposed CDR achieves baud-rate frequency acquisition without edge sampling clock phase by utilizing an integrator circuit. The proposed integrated pattern decoding technique divides 6-bit sequential patterns into 5 pattern groups. The patterns of each pattern group are detected from the specific frequency offsets. By applying larger weights to the pattern groups including the patterns detected at the higher frequency offset, the proposed referenceless CDR achieves fast frequency acquisition. Fabricated in a 28-nm CMOS technology, the CDR prototype occupies 0.039 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and consumes 30.77 mW at 30 Gb/s. From various initial clock frequency, the proposed CDR achieves a capture range from 16 Gb/s to 30 Gb/s. Thanks to the fast frequency acquisition ability of the proposed integrated pattern decoding technique, the worst frequency acquisition time at the data rate of 30 Gb/s is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.7~\mu $</tex-math> </inline-formula>s. The CDR achieves a bit error rate (BER) of less than <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-12}$</tex-math> </inline-formula> and an energy efficiency of 1.03 pJ/b.

This article presents a wireline transceiver using 3-bit per symbol signaling techniques that can simultaneously modulate and demodulate the common-mode (CM) 1-bit non-return to zero (NRZ) and differential-mode (DM) 2-bit pulse amplitude modulation 4 (PAM-4) signals (CMDM-8). The driver of the transmitter (TX) configured with two different types of current mode PAM-4 drivers generates CMDM-8, a mixed signal of single NRZ and differential PAM-4. If the common-mode voltage (VCM) of the two types of PAM-4 drivers is different, the VCM of the CMDM-8 signals swings between the two different VCM even if the two PAM-4 drivers generate the identical PAM-4 signal in the DM. Therefore, the TX can generate the NRZ signal in the CM while transmitting the PAM-4 signals. At the receiver (RX), the CMDM-8, which combines NRZ and PAM-4 signals, is divided into NRZ and PAM-4 signals in the analog front end. The divided analog signals are converted to the 3-bit digital data in the decoder. The 3-bit decoder recovers the NRZ and PAM-4 signals to the original data. When 2 bits are recovered from the PAM-4 signal, the VCM of the PAM-4 signal is not constant due to the residual NRZ signal. Thus, the proposed PAM-4 decoder applies an offset-based PAM-4 decoding method to achieve robustness against the VCM change. The prototype was fabricated with a 28-nm CMOS technology and had a maximum data rate of 48 Gb/s. The transceiver with an area of 0.117 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> enabled a bit error rate (BER) of 10 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-12}$</tex-math> </inline-formula> at 9.08-dB attenuation and had a power efficiency of 4.40 pJ/bit.

Two-dimensional (2D) ferroelectric materials have emerged as significant platforms for multi-functional three-dimensional (3D) integrated electronic devices. Among 2D ferroelectric materials, ferro-ionic CuInP2S6 has the potential to achieve the versatile advances in neuromorphic computing systems due to its phase tunability and ferro-ionic characteristics. As CuInP2S6 exhibits a ferroelectric phase with insulating properties at room temperature, the external temperature and electrical field should be required to activate the ferro-ionic conduction. Nevertheless, such external conditions inevitably facilitate stochastic ionic conduction, which completely limits the practical applications of 2D ferro-ionic materials. Herein, free-standing 2D ferroelectric heterostructure is mechanically manipulated for nano-confined conductive filaments growth in free-standing 2D ferro-ionic memristor. The ultra-high mechanical bending is selectively facilitated at the free-standing area to spatially activate the ferro-ionic conduction, which allows the deterministic local positioning of Cu+ ion transport. According to the local flexoelectric engineering, 5.76×102-fold increased maximum current is observed within vertical shear strain 720 nN, which is theoretically supported by the 3D flexoelectric simulation. In conclusion, we envision that our universal free-standing platform can provide the extendable geometric solution for ultra-efficient self-powered system and reliable neuromorphic device.

Top- <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$K$</tex> Sorting is a widely used technique for se-lecting the largest or smallest numbers from input elements. In this paper, we present an efficient low-power and flexible top-K sorting architecture with cell gating on field-programmable gate arrays (FPGAs). Our architecture consists of a data filter unit, cell counter, and L-cascaded sorting cells, where the filter unit allows users to select the user-defined data values to sort, the cell counter allows cell gating by counting the number of working cells, and the sorting cells allow sorting with low power and flexible <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$K$</tex> length with cell gating. The proposed sorting cells update incoming data continuously. In addition, cell gating is introduced to increase the flexibility of top- <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$K$</tex> length and energy efficiency by turning cells on and off. Our implementation achieves remarkable results with a power consumption of only 0.3W with L=128 and 200MHz on a Xilinx XCKU115 FPGA. Overall, our work contributes to advancing the state of the art in efficient and flexible <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$K$</tex> sorting on FPG As.