ProMOS Technologies (Taiwan)

With the rapid development of positioning, localization, navigation, and self-driving car systems, the implementation of intelligent and robust localization systems for real-time location-based services (LBSs) has become increasingly attractive. This article presents high-performance positioning and tracking approaches characterized by a pipelined structure, high computational efficiency, flexibility, and real-time processing, implemented using field programmable gate arrays (FPGAs). In triangulation-based positioning approaches, estimated distance information is derived from communication signals and the path loss model, while vertical localization is achieved through the characteristics of barometric pressure (BP). After integrating positioning approaches with tracking methods and BP sensors, the results illustrate that the proposed localization algorithms closely estimate the trajectory of mobile devices. For FPGA-implemented algorithms, the proposed approaches effectively handle floating-point operations, reduce computing resource usage, and provide real-time processing capabilities, surpassing software-based designs and implementations. In terms of performance, the results demonstrate that the localization accuracy of the proposed hardware-based implementation is nearly identical to that of the software-based approach. Regarding vertical location accuracy, based on the proposed calibration approach, the BP value increases by 11.6 Pa for every one-meter decrease in altitude. To maintain floor-level accuracy over time despite atmospheric fluctuations, a real-time dynamic calibration mechanism using a fixed reference sensor is employed. In summary, the proposed localization algorithms, implemented with FPGAs and BP sensors, offer advantages such as lower circuit costs, higher processing efficiency, and reliable vertical location accuracy for real-time public safety LBS.

The metal-insulator-metal (MIM) capacitor for analog and rf applications has been developed with ZrO2∕Al2O3∕ZrO2 laminate as the dielectric. The high capacitance density of 21.54fF∕μm2 can be achieved due to the tetragonal ZrO2 which makes the higher dielectric constant of 38.7. This MIM capacitor also demonstrates the quadratic voltage coefficient of 2443ppm∕V2 and the good leakage current of 2.11×10−6A∕cm2 at 2V which is ascribed to the inserted Al2O3. Since the Schottky emission is suggested as the major dielectric conduction mechanism, a further reduced quadratic voltage coefficient and leakage characteristic can be realized by using a high work-function electrode. The combination of the promising electrical properties and the desirable process integration renders this structure highly suitable for advanced MIM capacitors.

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> The fluctuation in the minority carrier lifetime (MCLT) measurement is observed when monitoring the metal contamination for the furnace performing denuded zone formation, and the mechanism responsible for this phenomenon is examined in this paper. Among various possible causes, the oxygen precipitates are found to be the main contributor for this MCLT fluctuation because the amount of oxygen precipitates after denuded zone formation is strongly related to the initial oxygen concentration in the wafer and this makes the MCLT value liable to be affected even for tiny initial oxygen difference. A gate oxide recipe is suggested to be adopted for MCLT monitoring in furnace performing denuded zone formation to circumvent the problem. For the gate oxide recipe, not only is the monitoring result stable but it is feasible to produce MCLT test wafers with real products without sacrificing tool productivity. </para>

This paper is concerned with organic contamination from a partially fluorinated o-ring used in a furnace for a high-temperature process. The organic outgas was confirmed by Fourier transform infrared analysis of the furnace exhaust gas. Experiments from practical trench dynamic random access memory disclosed that outgassed organic contaminants from the nitride process would severely worsen the tunneling leakage current performance of the storage dielectric and lead to fatal yield loss even though the cell capacitance was almost uninfluenced. To eliminate this yield detractor requires several test runs prior to real production after installation of the partially fluorinated o-ring; otherwise, a fully fluorinated o-ring is needed. From a cost viewpoint, the latter is highly suggested.

A cross-spacer phase change memory (PCM) cell with ultra-small lithography-independent contact area for reduced writing current has been successfully demonstrated. By crossing the spacer sidewalls of phase change and heater material, a small contact area of ~1,000 nm2 with 0.23 mA reset current is therefore obtained. The result of a derived 2-bit per cell (Chain) structure is also shown. The cross-spacer cell structure is a potential candidate for PCM with multi-bit per cell in one PC layer.

Aluminum oxide thin films have been prepared by the atomic layer deposition (ALD) using trimethylaluminum (TMA) and ozone as precursors. The process pressure was varied from at , and its effect on the film properties was compared to that of the deposition temperature change from . The film growth rate and film properties of thickness uniformity, impurity incorporation, and the step coverage in high aspect ratio features were characterized. It was found that the deposition temperature decrease led to film property deterioration and film growth rate increase. Increasing process pressure at lower temperature could not only help to retrieve the film properties, but also further increase the film growth rate. These improvements can be attributed to the change of surface saturation level, the enhancement of precursor diffusion condition, as well as the higher probability for surface reactions to occur at the active sites. The electrical and reliability performances on the dynamic random access memory capacitor confirmed the robustness of the high-pressure films. This study suggests that increasing process pressure may reduce the necessary cycle time/number to obtain the qualified film properties and the desired film thickness, which brings advantages of throughput for ALD semiconductor applications.

As design rule shrinking, it's more challenged to keep the enough capacitance for DRAM device requirement. For deep trench DRAM, one of methods supplied enough capacitance of providing deeper trench. Currently, the trench depth is over 6 mum for the 512M DRAM. In order to meet this stringent requirement, we need to care about not only the profile of deep trench (DT) but also the enough depth. Due to this high aspect ratio process is roughly over 60, it is very difficult for current inline defect monitor's method to check the abnormal trench profile. Traditional methods for verifying DT profile must destroy the wafer by the physical failure analysis. The wafer is analyzed by SEM (scanning electron microscope) to check DT cross-section or FIB (focus ion beam) to inspect slice view image. These methods provide difficultly the whole wafer map message for DT profile, offering merely random-cross-section inspection. Now we provide an inline-fast-effective method by the IR spectrum's analysis that can give the available message to monitor the DT profile

This chapter contains sections titled: Introduction Thyristor Characteristics Thyristor Variations Other Power Devices