STMicroelectronics (Switzerland)

Silicon carbide (SiC) is the leading wide bandgap semiconductor for high-power and high-temperature electronics, but the high defect density still limits device performance. This study investigates how inclusions, Basal Plane Dislocations (BPDs), and Threading Screw Dislocations (TSDs) in 4H-SiC substrates affect epitaxial defect formation. Twenty 200 mm SiC wafers were analyzed after epitaxial growth in two industrial Chemical Vapor Deposition (CVD) reactors, one using Trichlorosilane/Ethylene (Reactor A) and the other Silane/Propane (Reactor B). Defects were characterized using Candela (KLA), Altair (KLA), XRTmicron LAB (Rigaku), SICA (Lasertec), and Crossbeam (ZEISS) dual-beam SEM system. Statistical correlation showed that the conversion rate of embedded particles decreases with particle depth and increases with particle size. Reactor A exhibited lower propagation rates, indicating better suppression of substrate-related defects. SEM/FIB-EDX analyses suggested that carbon inclusions generate pits while metallic inclusions induce triangular defects. Dislocation analysis confirmed a strong correlation between TSDs and BPDs with carrots and triangular defects. BPD conversion rates were estimated at about 98.3% (Reactor A) and 99.8% (Reactor B). These results emphasize the importance of substrate quality and buffer layer optimization to minimize defect propagation.

TCAD simulations of the switching of power diodes are essential in the development process. Power diodes are optimized structurally to be compliant with the specifications required by the targeted applications. For silicon power diodes, carrier lifetime engineering is performed to modify the trade-off between the forward voltage drop (Vf) and the reverse recovery charges (Qrr). To precisely simulate the switching characteristics of the diode, the test circuit needs to be accurately modeled in the simulator. The industry standard for switching test circuits is the Double Pulse Test bench (DPT). It is essential to accurately model the power transistor in the test bench which is often an IGBT or a MOSFET. A finite element analysis (FEA) model of the transistor is ideal but is not necessarily available and increases simulation time drastically. This paper demonstrates that a simple analytical approach to modeling the characteristics of an IGBT is sufficient to perform mixed mode switching simulations of a lifetime engineered silicon power diodes and reduces simulation time.

Phase change memory (PCM) offers high density and low current operation for energy efficient in-memory computing (IMC). However, conductance drift is still a major challenge affecting the accuracy of IMC-based edge artificial intelligence (AI) accelerators. This work presents a new weight mapping technique to linearly compensate drift, thus ensuring the linearity of matrix-vector multiplication (MVM). We show a new integrated circuit for MVM capable of current subtraction in the analog domain. High inference accuracy is demonstrated for mapped deep neural networks (DNNs) even after extensive annealing, thanks to differential mapping and optimization of read voltage V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">read</inf> to mitigate drift-induced variations. These results support drift-compensated PCM as a robust technology for IMC-based edge AI inference.

We present, for the first time, a state of the art compact 3D LiDAR (Light Detection and Ranging) module with a resolution of up to 2.3k zones. It provides accurate ranging from below 5cm up to 9m. The sensor can stream processed point cloud data at a stable frame rate of 60Hz, which makes it the fastest, truly integrated 3D LiDAR camera module on the market.

This work presents a novel and fully virtual flow for extracting the SPICE model of a power MOSFET, starting exclusively from TCAD simulations. Unlike traditional approaches that rely on experimental silicon data, our methodology enables designers to optimize the device performance and extract accurate electrical parameters before any physical prototyping is required. By leveraging advanced TCAD tools, we generate a realistic device structure and obtain all the key electrical characteristics, which are then used for precise SPICE model extraction and macromodel integration. The extracted model is dynamically validated using a gate-charge test performed identically in both the TCAD and SPICE environments, demonstrating excellent agreement with less than a 2% error in the charge quantities, Qgs and Qgd. This approach proves that initial silicon prototyping can be confidently bypassed, and it is highly innovative because it enables designers to achieve highly faithful device simulations before hardware fabrication. This significantly reduces the need for costly and time-consuming prototyping and design re-spins, accelerating the development process while enhancing the accuracy in terms of the transient and dynamic characteristics of MOSFETs designed for specific applications; in our case, for an e-fuse to be integrated into a more complex system.

This paper reports on the structural and electrical properties of AlGaN/GaN heterostructures grown onto 2°-off-axis silicon carbide (4H–SiC) epitaxial layers. The quality of the grown heterostructures was assessed by a combination of different analytical techniques, revealing a density of conductive dislocations in the order of 1 × 109 cm−2. Electrical characterizations of test patterns and transistors provided insights into the transport properties in the two-dimensional electron gas channel, demonstrating a high current density and a field effect mobility (μFE) of about 1800 cm2/Vs. The temperature dependence of μFE allowed us to identify optical phonon scattering as the dominant transport mechanism in the system at high temperature. In addition to demonstrating the suitability of 2°-off-axis 4H–SiC epilayers for the growth of functional AlGaN/GaN high electron mobility transistors, these results provide useful insights for device manufacturers aiming at the monolithic integration of novel GaN devices onto SiC epitaxial layers.