A High-Performance Step-Down DC–DC Converter With Low Output Impedance

This paper describes a CMOS rail-to-rail class AB operational amplifier designed to have extremely low output impedance and large current-drive capability. The amplifier uses an innovative output stage, having both source follower and common source stages working simultaneously throughout the output common-mode range. The source follower ensures low output impedance, which enables it to drive relatively large load capacitors, while the common-source gain stage provides high current drive. Furthermore, the circuit is fully functional with supplies as low as 1.5 V. The amplifier is capable of driving a maximum output current of /spl plusmn/7 mA with only 140 /spl mu/A of total quiescent current, making it power efficient, and thus appropriate for low voltage battery-powered applications.

Novel high-voltage (HV), low-impedance voltage multipliers are described, which are capable of operating at high pulse repetition frequencies (PRF). Pulse generation is actively initiated by a HV thyratron operating below 40 kV and in the socalled RADAR mode for long life. The multiplier stages are switched with a high-performance, multi-winding, saturable-core inductor. This concept’ permits the construction of high-PRF megavolt pulsers with low output impedance (5 to 50 R) for use in high-energy accelerators, e-guns, X-ray generators and other pulsed power devices. Voltage risetimes in the 20 ns to 50 ns range are possible. Various multiplier configurations are discussed, including Marx banks, multistage LC-inverters and spiral generators. Results of computer simulations of sample pulsers are presented. A reliable 4-stage LC-inverter has been built, which generates 100 kV, 1.2 kA pulses at 200 hertz. It drives a low-impedance e-gun diode which is part of an X-ray generator.

The architecture level design of an impedance matching network is presented for the global system for mobile communication radio frequency (GSM RF) power amplifier module used in a typical cellular handset. Designs for the low and high output impedance of the power amplifier and 50 Ω antenna impedance are considered. Impedance matching network design is presented for a typical low output impedance (Z = 2-j*0.4 Ω) of the power amplifier and 50 Ω antenna impedance and is made adaptive for high output impedance (Z = 7+j*2 Ω). It is shown that the network can be made adaptive to varying output requirements of the power amplifier by tuning the network capacitance toward the antenna end. The architecture level design of a 25 Ω antenna impedance is also presented and shown that that the impedance matching network can be made adaptive, which would require the use of MEMS switches. The adaptive impedance matching networks can be implemented in a passive integration technology with post-processing for MEMS components.

10 - Basic analog electronics: Operational amplifiers

Bridges employing inductive voltage dividers are known to be more accurate and more stable than comparable bridges employing resistances as their adjustable elements. Inductive voltage dividers have other desirable properties that have received less attention. Among these are high input impedance, and low output impedance. These secondary advantages are discussed and a typical circuit is solved, both in the balanced and the unbalanced states. It is shown quantitatively that unbalance currents can flow without the necessity of magnetizing the dividers and that this can lead to output impedances that are almost entirely resistive, with negligible reactive components. This desirable state of affairs can exist because magnetic field is a vector quantity and the fields of two currents in an inductor can cancel. Similar possibilities seem to be lacking when resistors or capacitors are used.

In this paper, we propose an analog-to-digital converter (ADC) using a hybrid single-electron-transistor/complementary metal-oxide-semiconductor (SET/CMOS) universal literal gate based on the Coulomb oscillation phenomenon of a SET. The SET/CMOS universal literal gate consists of the SET/resistor inverter and the CMOS inverter, whose input is connected to the output of SET/resistor inverter. Because the CMOS inverter has the high input impedance and the low output impedance, the proposed circuit makes it possible to overcome the disadvantage of the high output impedance of a SET/resistor inverter by connecting its output to any input of CMOS circuit. The circuit has shown high immunity on temperature and can eliminate the background charge effect as applied to ADC. Using SPICE macromodel of SET at 30 K, we demonstrated the performance of a 4-bit ADC, composed of SET/CMOS universal literal gate and capacitive divider. These results can be simply extended to multi-bit ADC.

A tunable wideband linear CMOS transresistance (Rm) amplifier is proposed and analyzed. The proposed circuit consists of the positive current mirror cascode with negative current mirror. Output driver circuits with low output impedance and the negative feedback circuits are used for reduce the input and output impedance, increase bandwidth and enhance the linearity of the Rm circuit. The gain of the circuit can be also tuned by this shunt-shunt negative feedback.

Bioimpedance (BioZ) analysis has been recognized as a new paradigm to derive a number of body composition and hemodynamic measures in a non-invasive manner. Measuring the changes in electrical resistance of the thorax during a cardiac cycle, known as impedance cardiography (ICG), is beneficial in detecting early signs of heart failure deterioration [1]. This raises the need for power-efficient wearable BioZ sensors to enable long-term and user-friendly health monitoring, while state-of-the-art designs still suffer from a few drawbacks. First, conventional BioZ interfaces typically rely on gel electrodes (> 10cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) for low-impedance contact between skin and electrodes [1]–[2]. This not only hampers the long-term recording but also causes user discomfort. However, it is very challenging to perform small-size dry-electrode BioZ sensing at the frequency range of 1kHz to 1MHz, where both the increased electrode-tissue impedance (ETI) (-10MΩII0.5nF) and input parasitic capacitance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{\mathrm{p}}(&gt; 10\text{pF})$</tex> play a dominating role in attenuating the input signal (Fig. 20.1.1), resulting in gain inaccuracy and a long settling time [3]. To solve this issue, a BioZ amplifier with calibrated positive feedback [3] was proposed for input impedance boosting, which enables 1cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> dry-electrode BioZ sensing. Second, to identify small BioZ variation (0.01 to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1\Omega$</tex> ) over higher baseline impedance, i.e., ETI plus the static BioZ component, both the excitation current generator (CG) and the BioZ amplifier must feature low noise. Although dynamic element matching (DEM) is effective in alleviating the 1/f current noise of the CG [2], the input-signal-dependent noise of the amplifier remains a notable problem that severely reduces the measurement accuracy when the BioZ signal is large [4]. Furthermore, previous CGs employing complementary current sources suffer from current mismatch, resulting in low output impedance and limited voltage headroom [1]–[2]. A unipolar CG solves this problem, but both the sinusoidal CG and current sink amplifier are power-hungry [3]. Finally, state-of-the-art BioZ readouts [1]–[3] still require an extra electrode to bias the body and provide the input common-mode (CM) voltage, which further increases the system complexity.

A 1.2‐V fully integrated 0.35‐μm inductively degenerated common source CMOS low‐noise amplifier has been demonstrated at 2.4 GHz in this paper. A simple common source configuration can be operated at lower voltage and has lower output impedance when compared with a conventional high output impedance cascode LNA circuit topology. The input matching inductance, output matching inductance, and source degeneration inductance are integrated on a single chip. The fully integrated 2.4‐GHz CMOS LNA has 5.27‐dB power gain, 17‐dB input return loss, 15‐dB output return loss, 4‐dB noise figure, and −1‐dBm IIP1dB and 8‐dBm IIP3 at Vdd = 1.2 V and Idd = 10 mA, respectively. © 2002 Wiley Periodicals, Inc. Microwave Opt Technol Lett 36: 136–139, 2003; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.10699

In this paper, a new grounded inductor simulator employing two current feedback operational amplifiers (CFOAs), three resistors and one grounded capacitor which is suitable for IC fabrication is proposed. Also, a new voltage-mode (VM) universal filter with three input and single output is given as application example of the grounded inductor simulator. The universal filter with low output impedance can be easily cascaded with other VM circuits. Both of the proposed circuits have the feature of improved low frequency performances, and can be easily constructed by two commercially available active devices such as AD844s. However, both inductor simulator and universal filter need a single passive component matching condition. Simulation and experimental test results are given to demonstrate the performance and workability of the proposed grounded inductor simulator and filter structure.

Marsh, Hoffman, and Stitt (1979) described an electromechanical device that elicits a reflexive eye blink in human infants by employing a miniature solenoid to deliver a controlled tap to the glabella (the patch of flattened skin between the eyebrows). An optical device for measurement of the eye blink was described also. This unit illuminates the eye with infrared light that is modulated at 5 kHz. The detector circuit reads the light reflected from the eye (or eyelid) and filters out signals below 5 kHz so as to reject spurious signals resulting from fluctuating ambient light levels. As Marsh et al. noted, this circuit is somewhat susceptible to voltage transients, and hence one must use appropriate shielding if recording artifacts are to be avoided. In practice, this problem can sometimes be troublesome because of the many potential sources of electrical transients in most laboratory settings. This report describes a single circuit modification that completely and permanently corrects the problem. The detector's response to voltage transients is due to the rectifier stage described in Figure 5 of the paper by Marsh et al. (1979). In that figure, the 741 op-amp charges a .68-microF capacitor via a IN4148 diode. The op-amp is exquisitely sensitive to radio-frequency power-line transients, and because of its low output impedance, it quickly charges the capacitor as it propagates these transients. The correction is to cut the connection between the diode and capacitor and insert a 2.2-kohm resistor. With this change, the capacitor charging-time constant is still short enough that the detector faithfully follows variations in the 5-kHz carrier; but it is now long enough to make the circuit insensitive to brief transients.

Semiconductor charge-sensitive infrared phototransistors (CSIPs) based on quantum wells are described. They are the only detectors that are able to count single photons in the terahertz region at present. In terms of the noise equivalent power (NEP), the detectors show experimental values of 7 × 10−20 W/Hz1/2, while theoretically expected values are even much lower. These NEP values are by several orders of magnitude lower than any other state-of-the-art highly sensitive detectors. In addition to the outstanding sensitivity, the detectors are featured by strong advantage of huge current responsivity (&amp;gt;1 × 105 A/W) and low output impedance (&amp;lt;10 kΩ). This excellent performance in the above has been obtained for λ = 12–28 μm. By introducing a modified scheme of detection (called “lateral-escape”) along with an improved coupler structure (bowtie antenna), we have achieved similar excellent performance for 45 μm. The CSIP provides extremely promising detectors for a variety of applications covering a wide spectral range of 12–100 μm.

In this paper, first-order current mode universal filter based on new active analog block, differential voltage extra X current-controlled current conveyor (DV-EXCCCII) is proposed. This filter configuration can realize the first-order low-pass, high-pass and all-pass filter at a single-output terminal by proper selection of input signals without considering any matching condition. Proposed filter uses only one active block and one grounded capacitor making it easy for IC implementation. Filter circuit has low output impedance which enables easy cascadability of circuit, and also it is electronically tunable with bias current of DV-EXCCCII. Non-ideal behavior of the filter is explained, and sensitivities caused by these non-idealities are found to be low, and its magnitude is within unity. The proposed filter configuration is implemented in Cadence Virtuoso and simulated using UMC 180 nm CMOS technology process parameter.KeywordsUniversal filterElectronic tuningDV-EXCCCIICurrent mode circuitAnalog signal processing

In this paper, a rather simple controller without time delay is proposed for single-phase PWM inverters to achieve good output voltage tracking, zero steady-state error, very low output impedance and audio susceptibility. To enhance the design efficiency, closed form design rules for the proposed standard module controller are further derived. The required capacitance value of the filter is also derived to minimize the size, cost and losses. Finally, some simulation results with nonlinear loads are presented to verify the effectiveness of the proposed inverters

This paper presents CMOS circuit designs of a ternary adder and a ternary multiplier, formulated using transmission function theory. Binary carry signals appearing in these designs allow conventional look-ahead carry techniques to be used. Compared with previous similar designs, the circuits proposed in this paper have advantages such as low dissipation, low output impedance, and simplicity of construction.