A K-band CMOS Low-Phase-Noise Sub-harmonically Injection-Locked QVCO with Divider-less Frequency-tracking Loop

In this paper, modified circuit topologies of a differential voltage-controlled oscillator (VCO) and a quadrature VCO (QVCO) in a standard bulk 90-nm CMOS process are presented for low dc power and low phase-noise applications. By utilizing current-reuse and transformer-feedback techniques, the proposed VCO and QVCO can be operated at reduced dc power consumption while maintaining extraordinary circuit performance in terms of low phase-noise and low amplitude/phase errors. The VCO circuit topology is investigated to obtain the design procedure. The VCO is further applied to the QVCO design with a bottom-series coupling technique. The coupling network between two differential VCOs and device size are properly designed based on our proposed design methodology to achieve low amplitude and phase errors. Moreover, the VCO and the QVCO are fully characterized with amplitude and phase errors via a four-port vector network analyzer. With a dc power of 3 mW, the VCO exhibits a frequency tuning range from 20.3 to 21.3 GHz, a phase noise of - 116.4 dBc/Hz at 1-MHz offset, a figure-of-merit (FOM) of -198 dBc/Hz, a phase error of 3.8° , and an amplitude error of 0.9 dB. With a dc power of 6 mW, the QVCO demonstrates a phase noise of -117.4 dBc/Hz, a FOM of -195.6 dBc/Hz, a phase error of 4° , and an amplitude error of 0.6 dB. The proposed VCO and QVCO can be compared with the previously reported state-of-the-art VCOs and QVCOs in silicon-based technologies.

Design and analysis of low-phase-noise low quadrature error V-band subharmonically injection-locked quadrature voltage-controlled oscillator (QVCO) and quadrature frequency-locked loop (FLL) are presented in this paper using 90-nm CMOS process. A modified self-injection technique is employed in the QVCO to reduce quadrature error and phase noise. A transformer coupled topology is adopted to widen the locking range (LR) of the subharmonically injection-locked QVCO. With a subharmonic number of 3, the proposed subharmonically injection-locked QVCO demonstrates an overall LR of 3.5 GHz, a phase noise of −126.8 dBc/Hz at 1-MHz offset, a phase error of 0.32°, and an amplitude error of 0.26 dB. Moreover, the quadrature FLL is developed using the QVCO, and the subharmonic number can be up to 32 since the control voltage of the QVCO is adaptively aligned to overcome the LR. The operation frequency of the subharmonically injection-locked quadrature FLL is from 49 to 51.4 GHz. The measured amplitude and phase errors are 0.5 dB and 2.5°, respectively. Between 15 °C and 50 °C, the measured minimum phase noise at 1-MHz offset and jitter integrated from 1 kHz to 40 MHz are lower than −106 dBc/Hz and 110 fs, respectively. Compared to the prior art, the proposed $V$ -band subharmonically injection-locked quadrature QVCO and quadrature FLL feature excellent performance and good robustness.

In this paper, a very low power modified current-reused quadrature voltage-controlled oscillator (QVCO) is proposed with the back-gate coupling technique for the quadrature signal generation. By stacking switching transistors in series like a cascode, the modified current-reused QVCO can be constructed in a totem-pole manner to reuse the dc biasing current and lower the power consumption. By utilizing the back-gates of switching transistors as coupling terminals to achieve the quadrature outputs, the back-gate coupled QVCO improves the phase noise and reduces the power consumption compared to the conventional coupling transistor based topology. Together with the modified current-reuse and back-gate coupling techniques, the proposed QVCO can operate at reduced supply voltage and power consumption while maintaining remarkable circuit performance in terms of low phase noise and wide tuning range. With a dc power of 1.6[Formula: see text]mW under a 0.8[Formula: see text]V supply voltage, the simulation results show the tuning range of the QVCO is from 2.36 to 3.04[Formula: see text]GHz as the tuning voltage is varied from 0.8 to 0.0[Formula: see text]V. The phase noise is [Formula: see text]118.3[Formula: see text]dBc/Hz at 1[Formula: see text]MHz offset frequency from the carrier frequency of 2.36[Formula: see text]GHz and the corresponding figure-of-merit of the QVCO is [Formula: see text]183.7[Formula: see text]dBc/Hz.

This paper presents a fast and autonomous injection frequency tracking and locking technique. In the present injection-locking system, a quadrature injection-locked oscillator (QILO) is third harmonically locked to a quadrature voltage-controlled oscillator (QVCO). In the frequency tracking loop, the frequency difference between QVCO and QILO is extracted using the QILO's amplitude modulated (AM) envelope waveform. The AM frequency of the envelope signal bears frequency difference between the two oscillators. The envelope signal is further converted to pulse signal which subsequently drives digital feedback control circuitry to update the QILO's output frequency so that it can track the third harmonic of the injection QVCO. The frequency calibration process is purely autonomous, self-initiating whenever the AM modulated envelope waveform is generated. The feedback signal is primarily processed in the digital domain, resulting in a compact, fast, and power-efficient injection frequency-locked loop (IFLL). By incorporating a phase noise (PN) calibration routine after completing the frequency calibration, the presented IFLL resolves the intractable issue of PN degradation at the edge of the slave oscillator's injection locking range. This results in a large injection frequency tracking range of 26.5-29.7 GHz which is only limited by the QILO's LC tank tuning range. The IFLL realized in 0.13-μm CMOS consumes 2.4 mW with a negligible area penalty. Overall chip size including QVCO, QILO, and IFLL is 1 × 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

This letter presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two p-core cross-coupled voltage-controlled oscillators (VCOs) using indirect back-gate coupling. In conventional direct-back coupling the resonator's voltage swing, tuning range, and quality factor are respectively limited by the forward-conducting back-gate junction cut-in voltage, diffusion capacitance and small dynamic resistance. To generate quadrature phase signals with strong coupling strength and large output swing, the proposed design uses pMOSFETs as buffers between the back-gate diode and LC tank to eliminate the drawback in existing back gate coupling QVCOs. The proposed CMOS QVCO has been implemented with the TSMC 0.18 μm SiGe 3P6M technology. At the supply voltage of 0.8 V, the total power consumption is 4.4 mW. The free-running frequency of the QVCO is tuneable from 5.96 GHz to 6.60 GHz as the tuning voltage is varied from 0.0 V to 0.8 V. The measured phase noise at 1 MHz frequency offset is -120.5 dBc/Hz at the oscillation frequency of 6.59 GHz and the figure of merit (FOM) of the proposed QVCO is -190.4 dBc/Hz.

In this paper, a W-band quadrature voltage-controlled oscillator (QVCO) with an injection-locked frequency divider (ILFD) is presented using 40-nm CMOS process. The QVCO is designed using a modified self-injection topology to minimize the quadrature error and phase noise. The injection-locked technique is employed in the frequency divider to achieve high frequency with low dc power consumption, and the division ratio is 3. The measured tuning range of the QVCO is from 93.3 to 97.4 GHz with a single-end output power of higher than -24 dBm. The measured average free-running phase noise of the QVCO is -80 dBc/Hz at 1-MHz offset. The overall dc power consumption of the QVCO and ILFD is 43 mW. The presented circuits are suitable for the phase-locked loop frontend.

Low-power CMOS LC QVCO using zero-biased transistor coupling of MWCNT network-based VCO structure

This letter presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two complementary cross-coupled voltage-controlled oscillators (VCOs) coupled via varactors. The proposed CMOS QVCO has been implemented with the TSMC 0.18 μm CMOS technology and the die area is 0.61 × 0.95 mm2. At the supply voltage of 1.2 V, the total power consumption is 3.7 mW. The free-running frequency of the QVCO is tunable from 3.86 GHz to 4.22 GHz as the tuning voltage is varied from 0.0 to 1.2 V. The measured phase noise at 1 MHz frequency offset is -123.42 dBc/Hz at the oscillation frequency of 3.94 GHz and the figure of merit (FOM) of the proposed QVCO is -190.38 dBc/Hz.

This article presents a new fully‐integrated quadrature voltage‐controlled oscillator (QVCO), which consists of two differential VCOs coupled via an inductor‐ring. The proposed CMOS QVCO has been implemented with the TSMC 0.18‐μm CMOS technology and the die area is 0.693 × 0.976 mm 2 . At the supply voltage of 0.7 V, the total power consumption is 2.58 mW. The free‐running frequency of the QVCO is tunable from 5.15 to 5.55 GHz as the tuning voltage is varied from 0 to 0.7 V. The measured phase noise at 1 MHz frequency offset is −120.88 dBc/Hz at the oscillation frequency of 5.28 GHz and the figure of merit of the proposed QVCO is −191.21 dBc/Hz. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:310–313, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27283

A new schematic of quadrature voltage controlled oscillator (QVCO) is designed and fabricated. To obtain the quadrature characteristic and low phase noise simultaneously, two differential VCOs are forced to run in quadrature mode by using cross-coupled transistors, each with a source degeneration resistor, which is optimized to obtain quadrature accuracy with minimum phase noise. The designed QVCO was fabricated in standard CMOS technology. The measured performance shows the phase noise below -120 dBc/Hz at 1 MHz frequency offset, tuning bandwidth of 210 MHz from 2.34 GHz to 2.55 GHz with a tuning voltage varying from 0 to 1.8 V. Quadrature error of 0.5/spl deg/ and amplitude error of 0.2 dB were measured in conjunction with a low-IF mixer. The fabricated QVCO requires 19 mA, including 5 mA in the VCO core part, from a 1.8 V supply.

This paper presents a fully integrated 1.8 GHz, 0.35-mum CMOS quadrature voltage-controlled oscillator (QVCO) design. The topology uses coupled ring oscillators to produce quadrature outputs. In order to gain better phase noise performance LC-based filtering is introduced to QVCO. Also using variable inductance concept, a 1.2 GHz tuning range is achieved. According to simulation results, proposed QVCO draws 26.1 mA from 3.3V supply and exhibits a worst-case phase noise of -117.3 dBc/Hz at 1-MHz offset over the tuning range

This paper examines the impact of mutual inductance and parasitic capacitance on the phase-error performance for a class of CMOS quadrature voltage-controlled oscillators (QVCOs). Good agreement is found between theory, post-layout simulations, and measurement results. The QVCOs were implemented in a standard 0.35/spl mu/m CMOS process. All QVCOs display a center frequency of 2 GHz and a tuning range of 15%.

This paper presents new circuit topologies and design techniques for low-phase-noise CMOS mmWave Quadrature VCO (QVCO) and VCOs. A transformer coupling with extra phase shift is proposed in QVCO to decouple the tradeoff between phase noise (PN) and phase error and improve the PN performance. This technique is demonstrated in a mmWave QVCO with a measured PN of −119.2dBc/Hz at 10MHz offset of a 56.2GHz carrier and a tuning range of 9.1% (FOM <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</inf> of −179dBc/Hz). To our best knowledge, this QVCO has the lowest PN at 10MHz offset among all the QVCOs around 50–60GHz frequency range. In addition, an inductive divider feedback technique is proposed in VCO design to improve the transconductance linearity, resulting in larger signal swing and lower PN compared to the conventional LC VCOs. The effectiveness of this approach is demonstrated in a 76GHz VCO and a 90GHz VCO, both fabricated in a 65nm CMOS process, with an FOM <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</inf> of 173.6dBc/Hz and 173.1dBc/Hz, respectively.

This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs. The QVCO could be tuned between 2.41 and 2.64 GHz, and showed a phase noise of -139 dBc/Hz at 1 MHz offset frequency from the carrier across the whole tuning range, for a current consumption of 20 mA with 2.5-V power supply. A figure-of-merit of -190 dBc/Hz is observed.

This letter presents the design and fabrication of a Ku-band resonant tunneling diode (RTD)-based quadrature voltage-controlled oscillator (QVCO) with low dc power consumption and good phase noise characteristics using an InP-based RTD/HBT MMIC technology. In order to achieve a low power operation, an InP-based RTD is used for microwave quadrature signal generation based on an excellent inherent negative differential resistance (NDR) characteristic of the RTD achieved at a low applied voltage. The fabricated QVCO core shows a low dc power consumption of 1.46 mW with excellent phase noise of -121.14 dBc/Hz at a 1 MHz frequency offset. The obtained figure-of-merit (FOM) is -202.8 dBc/Hz at an oscillation frequency of 14.6 GHz, which is one of the best values among Ku-band quadrature VCOs reported up to date.