A mathematical model for the external scheduling of a cluster tool workstation

By extrapolating technological trends, one can expect future fabs to consist largely of highly reliable cluster tools. Such trends raise the issues of how cluster tools should be configured (i.e., how modules should be grouped together), and the impact of configuration on optimal lot size. This paper generates equation-based models to compare the throughput and cycle time of different systems that perform the same sequence of process steps, with the same total number of modules grouped in different ways into multiple cluster tools. The two extremes of the spectrum of possible cluster tool configurations are considered: the serial configuration, in which a wafer visits each module in the cluster tool, and the parallel configuration, in which all of the modules in the cluster tool are identical. The models predict the following for typical cluster tool parameters and process times. When all process step times are identical, systems of serial-configured tools can achieve the same throughputs with lower cycle times, as their parallel-configured counterparts. However, if process times in the sequence significantly differ from one another, then systems of parallel-configured tools may achieve lower cycle times than their serial-configured counterparts at high throughputs. Finally, the serial configuration significantly reduces the lot size required to achieve total throughput capacity.

Traditional rule-based cluster tool scheduling in semiconductor manufacturing faces significant limitations, including inflexibility, reliance on domain-specific expertise, and suboptimal performance in dynamic and complex environments. These methods often struggle to adapt to varying process conditions and equipment configurations, which are common in modern fabrications (fabs). Furthermore, previous research has typically relied on simplified simulators of cluster tools, failing to capture the full complexity of real-world semiconductor manufacturing equipment. To address these challenges, this study examines the potential of deep reinforcement learning (DRL) for optimizing cluster tool scheduling. This research presents a comprehensive simulation environment that models a cluster tool system, including both vacuum (VTM) and atmospheric (ATM) robots. This study progressively evaluates DRL agents, starting with a single-agent deep Q-network (DQN) and advancing to a multi-agent DQN (MADQN) framework to schedule the combined VTM-ATM system. Experimental results demonstrate that the proposed DRL agents consistently outperform traditional rule-based methods in terms of productivity and adaptability. In the complex multi-agent environment, the MADQN agent demonstrated robust performance across all tested configurations, achieving a productivity improvement of up to 8.9% over standard rule-based scheduling methods. These findings highlight the potential of DRL to overcome the limitations of existing scheduling methods and significantly enhance productivity in semiconductor manufacturing.

Cluster tools play an important role in the semiconductor fabrication industry. Optimization of an individual cluster tool maximizes productivity of mass fabrication. Optimizing the scheduler results in increased throughput. The cluster tool is a real-time, dynamic environment in which different parts interact. That is why it is necessary to have a dynamic scheduler that makes its decisions online and within an acceptable computation time in the presence of unexpected sporadic events. Our contribution is to develop and implement a scheduler for a cluster tool. Attributes of the scheduler are predictive, periodic and dynamic to satisfy real-time characteristics of the cluster tool. The major characteristic of the scheduler is that it is optimized to produce high throughput and low complexity, i.e. time to schedule as overhead. First steady-state and transient-state of the cluster tool are analyzed. Then different scheduling algorithms are experimented with and compared. As the results of experiments demonstrate, throughput is optimized in steady-state and transient-state of the scheduler with low overhead.

Most cluster tool scheduling studies assume identical access times between chambers or do not discuss the impact of access times. However, the optimal scheduling rule and the cycle time can depend on the access times or physical configuration of parallel chambers. Therefore, we examine cyclic scheduling problems for cluster tools that have nonidentical access times. We first develop Petri net models for tool behaviors and analyze the cycle time by identifying the workloads of the process steps. We prove that the conventional backward and swap sequencing strategies are still optimal for single-armed and dual-armed cluster tools, respectively, when a process step is the bottleneck and the tool repeats a minimal cyclic work cycle. We also present a closed-form formula for the cycle time and identify a coprime condition on the number of parallel chambers for which the cycle time is independent of the order of using parallel chambers. Finally, we develop a mixed integer programming model for cases in which the coprime requirement is not satisfied.

Green scheduling of dual-armed cluster tool based on cleaning scenarios

Capacity planning for cluster tools in the semiconductor industry

The throughput time within a cluster tool can be approximated as T+lt, where T is the fixed throughput time of the cluster, l is the lot size, and t is the average incremental throughput time resulting from a lot size increase of one wafer. Simulations of different cluster tools are used to illustrate and validate the model. The fixed throughput time (T) consists of both an external component associated with loadlock operations such as loading and pumping, and an internal component resulting from dynamic effects such as congestion in the cluster tool. The expressions for the incremental throughput time (t) includes the wafer handling time, and may include the module processing time. This model predicts that the maximum throughput rate of the cluster tool is 1/t, and that this throughput rate can only be achieved if multiple lots can simultaneously access the cluster tool. The model also predicts that this number of lots must increase, for example, as lot size decreases, the number of identical modules on a cluster increases, or lot loading time increases. This model was applied to a CVD cluster tool at Intel Corporation. The model predicted an increase in the cluster's throughput rate of roughly 10% over current operating practice, if one lot could be loaded while a different lot was being processed. The model was verified using a simulator and then on the cluster tool itself.

Integrated processing tools are becoming increasingly prevalent in modern fabs. Integrated tools consist of several process modules connected around a central handler such that the modules can process several wafers from the same lot simultaneously. Lithography cells and vacuum cluster tools are examples of integrated processors. Simple, intuitive models of the cycle time, throughput, and wafer cost of integrated tools are introduced. The models use two measurable parameters that aggregate tool operations: the incremental cycle time is the average increase in cycle time resulting from a lot size increment of one wafer and the fixed cycle time is the portion of cycle time that is independent of lot size. One example shows how an empirical analysis of a commercial CVD cluster tool was used with the models to identify opportunities to increase tool throughput. In a second example, analytical models of the incremental and fixed cycle times are used to provide insight into the effects of tool configuration on performance. Finally, simulations of single integrated tools are used to show some limitations of the model.

Cluster or chamber tools are often used in the semiconductor industry. In a research environment, moving to smaller device dimensions requires experimentation with new chamber types and materials to overcome challenges with Moore's Law. To make the most of expensive mainframes and clean room floor space multiple chamber types can be placed on one mainframe. Although this type of configuration can reduce cost while evaluating new complex processes, the efficiency of the tool as a whole can be drastically reduced. A major bottleneck within tools configured with multiple process chambers can be the load locks. These load locks are the single wafer entry point into the vacuum chamber. This paper will show the effect of load lock dedication on a sample multi-process chamber tool.

In semiconductor manufacturing, wafer residency time constraints make the scheduling problem of cluster tools complicated. A process module (PM) in cluster tools is prone to failure. It is crucial to deal with any such failure in a proper and timely manner. If there are feasible periodic schedules in operating a cluster tool before and after a PM failure, it is desired to make it operate continuously when such a failure occurs. However, due to wafer residency time constraints, it is highly challenging to control a tool such that it can be correctly transferred from a feasible schedule before failure to another after it. To solve this problem, a Petri net model is developed to describe the dynamic behavior of a single-arm cluster tool and failure response policies are proposed. The proposed policies are formulated via simple control laws for their easy implementation. Examples are given to show them.

In today's competitive semiconductor business environment, wafer manufacturers are facing continuous pressure to accurately predict cycle time and tool utilization, gauge the impact of changes in capacity available, assess the impact of changes in product mix and quantity, and determine action plans to improve operational performance. Discrete event simulation (DES) is a widely used approach to perform such an analysis. However, DES has some inherent shortcomings for these planning tasks. Analytical models, like queueing networks, have much shorter response times and additional advantages compared to DES. But due to the complexity of semiconductor manufacturing systems (SMS) queueing models were not able to model all the peculiarities of those. This paper provides an overview of the main features of the IBM Enterprise Production planning and Optimization System (EPOS), a queueing network based system, which closes this gap. EPOS has been in use in the 300 mm fabrication of IBM in Fishkill for more than 2 years and has turned out to be an invaluable tool to analyze the trade-offs of cycle time and capacity within this complex environment.

In today?s competitive semiconductor business environment, wafer manufacturers are facing continuous pressure to accurately predict cycle time and tool utilization, gauge the impact of changes in capacity available, assess the impact of changes in product mix and quantity, and determine action plans to improve operational performance. Discrete event simulation (DES) is a widely used approach to perform such an analysis. However, DES has some inherent shortcomings for these planning tasks. Analytical models, like queueing networks, have much shorter response times and additional advantages compared to DES. But due to the complexity of semiconductor manufacturing systems (SMS) queueing models were not able to model all the peculiarities of those. This paper provides an overview of the main features of the IBM Enterprise Production planning and Optimization System (EPOS), a queueing network based system, which closes this gap. EPOS has been in use in the 300 mm fabrication of IBM in Fishkill for more than 2 years and has turned out to be an invaluable tool to analyze the trade-offs of cycle time and capacity within this complex environment.

Modeling and implementing a real-time scheduler for dual-armed cluster tools

ABSTRACTA single wafer gate cluster tool has been evaluated in an effort to quantify the effects of gate clustering on defect density, process capability and device performance. The single wafer gate cluster tool consists of a hydrofluoric vapor (HF-vapor) pre-gate cleanup module, a rapid thermal oxidation (RTO) module and a polysilicon rapid thermal chemical vapor deposition (RTCVD) module. The gate dielectric charge to breakdown (Qbd) of capacitor structures formed using the integrated single wafer gate cluster tool process sequence typically averaged 9.1 to 12.3 coulombs per square centimeter (C/cm2). Excellent gate oxide integrity yield values in the range of 99.8% to 100% were also routinely obtained. The films were free of low field and mid field gate dielectric breakdown events and the devices exhibited dielectric breakdown field strength in excess of fourteen megavolts per centimeter (MV/cm). The cluster tool process was successfully integrated into a transistor device flow. The characteristics of devices formed using the cluster tool process were equivalent to those of devices formed using conventional batch processing at the gate level.

In semiconductor manufacturing, a process module (PM) failure in cluster tools (CTs) happens from time to time. To effectively operate a CT, such a failure should be handled in a proper and timely manner. This issue becomes much more complicated because wafer residency time constraints (WRTCs) must be met to ensure the quality for some wafer fabrication processes. With such constraints, if a tool is operated under a periodic schedule and a PM fails, it is desired that the tool can still operate under a periodic schedule if it is possible. Nevertheless, the periodic schedule after a PM failure must be different from that before its failure since in this case the tool is degraded. Thus, there must be a transient process between them. It is a great challenge to operate a tool such that it can go through such a transient process with WRTCs being always satisfied. This paper aims to solve this problem by proposing PM failure response policies which can successfully transfer a CT to the feasible schedule after failure from the one before a failure. Then, efficient algorithms are developed to improve these response policies. The proposed policies are composed of simple control laws such that they can be realized in real time and online. Illustrative examples are presented to show their applications.