Capacity planning for cluster tools in the semiconductor industry

Cluster or chamber tools are often used in the semiconductor industry. In a research environment, moving to smaller device dimensions requires experimentation with new chamber types and materials to overcome challenges with Moore's Law. To make the most of expensive mainframes and clean room floor space multiple chamber types can be placed on one mainframe. Although this type of configuration can reduce cost while evaluating new complex processes, the efficiency of the tool as a whole can be drastically reduced. A major bottleneck within tools configured with multiple process chambers can be the load locks. These load locks are the single wafer entry point into the vacuum chamber. This paper will show the effect of load lock dedication on a sample multi-process chamber tool.

Cluster tools play an important role in the semiconductor fabrication industry. Optimization of an individual cluster tool maximizes productivity of mass fabrication. Optimizing the scheduler results in increased throughput. The cluster tool is a real-time, dynamic environment in which different parts interact. That is why it is necessary to have a dynamic scheduler that makes its decisions online and within an acceptable computation time in the presence of unexpected sporadic events. Our contribution is to develop and implement a scheduler for a cluster tool. Attributes of the scheduler are predictive, periodic and dynamic to satisfy real-time characteristics of the cluster tool. The major characteristic of the scheduler is that it is optimized to produce high throughput and low complexity, i.e. time to schedule as overhead. First steady-state and transient-state of the cluster tool are analyzed. Then different scheduling algorithms are experimented with and compared. As the results of experiments demonstrate, throughput is optimized in steady-state and transient-state of the scheduler with low overhead.

Cluster tools are closed mini production environments that are especially used in the semiconductor industry. They consist of multiple processing chambers. In contrast to single processing tools they can handle multiple lots with different process characteristics at the same time. The major challenge for scheduling cluster tools is the hard to predict process times of even comparable lots as they strongly depend on a changing product mix over the tool. In this paper a mathematical model for the external scheduling of a cluster tool workstation is presented. The goal is to minimize the weighted cycle time by accounting for the changing cycle times of each lot. A MIP model assigns lots to tools of a workstation and determines for each lot the chambers, which are used during the processing steps inside the cluster tool. Finally the developed method is compared with a simulation that uses dispatching strategies.

Traditional rule-based cluster tool scheduling in semiconductor manufacturing faces significant limitations, including inflexibility, reliance on domain-specific expertise, and suboptimal performance in dynamic and complex environments. These methods often struggle to adapt to varying process conditions and equipment configurations, which are common in modern fabrications (fabs). Furthermore, previous research has typically relied on simplified simulators of cluster tools, failing to capture the full complexity of real-world semiconductor manufacturing equipment. To address these challenges, this study examines the potential of deep reinforcement learning (DRL) for optimizing cluster tool scheduling. This research presents a comprehensive simulation environment that models a cluster tool system, including both vacuum (VTM) and atmospheric (ATM) robots. This study progressively evaluates DRL agents, starting with a single-agent deep Q-network (DQN) and advancing to a multi-agent DQN (MADQN) framework to schedule the combined VTM-ATM system. Experimental results demonstrate that the proposed DRL agents consistently outperform traditional rule-based methods in terms of productivity and adaptability. In the complex multi-agent environment, the MADQN agent demonstrated robust performance across all tested configurations, achieving a productivity improvement of up to 8.9% over standard rule-based scheduling methods. These findings highlight the potential of DRL to overcome the limitations of existing scheduling methods and significantly enhance productivity in semiconductor manufacturing.

In semiconductor manufacturing, wafer residency time constraints make the scheduling problem of cluster tools complicated. A process module (PM) in cluster tools is prone to failure. It is crucial to deal with any such failure in a proper and timely manner. If there are feasible periodic schedules in operating a cluster tool before and after a PM failure, it is desired to make it operate continuously when such a failure occurs. However, due to wafer residency time constraints, it is highly challenging to control a tool such that it can be correctly transferred from a feasible schedule before failure to another after it. To solve this problem, a Petri net model is developed to describe the dynamic behavior of a single-arm cluster tool and failure response policies are proposed. The proposed policies are formulated via simple control laws for their easy implementation. Examples are given to show them.

The throughput time within a cluster tool can be approximated as T+lt, where T is the fixed throughput time of the cluster, l is the lot size, and t is the average incremental throughput time resulting from a lot size increase of one wafer. Simulations of different cluster tools are used to illustrate and validate the model. The fixed throughput time (T) consists of both an external component associated with loadlock operations such as loading and pumping, and an internal component resulting from dynamic effects such as congestion in the cluster tool. The expressions for the incremental throughput time (t) includes the wafer handling time, and may include the module processing time. This model predicts that the maximum throughput rate of the cluster tool is 1/t, and that this throughput rate can only be achieved if multiple lots can simultaneously access the cluster tool. The model also predicts that this number of lots must increase, for example, as lot size decreases, the number of identical modules on a cluster increases, or lot loading time increases. This model was applied to a CVD cluster tool at Intel Corporation. The model predicted an increase in the cluster's throughput rate of roughly 10% over current operating practice, if one lot could be loaded while a different lot was being processed. The model was verified using a simulator and then on the cluster tool itself.

In semiconductor manufacturing, a process module (PM) failure in cluster tools (CTs) happens from time to time. To effectively operate a CT, such a failure should be handled in a proper and timely manner. This issue becomes much more complicated because wafer residency time constraints (WRTCs) must be met to ensure the quality for some wafer fabrication processes. With such constraints, if a tool is operated under a periodic schedule and a PM fails, it is desired that the tool can still operate under a periodic schedule if it is possible. Nevertheless, the periodic schedule after a PM failure must be different from that before its failure since in this case the tool is degraded. Thus, there must be a transient process between them. It is a great challenge to operate a tool such that it can go through such a transient process with WRTCs being always satisfied. This paper aims to solve this problem by proposing PM failure response policies which can successfully transfer a CT to the feasible schedule after failure from the one before a failure. Then, efficient algorithms are developed to improve these response policies. The proposed policies are composed of simple control laws such that they can be realized in real time and online. Illustrative examples are presented to show their applications.

Green scheduling of dual-armed cluster tool based on cleaning scenarios

ABSTRACTA single wafer gate cluster tool has been evaluated in an effort to quantify the effects of gate clustering on defect density, process capability and device performance. The single wafer gate cluster tool consists of a hydrofluoric vapor (HF-vapor) pre-gate cleanup module, a rapid thermal oxidation (RTO) module and a polysilicon rapid thermal chemical vapor deposition (RTCVD) module. The gate dielectric charge to breakdown (Qbd) of capacitor structures formed using the integrated single wafer gate cluster tool process sequence typically averaged 9.1 to 12.3 coulombs per square centimeter (C/cm2). Excellent gate oxide integrity yield values in the range of 99.8% to 100% were also routinely obtained. The films were free of low field and mid field gate dielectric breakdown events and the devices exhibited dielectric breakdown field strength in excess of fourteen megavolts per centimeter (MV/cm). The cluster tool process was successfully integrated into a transistor device flow. The characteristics of devices formed using the cluster tool process were equivalent to those of devices formed using conventional batch processing at the gate level.

Silicon Pore Optics (SPO) provide high angular resolution with low area density as required for the International X-ray Observatory (IXO) or the Advanced Telescope for High Energy Astrophysics (ATHENA). The baseline for both telescopes consists of populating the mirror assembly with hundreds of SPO mirror modules. During the development of the process steps of the SPO technology, specific requirements of a future mass production have been considered right from the beginning. The manufacturing methods heavily utilise off-the-shelf equipment from the semiconductor industry, robotic automation and parallel processing. This allows to upscale the present production flow in a cost effective way, to produce hundreds of mirror modules per year. Considering manufacturing predictions based on the current technology status, we present an analysis of the time and resources required for a future flight programme. This includes the full production process starting with Si wafers up to the integration of the mirror modules. We present the times required for the individual process steps and identify the equipment required to produce several mirror modules per day. A preliminary timeline for building and commissioning the required infrastructure, and for flight model production of about 500 (ATHENA) and 2000 (IXO) mirror modules, is presented.

Today's advanced devices require increasing levels of process complexity. Semiconductor (SC) manufacturers are investigating higher levels of process integration using cluster tools as an approach to decrease process cycle times and increase yields.

In this paper, we propose a method, which uses Coloured Petri Net (CPN) and genetic algorithm (GA) to obtain an optimal deadlock-free schedule and to solve re-entrant problem for the flexible process of the cluster tool. The process of the cluster tool for producing a wafer usually can be classified into three types: 1) sequential process, 2) parallel process, and 3) sequential parallel process. But these processes are not economical enough to produce a variety of wafers in small volume. Therefore, this paper will propose the flexible process where the operations of fabricating wafers are randomly arranged to achieve the best utilization of the cluster tool. However, the flexible process may have deadlock and re-entrant problems which can be detected by CPN. On the other hand, GAs have been applied to find the optimal schedule for many types of manufacturing processes. Therefore, we successfully integrate CPN and GAs to obtain an optimal schedule with the deadlock and re-entrant problems for the flexible process of the cluster tool.

Motivated by the expansion of the modern wafer semiconductor industry, where the manufacturing process consists of multiple cluster tools, including robots and process modules, a coordination tool is developed based on supervisory control theory. The tool is parametric with respect to the number of cluster tools, the number of process modules of each cluster tool, and the number of product types, treated simultaneously in the cluster tools. In the present paper, a fully parametric model of semiconductor manufacturing processes will be developed, using the models of the robots and the models of the process modules. The desired operational specifications for the coordination of the subsystems of the process will be developed. The development of the supervisor design, realizing these specifications, will be initiated by the translation of the specifications to appropriate sets of regular languages. Next, each regular language will be realized by a respective supervisor automaton, expressed in parametric form. The supervisor design will be completed by the determination of the automaton of the total controlled process and the examination of its satisfactory performance, by proving the controllability of the desired languages and the nonblocking property of the total controlled process.

Scheduling of multicluster tools has received much attention due to its complexity of interaction among cluster tools. A cluster tool comprises several modules such as processing modules, a transfer module with a single or dual-armed handling robot, and loadlock modules. A multicluster tool comprises two, three, or more cluster tools that are interconnected with each other. In this paper, we propose a deadlock prevention policy for noncyclic scheduling of dual-armed multicluster tools. The proposed deadlock prevention policy is effective for generating an efficient schedule for two or three-connected multicluster tools with a single or a dual-path flow. This is proven by analyzing the strict minimal siphon of the Petri net model. The performance of the proposed method is compared with that of a maximal permissible deadlock prevention policy. The results demonstrate that the proposed method is computationally efficient for larger state spaces and more suitable than conventional deadlock prevention policies for generating effective schedules for noncyclic scheduling of multicluster tools. Note to Practitioners —Scheduling of multicluster tools has recently attracted attention in the growing semiconductor manufacturing industry. Most conventional studies on multicluster tools focus on cyclic scheduling to minimize cycle time with swap strategy. The challenge addressed by this paper is to derive a deadlock-free schedule for multicluster tools with noncyclic operations. We propose a simple deadlock prevention policy that can be applied to large-scale timed Petri net (PN) model of general multicluster tools without enumeration of siphon computations or solution of mixed integer programming. A timed PN model is developed for noncyclic operations of dual-armed multicluster tools with a dual ath. The computational results show that the approximately 10% of the total throughput of the proposed method is better than those of the conventional methods. It enables more efficient operations for noncyclic scheduling under transient periods including cleaning operations.

As features and dimensions become smaller, traditional laser processing in semiconductor industry are hitting its limitations due to the thermal effects inherited in long pulse processing. Ultrafast lasers become more reliable and are available commercially. However, their industrial applications, though very desirable due to their non-thermal nature processing, are only limited to those with high value added. Current status of ultrafast laser applications in semiconductor industry is reviewed. Shortcomings of current commercial systems are analyzed. Requirements for ultrafast laser based production system and future direction are discussed.