A Maude-Based Tool for Simulating DIMA Model

The lack of formalism and rigor in existing multi-agents models often leads to ambiguities and different interpretations. Those weaknesses combined with the inherent complexity of multi-agents systems generate many problems in their development process. Using formal notations to specify multi-agents systems’ behavior makes it possible to produce precise description. This also offers a better support to their verification and validation process. The Maude language, based on rewriting logic, presents a rich notation supporting formal specification and implementation of concurrent systems. In this paper, we demonstrate the feasibility and the interest of formalizing the behavior of DIMA model’s agents with the Maude language. The elaborated formal approach captures the inherent aspects of a DIMA model. The generated Maude descriptions have been validated using the platform supporting this language. Moreover, the proposed approach is generic and extensible. It offers, in particular, the advantage of being applicable to all multi-agents systems based on DIMA architecture and presents interesting extension possibilities.

A survey is presented of the evolution of performance modeling and of current trends in distributed systems. Also outlined is a proposal for integrated functional specification, time representation, and performance analysis. The author discusses two main trends, namely, a drastic change in modeling methodology and gradual changes to more formal model description techniques. The combination of process algebra and performance analysis assures constructivity. This means a systematic technique for the structured design of complex systems.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The visual modeling language UML embodies object-oriented design principles.It provides a standard way to visualize the design of a system. It exploits a richset of well-defined graphical notations for creating abstract models. However,the power of UML is lessened through partially specified formal semantics. Indeed, UML notations are semi-formal and do not lead to fully formalized andexecutable semantics. Fortunately, UML diagrams are prone to early formalization. Formal methods are a valuable tool that can help overcome the UMLconstructs’ shortage of firm semantics. It is a powerful way to ascribe precise semantics to the graphical notations used in UML diagrams and models.Our work aims to support the semantics of the UML Interaction Overview Diagram. It introduces an approach to leveraging the strengths of the MaudeRewriting Logic language as a formal specification language. The proposal relies on a model-driven engineering approach. It aims to automate the UMLInteraction Overview Diagram’s mapping to a Maude language specification.The Maude language and its linked tools, including the Maude Model Checker,are used to analyze and verify the resulting Maude specification. Finally, anapplication example shows the feasibility and benefits of the proposed approach.

The situation of telecommunications systems is rapidly evolving towards a state characterized by the presence of a multitude of services integrated in a single network structure. In order to ease their integration, it is important to provide an unambiguous description of the organization, of the functionality, and of the relationships existing among services. Since it is not possible to completely foresee the situation of services in the future, the description should be modular, so that the task of adding new services to an existing environment is simplified. Formal description techniques are languages designed to handle such descriptions. Their goal is to produce correct and unambiguous specifications, understanding and modeling the system and the domain within which it operates. Their input is a set of required statements and a conceptual overview of the system. Their output is a formal representation that captures the functional behavior. On the other hand, the throughput of physical networks is constantly growing, reaching the order of Gbit/s. In the meantime, services needing high throughput, like multimedia conferencing systems are being designed, creating a need for flexible, high performance communication systems. An important feature of new high speed services is their increased need for guarantees. Therefore, the use of powerful performance modeling techniques becomes of prime importance. Their goal is to obtain some notion of how the system will perform under a given set of conditions. Performance evaluation theorists have long been using system specifications to make a heuristic model of the system and then an analysis of the model. When system specifications exist, the question arises whether a more direct path to performance analysis can be found. Our scope is to provide a methodology that fully and consistently integrates formal specification and performance evaluation. A problem is that many of the bottlenecks and impediments to smooth data flow have to do with implementation issues not directly dealt within the system specification itself. Therefore, prior to generating a performance model, the formal specification should be enhanced with the relevant non-functional information. It is essential to assure a smooth specification of the non-functional information. Thus, it is necessary to consistently add this information to the formal specification. Besides, the extended formal method should focus on conserving the semantics of the original one, and on providing a coherent extension of the semantics and syntax for the new concepts. Since all relevant required information is integrated within the formal extended representation, we provide a mapping technique that translates the extended formal representation into a performance modeling conserving the properties of the formal model. In parallel to the development of a performance model, the formal model can be validated and verified, and their implementation can be tested for conformance towards the original formal model. Finally, the performance modelling is implemented in a programming language, and then simulated. The results from simulation can be reused as inputs for the optimization of the formal specification (functional optimization) or the extended formal model (design optimization). To sum up, the goal of this work is to: Define extensions to current formal methods that allow to enhance the formal specification with performance modeling related information. Develop a method to translate the extended formal specification into a performance modeling. Develop rules and guidelines to automatically implement the performance modeling for the purpose of a performance evaluation (we use the commercial tool Opnet). Develop a consistent and coherent methodology for the integration of performance modeling and formal specification.

The increasing complexity and connectivity of automotive systems have raised concerns about their vulnerability to security breaches. As a result, the integration of formal methods and validation techniques has become crucial in ensuring the security of automotive systems. This survey research paper aims to provide a comprehensive overview of the current state-of-the-art formal methods and validation techniques employed in the automotive industry for system security. The paper begins by discussing the challenges associated with automotive system security and the potential consequences of security breaches. Then, it explores various formal methods, such as model checking, theorem proving, and abstract interpretation, which have been widely used to analyze and verify the security properties of automotive systems. Additionally, the survey highlights the validation techniques employed to ensure the effectiveness of security measures, including penetration testing, fault injection, and fuzz testing. Furthermore, the paper examines the integration of formal methods and validation techniques within the automotive development lifecycle, including requirements engineering, design, implementation, and testing phases. It discusses the benefits and limitations of these approaches, considering factors such as scalability, efficiency, and applicability to real-world automotive systems. Through an extensive review of relevant literature and case studies, this survey provides insights into the current research trends, challenges, and open research questions in the field of formal methods and validation techniques for automotive system security. The findings of this survey can serve as a valuable resource for researchers, practitioners, and policymakers involved in the design, development, and evaluation of secure automotive systems.

Nowadays formal specification techniques have become popular in the development process of many kinds of software systems. Since many technical scenarios are based on computer control, their software implementations also depend on previously established formal descriptions. Additionally, technical information systems such as production control facilities often have a long life span. Due to this fact, dynamic changes become increasingly likely. For example, these changes may be induced by introduction of new laws, altered production goals, human interactions, or any other kind of external influences. However, these changes sometimes require an alteration of the software. To fit the implementation, its formal specification (if present) has to be adapted appropriately. Ordinary specification methods do not permit a post-implementation change in the specification itself but rather an afresh specification effort throwing away the current formal description. Since the necessary changes would frequently result in minor adaptations in the specification, this situation is very unsatisfactory. To avoid or reduce this re-specification effort, we are working on extensions of established specification techniques which can cover adaptive specifications. The remainder of this paper is organized as follows. Section 1 introduces our project and presents a simple classification of adaptive specifications. In Section 2 we briefly present the main issues of the case study and motivate adaptive specifications. Subsequently we suggest some syntactical extensions of TROLL in Section 3. And finally, Section 4 gives an outlook on future work in this project.

Ubiquitous embedded systems are revolutionizing our daily lives. Whole systems on a chip deliver unprecedented computation power at ever decreasing costs. However, their complexity makes their design with traditional RTL-based flows extremely challenging. Complexity in such systems arises not only from the diversity of the technologies, from RF front-ends to baseband DSP software, that must be integrated on-chip, but also from the fact that such systems must be increasingly built from parts that have been designed separately and using different tools and flows. High abstraction levels and component reuse are essential. Often such systems are highly networked and rely on sophisticated communication mechanisms. Architectural design and performance analysis of such networked system-chips is a crucial part of the embedded system design process.Two basic methods for tackling the growing complexity of system-on-chip design are emerging. Formal specification and design methods, and platform-based design. Formal methods are essential to capture precisely the designer intent at the highest possible level of abstraction, and to guide him down towards an implementation. Design errors are reduced by the use of synthesis techniques, as well as by the availability of a variety of validation techniques. Moreover, the orthogonalization of concerns (e.g., computation vs. communication, function vs. architecture) promotes extensive reuse of both parts of an application (derivative designs) and of previously used architectures.A platform in this context is the precise specification of a high-level implementation target that supports both a variety of lower level implementations, and a variety of higher-level applications. A classical example is the PC, that has supported an explosive growth of both applications and implementations. In embedded systems-on-chip platform clearly need to be application-specific. A typical platform includes one or more processors, memory, one or more bus hierarchy levels, and peripherals devoted to application-specific functions (e.g., MPEG decoding, filtering, A/D conversion, ...). Mapping to a platform involves identifying which portions of the application will be implemented on each computation and communication resource. Communication must be refined from high-level primitives (e.g., FIFOs) down to platform primitives (e.g., interrupts, memory buffers, ...). Functionality must be synthesized and scheduled based on platform-specific cost, memory and performance constraints.In this tutorial we will cover both aspects in detail, illustrating first the languages and Models of Computation available to the system-level designer to capture precisely and unambiguously the requirements. We will discuss for what application domain and platform each language is most appropriate, focusing mostly on platform-independent languages and MOCs, since they support the greatest freedom in mapping choice. We will then discuss how the architecture of the platform, and the services it offers to the application designer, can also be formally and compactly captured and specified. We will show how the mapping paradigm can be used to select an implementation for the functional blocks and their communication, and how simulation and implementation methods can be derived automatically. In particular, we will describe how software estimation and synthesis for reactive real-time systems can be competitive with hand design, while retaining the ease of re-use typical of high-level specifications.In the next part of the tutorial, we will establish the importance of on-chip communication architectures in determining the performance of System-on-Chips (SoCs). We will track several on-chip communication architectures that are in use today, including different types of bus architectures, token ring architectures, and crossbar switches. We will analyze the performance of the existing communication architectures under different classes of on-chip communication traffic. We will also describe novel on-chip communication architectures that are being developed to satisfy the growing needs of fast and concurrent on-chip communication in very high-performance systems like network processors. Next, we will describe efficient methodologies that can be used to analyze and design customized on-chip communication architectures for new application-specific platforms, as well as optimally map an application's communication requirements to the communication architecture present in an existing platform. We will also discuss reconfigurable on-chip communication architectures that allow runtime adaptation of the communication protocols to changing communication demands of the platform. Besides performance, we will analyze the energy consumed by on-chip communication architectures, and describe techniques to minimize such energy consumption. Lastly, we will analyze the impact of deep sub-micron technologies on SoC communication, and discuss the needs for development of noise-aware on-chip communication.

Many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased assurance for such applications. Earlier error of overlooked requirement specification can be detected using formal specification method. Also the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In this paper, we proposed an eclectic approach to incorporate Z(Zed) formal language and ‘Statemate MAGNUM’ which is formal method tools using Statechart. Also we applied the proposed method to safety-critical railway signaling systems for the formal requirement specification and analyzed the specification results.

Despite their potential, formal methods have had difficulty gaining acceptance in the industrial sector. Some complaints are based on supposed impracticality: many consider formal methods to be an approach to system specification and analysis that requires a large learning time. Contributing to this scepticism is the fact that some types of formal methods have not yet been proven to handle systems of realistic complexity. To learn more about how to design formal specification languages that can be used for complex systems and require minimal training, we developed a formal specification of an English language specification of the vertical flight control system similar to that found in the MD-11. This paper describes the lessons learned from this experience.

Formal description of network behavior is the important part in network management. But some problems have not yet to be adequately addressed are the semantic and behavioral aspects of composition in this domain. Therefore a formal description method was presented to network behavior. The method includes a simple formal language, and its semantic was described by CSP. The formal language has graphical syntax with topology style. And it also has some characters that are suitable for the formal research and analysis about some problems in network management. Consequently, the method can be used to provide precise formal description and analysis about network behavior. And a reliable mathematical foundation is also provided for the correctness and validity of software system design.

In most studies of bridging between informal specifications, formal specifications are transformed from informal specifications after completion of specification of the whole system. Most of these formal specifications are used for rigorous study of the system in question, consistency checking, verification of behavior or support system synthesis. During the process of system specification, the strength of formal and informal methods are not complementing to each other. We identified a new specification approach which makes formal methods and informal methods complement each other to a greater extent. This new method interweaves formal methods with informal methods. We find out that this method leads to better quality of specifications, facilitate better changes management and maintenance. This is particular useful during initial specification of systems which is the first stage of specifying informal world in some formal languages. We report our preliminary findings of this novel approach in this paper and exemplify our approach with an example in JSD and CSP.

Focusing on the functional testing of embedded software, this paper studies the formal testing model based on extended finite state machine. Then, the authors summarizes the complete construction process of embedded software testing based on formal specification and design the formal testing framework of embedded software. This framework describes the complete formal test execution flow from formal description of software requirements to the final test report. It solves the problems of the engineering application which is difficult to promote by formal test methods in embedded software. Finally, based on the results of theoretical research, a typical example of embedded application is verified to prove the effectiveness of the method.

We highlight the limitations of formal methods by exhibiting two results in recursive function theory: that there is no effective means of finding a program that satisfies a given formal specification; or checking that a program meets a specification. We exhibit a simple MAS which has all the power of a Turing machine. We argue that any pure design methodology will face insurmountable difficulties in today's open and complex MAS. We recommend instead a methodology based on experimental method - scientific foundations for MAS construction and control.

When presented with two fully proved formal methods-based specifications, how can a System Engineer decide which is superior when both models specify the same requirements, but in two different ways? This paper investigates and propose a methodology by which formal methods (using the specific example of the Event-B notation) can be differentiated in terms of their quality, using criteria that may be highly subjective in nature. Established complexity functions applied to software are not applicable to formal methods, thus the paper proposes a new function which quantifies the “quality” of a given model. Complexity is not the only factor involved in determining the quality of formal methods, the quality of system thinking involved also play an impactful role. We propose a quality function which uses the well-established properties of axiomatic systems in theoretical mathematics with the addition of a specifically formulated complexity function. The distinction criteria are based on evaluating how four main properties have been achieved: “Consistency”, “Completeness”, “Independence” and “Complexity”. We base our approach according to the paradigm of; “if the formal specification looks visually complicated for a set-theory novice, then it is a poorly modeled specification”. Furthermore, we explore the notion of Miller’s rule (magic No. 7) to define what “good” should look like. We conclude that we need more than Miller’s 7, we need 1, 2 and 3 to help us with defining what good quality looks like, by taking human cognitive capacity as a benchmark. This novel approach implies considerable further research, described in future work section.

The feature model considers several products as a collection of features and describes the commonality and variability of the family in terms of feature relationships. Traditional informal feature models lacked the support of tools to automate the process of feature modeling, so formal methods were introduced implement automated support for feature modeling tools. For large software, writing formal specifications for feature models directly is quite difficult and requires technical background and experience. In this paper, we propose a formal template-based approach to constructing feature models and their formal descriptions, each template is used to formalize a class of PFA expressions. We give a structural definition of the templates and for constructing feature models from templates and generating formal descriptions of the corresponding features. We give a case study to illustrate the effectiveness of our method.