A modified SEPIC converter with soft-switching feature for power factor correction

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn- on of part power switch and soft turn- off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis.

This paper proposes a three-phase power factor correction (PFC) for a three-phase induction motor (IM) drive under normal and abnormal supply voltage conditions. A new technique of PFC based on a positive sequence components method is introduced. The PFC circuit uses a SEPIC converter with a single switch, which needs only one control signal. The PFC control method with the proposed technique provides nearly sinusoidal supply currents maintaining a high power factor under different supply voltage conditions. Furthermore, the PFC method maintains DC bus voltage at the desired value. The regulated DC voltage feeds a four-switch inverter of the three-phase IM drive system. Mathematical analysis of the equivalent circuits based on operation modes of the SEPIC converter is introduced. The performance of the proposed technique is evaluated under ideal and non-ideal supply voltage conditions. The results are analyzed in terms of reduction in the THD of supply currents and improvement of power factor. System validation performed in simulation and experiment has shown the effectiveness of the proposed system under different supply voltage conditions.

In this paper, a coupled-inductor Sepic-type power factor corrector (PFC) with soft-switching is proposed to drive high brightness LED panel. The two inductors in the Sepic-type PFC are magnetically coupled to lower volume. A soft-switching cell composed of an active switch, a resonant inductor and a resonant capacitor is embedded into the PFC to obtain zero-voltage switching (ZVS) feature so as to promote converter efficiency. The proposed PFC is suitable for universal-line input 85Vac ~ 265 Vac for low output voltage applications. Over the input voltage range, it can achieve high efficiency and high power factor. To drive LED panel, a digitalized feedback control loop is adopted to accomplish current sharing, voltage regulating, and dimming feature. A prototype is designed, analyzed and implemented to demonstrate the feasibility of the Sepic-type PFC. Simulation results and hardware measurements have illustrated that the proposed PFC driving LED panel can achieve high power factor, improve efficiency, and accomplish current sharing and dimming feature.

An AC -DC converter with power factor correction (PFC) function is proposed in this paper. In the proposed converter, the boost PFC stage and the active-clamp DC-DC converter stage are merged into a single converter to reduce the overall cost and improve the power density. An active-clamp DC-DC converter stage can suppress the switch voltage stresses and provide zero-voltage-switching (ZVS) operation of the switches. The boost converter in PFC stage operates in discontinuous conduction mode (DCM) and it provides naturally high power factor. Due to the ZVS operation, the switching losses of the proposed converter are significantly reduced and the efficiency is improved. Steady-state analysis is performed. Simulation results are also provided to verify the effectiveness of the proposed converter.

Front end PFC (power factor correction) boost ac-dc converter is an intrinsic part of applications like telecom servers, electric vehicle (EV) charging, and microgrids. In this paper a bridgeless PFC boost rectifier with two dc/dc boost circuits topology is employed to convert universal ac input to a fixed and regulated output dc voltage. High efficiency and power density are key figure-of-merits of boost PFC ac-dc converters. In this converter the conduction losses are reduced owing to the bridgeless topology and the boost diode reverse recovery is eliminated using MOSFETs for synchronous rectification. The converter operates in continuous conduction mode (CCM), at a switching frequency of 500 kHz. At high switching frequency and at CCM, soft-switching is necessary, therefore a passive auxiliary circuit is used to achieve zero voltage switching (ZVS). In order to increase the power density, the boost and the auxiliary inductors are magnetically coupled with a very low coupling coefficient. This coupling reduces the volume of the magnetics, although there is some loss due to the additional circulating current resulting from the coupling, however this loss is not that significant. Although passive auxiliary circuit adds more components, however at 500 kHz switching frequency these passive components do not occupy significant space. The soft-switching improves the efficiency and reduces EMI noise and cooling requirements. The detailed analysis, design and simulation results using PSIM are provided to validate the theoretical claims.

The use of silicon carbide diodes as alternatives to standard silicon power diodes in a zero-voltage switched (ZVS) 800W boost power factor correction (PFC) converter is examined experimentally. The PFC circuit examined is a part of a base station power supply. Efficiency improvement by using SiC diodes in hard-switched PFC boost power converters has been demonstrated by others, and is considered by many to be an ideal solution. Incorporating SiC diodes in a ZVS topology further improves the performance of the topology. Comparisons are made between ZVS circuits using standard silicon power diodes and an equivalent circuit using SiC diodes. Simplification of the overall circuit, improvement in operating efficiency and improvements in line conducted EMC performance are observed. The paper concludes that the use of SiC diodes in high wattage applications can further improve performance characteristics of ZVS PFC boost converters.

This paper presents a dimmable charge-pump driver to power light-emitting diodes (LEDs) with power factor correction (PFC) and Zero Voltage Switching (ZVS). The proposed LED driver does not utilize electrolytic capacitors, providing a high useful lifetime, and it can stabilize the output current in open loop control without needing current sensors, which reduces the cost. The output power is proportional to the switching frequency, which allows the LEDs dimming. A prototype with 22 W was implemented and experimental results were discussed. The prototype presented a power factor of 0.996 and an efficiency of 89.5 %. The driver output power was reduced by more than 40% through the switching frequency while varying of 53 kHz to 30 kHz and the converter has continues to operate in ZVS.

Since power systems with a DC distribution method has many advantages, such as conversion efficiency increase of about 5–10%, cost reducing by about 15–20% and so on, the AC distribution power system will be replaced by a DC distribution one. This paper presents a DC load power system for a DC distribution application. The proposed power system includes two converters: DC/DC converter with battery source and power factor corrector (PFC) with a line source to increase the reliability of the power system when renewable energy or energy storage equipment are adopted. The proposed PFC adopts a bridgeless flyback converter to achieve power factor correction for supplying power to DC loads. When the bridgeless flyback converter is used to achieve PFC, it needs two transformers to process positive and negative half periods, respectively. In order to increase conversion efficiency, the flyback one can add two sets of the active clamp circuit to recover energies stored in leakage inductances of transformers in the converter. Therefore, the proposed bridgeless flyback converter can not only integrate two transformers into a single transformer, but also share a clamp capacitor to achieve energy recovery of leakage inductances and to operate switches with zero-voltage switching (ZVS) at the turn-on transition. With this approach, the proposed converter can increase conversion efficiency and decrease component counts, where it results in a higher conversion efficiency, lower cost, easier design and so on. Finally, a prototype with a universal input voltage source (AC 90–265 V) under output voltage of 48 V and maximum output power of 300 W has been implemented to verify the feasibility of the proposed bridgeless flyback converter. Furthermore, the proposed power system can be operated at different cases among load power PL, output power PDC1 of DC/DC converter and output power PDC2 of the proposed PFC for supplying power to DC loads.

This paper proposes a digital control system, based on the Steinmetz method and instantaneous power theory, applied to the static var compensator to compensate the unbalance between the phases and the power factor of loads. The proposal incorporates an additional digital filtering system for elimination of harmonic components and for the extraction of positive-sequence voltage. The experimental results demonstrated good precision in the compensation of the unbalance and in the correction of the power factor. The experimental tests indicate reduction of the unbalance factor of 44.9% to 3.3% and correction of the fundamental power factor to the unit.

This paper provides a novel soft-switching half-bridge power factor corrector (PFC) with output voltage balance control using zero-current-switching (ZCS) auxiliary resonant circuits. In proposed soft-switching PFC, ZCS's on the active switches are achieved without additional current stress. The steady-state analysis is performed for operation illustration and the small-signal analysis is also built up for output regulation control. An average-current-mode for power factor correction is utilized to control the proposed soft-switching half-bridge PFC in the continuous conduction mode. The balance control technique is designed to overcome the two output capacitor voltage imbalance that is inherent in half-bridge topology. The operational principles, design considerations and realizations are discussed and verified. The prototype specification of the proposed soft-switching half-bridge PFC is rated at 400W and operates at 30kHz, with an input ac voltage of 110V rms and a regulated output voltage 400V dc , for experiments to verify the theoretic analysis.

A novel three-phase major circuit topology is proposed in this paper and its circuit design is also given. Its characteristic is that specific PFC integrated circuit is not applied in this AC-DC converter, there are less circuit components and its power factor is very high. Moreover, its operation principle and power factor correction principle are discussed and analyzed in detail. Its simulation results operating in different duties using MATLAB/SIMULINK are also given. The rationality and correctness of its circuit topology and principle are explained and verified by theory analysis and simulation results.

This paper presents a new single phase front-end ac-dc bridgeless power factor correction (PFC) rectifier topology. The proposed converter achieves a high efficiency over a wide range of input and output voltages, a high power factor, low line current harmonics and both step up and step down voltage conversions. This topology is based on a non-inverting buck-boost (Zeta) converter. In this approach, the input diode bridge is removed and a maximum of one diode conducts in a complete switching period. This reduces the conduction losses and the thermal stresses on the switches when compare to existing PFC topologies. Inherent power factor correction is achieved by operating the converter in the discontinuous conduction mode (DCM) which leads to a simplified control circuit. The characteristics of the proposed design, principles of operation, steady state operation analysis, and control structure are described in this paper. An experimental prototype has been built to demonstrate the feasibility of the new converter. Simulation and experimental results are provided to verify the improved power quality at the AC mains and the lower conduction losses of the converter.

In this paper, a new single-phase Power Factor Corrector (PFC) based on the Sheppard-Taylor topology is studied. Compared to conventional buck, boost or buck-boost PFCs, this topology allows a better current tracking at the AC side, with a relatively reduced voltage at the DC side. Consequently, the high frequency AC filters required by the buck PFCs are avoided, and the voltage stresses on the boost switches are significantly reduced. Furthermore, the control detuning phenomenon, from which suffer most of the conventional PFCs, especially at very low input voltage, is avoided. This yields major improvements in the source current waveform. Compared to the conventional Sheppard-Taylor converter, this new topology allows lower voltage stresses across the capacitors and larger output voltage range for the same operating area. The converter is integrated as a PFC at the DC-end of a single-phase diode bridge. Pulse-Width-Modulated (PWM) multi-loops control schemes are proposed and developed in order to ensure a unity power factor at the AC-source side and a regulated voltage at the DC-load side. The first one uses the simple and robust hysteretic-based controller, the second one employs a conventional PI regulator, whereas the third one is based on the model nonlinearity compensation approach. The design of the last two control methods is based on the state-space averaged model of the converter. The performance of the different control strategies is evaluated through simulation experiments carried out on a numerical version of the converter. The implemented model of the converter is obtained by using the switching function technique. The control system is tested under both rated and disturbed operating conditions. The system performance is evaluated in terms of source current Total Harmonic Distortion (THD), input power factor, DC voltage stabilization, and regulation following load variations.

There is a need to improve the power quality of the grid as well as the power factor implied on the grid due to the nonlinear loads connected to it. A new single phase bridgeless AC/DC power factor correction (PFC) topology to improve the power factor as well as the total harmonic distortion (THD) of the utility grid is proposed in this research. By eliminating the input bridge in conventional PFC converters, the control circuit is simplified; the total harmonics distortion THD and power factor PF are improved. The controller operates in multi loop fashion as the outer control loop calculates the reference current through innovative filtering and signal processing. Inner current loop generates PWM switching signals through the PI controller. Analytical derivation of the proposed converter is presented in detail. Performance of the proposed PFC topology is verified for prototype using PSIM circuit simulations. The experimental system is developed, and the experimental results agree with simulation results.

<div class="section abstract"><div class="htmlview paragraph">As light electric vehicles (LEVs) gain popularity, the development of efficient and compact on-board chargers (OBCs) has become a critical area of focus in power electronics. Conventional AC-DC topologies often face challenges, including high inrush currents during startup, which can stress components and affect system reliability. Furthermore, DC-DC converters often have a limited soft-switching range under light load conditions, leading to increased switching losses and reduced efficiency. This paper proposes a novel 6.6 kW on-board charger architecture comprising a bridgeless totem-pole power factor correction (PFC) stage and an isolated LLC resonant DC-DC converter. The main contribution lies in the specific focus on enhancing startup behavior and switching performance. In PFC converters, limiting inrush current during startup is crucial, especially with fast-switching wide-bandgap devices like SiC or GaN. Conventional soft-start techniques fall short in of ensuring smooth voltage transitions. Moreover, maintaining stable operation across a universal input voltage range and achieving a high-power factor under light load conditions remain persistent challenges. Although resonant converters are widely used for their natural soft-switching ability, achieving zero voltage switching (ZVS) over a wide range of loads, especially at light load conditions, is still a technical challenge. Existing solutions rely on complex control strategies or hardware modifications, which increase cost and design complexity. The proposed architecture was modeled and simulated using MATLAB/Simscape to assess dynamic and steady-state behavior under a range of operating conditions. Results demonstrated high input power factor, line/load regulation, and switch-node waveforms to confirm ZVS operation. Additionally, the proposed charger exhibits low harmonic distortion, ensuring compliance with IEC 61000-3-2 power quality standards. These findings confirm the topology’s effectiveness for high-performance LEV charging and set a strong foundation for future experimental validation and hardware development.</div></div>