A programmable vision chip for CNN based algorithms

We describe a novel cellular connectionist neural network model for the implementation of clustering-based Bayesian image segmentation with Gibbs random-field spatial constraints. The success of this algorithm is largely due to the neighborhood constraints modeled by the Gibbs random field. However, the iterative enforcement of the neighborhood constraints involved in the Bayesian estimation would generally require tremendous computational power. Such computational requirement hinders the real-time application of the Bayesian image segmentation algorithms. The cellular connectionist model proposed aims at implementing the Bayesian image segmentation with real-time processing potentials. With a cellular neural network architecture mapped onto the image spatial domain, the powerful Gibbs spatial constraints are realized through the interactions among neurons connected through their spatial cellular layout. This network model is structurally similar to the conventional cellular network. However, in this new cellular model, the processing elements designed within the connectionist network are functionally more versatile to meet the challenging needs of Bayesian image segmentation based on the Gibbs random field. We prove that this cellular neural network does converge to the desired steady state with a properly designed update scheme. Examples of CT volumetric medical image segmentation are presented to demonstrate the potential of this cellular neural network for a specific image segmentation application.

We describe the analog CMOS VLSI implementation of a cellular neural network (CNN) architecture which spatially filters a 2D image by two orientation selective image filters. The image is represented by a set of input currents supplied by an on-chip array of photosensors. The filters are similar to even and odd Gabor filters. The CNN architecture is implemented using two resistive networks coupled by transconductance amplifiers. The tuned orientation can be steered and the filter response scaled by adjusting the conductances of the resistors and gains of the transconductance amplifiers through externally supplied bias voltages. The circuit operation is explained via a variational principle, which defines the filter output as the minimum of a cost function. We report test results from both 25 × 25 and 45 × 45 pixel arrays.

We present the packet wavelet coder implemented with cellular neural network architecture, and show its superiority over the pyramidal wavelet representation. This paper also demonstrates how the cellular neural universal machine (CNNUM) architecture can be extended to image compression. The packet wavelet coder performs the operation of image compression, aided by CNN architecture. It uses the highly parallel nature of the CNN structure and its speed outperforms traditional digital computers. In packet wavelet coder, an image signal can be analyzed by passing it through an analysis filter banks followed by a decimation process, according to the rules of packet wavelets. The Simulation results indicate that the quality of the reconstructed image is superior by using packet wavelet coding scheme. Finally, a quantization operation is performed in order to translate the coefficient values to discrete environment. Our results are compared with that of pyramidal wavelet representation

Reactors with heavy water coolants and moderators have been used extensively in today's power industry. Monitoring of the moderator condition plays an important role in ensuring normal operation of a power plant. A cellular neural network, the architecture of which has been adapted for hardware implementation, is proposed for use in a system for prediction of the heavy water moderator temperature. A reactor model composed in accordance with the CANDU Darlington heavy water reactor design was used to form the training sample collection and to control correct operation of the neural network structure. The sample components for the adjustment and configuration of the network topology include key parameters that characterize the energy generation process in the core. The paper considers the feasibility of the temperature prediction only for the calandria's central cross-section. To solve this problem, the cellular neural network architecture has been designed, and major parts of the digital computational element and methods for their implementation based on an FPLD have also been developed. The method is described for organizing an optical coupling between individual neural modules within the network, which enables not only the restructuring of the topology in the training process, but also the assignment of priorities for the propagation of the information signals of neurons depending on the activity in a situation analysis at the neural network structure inlet. Asynchronous activation of cells was used based on an oscillating fractal network, the basis for which was a modified ring oscillator. The efficiency of training the proposed architecture using stochastic diffusion search algorithms is evaluated. A comparative analysis of the model behavior and the results of the neural network operation have shown that the use of the neural network approach is effective in safety systems of power plants.

We present the pyramidal wavelet coder implemented with a Cellular Neural Network architecture, as an example of a Cellular Neural Network application, considering that some times it is extremely desired the massive and real-time processing and this kind of architecture fits very well for such purposes. The pyramidal wavelet coder works performing the image wavelet transform plus threshold and quantization operations. The wavelet transform consists essentially in a bank of filters, where an image is passed through them repeatedly, and after each filtering a sampling operation is performed. Once image has been filtered and sampled according the rules of the pyramidal image coder, the threshold operation is carried out, where we pretend to keep only the most significant wavelet coefficients. Finally, a quantization operation is performed in order to translate the coefficient values to a discrete environment.

We present frequency and spatial adaptive packet wavelet coder implemented with cellular neural network architecture. This paper also demonstrates how the cellular neural universal machine (CNNUM) architecture can be extended to image compression. The packet wavelet coder performs the operation of image compression, aided by CNN architecture. It uses the highly parallel nature of the CNN structure and its speed outperforms traditional digital computers. In packet wavelet coder, an image signal can be analyzed by passing it through an analysis filter banks followed by a decimation process, according to the rules of packet wavelets. Traditional packet decomposition adapts to a global frequency distribution, this technique finds the best joint of spatial segmentation and local frequency basis. The simulation results indicate that the quality of the reconstructed image is superior by using frequency and spatial adaptive packet wavelet coding scheme.

An analog Cellular Neural Network (CNN) architecture employing quantum dots to realize various real time image processing applications such as edge and line detections and motion estimation is proposed. In order to obtain programmability to switch between applications, memristive connections between neighboring cells, and for signal amplification and locking resonant tunneling diodes (RTDs) are utilized. Simulations are carried out on a 2D array of the proposed cell structure to demonstrate edge detection and line detection tasks. This work also provides analytical models and simulation results to prove above mentioned real time image processing functionalities.

In this paper the implementation of a nonlinear wave metric on the 64/spl times/64 I/O CNN-UM chip and its experimental results are presented. The nonlinear wave metric was designed and introduced as a generalized theorem for object analysis and classification. This proposed metric includes the well-known distance measures such as Hamming, Hausdorff metrics as special cases. The defined computational method is well-suited for cellular neural network (CNN) architecture and the experimental results shows good correlation with theoretic considerations.

An efficient digital architecture for the discrete-time cellular neural networks (DTCNNs) is proposed that employs the distributed arithmetic (DA). It consumes little silicon area because of the bit serial computation of DA, and offers higher speed operation than the analogue implementations of DTCNN. The proposed architecture has been implemented in a 0.8 µm CMOS technology.

Several CNN hardware implementations have been presented in the last year. Most of them consist of one-chip circuits. Among the others, the authors presented the DPCNN chip family: a current-mode interconnection-oriented CNN analogue chip family. This approach presents many advantages and some drawbacks. In fact, simply connecting together more of these chips, it allows one to implement any size CNN arrays with the possibility to modify the network topology. On the other hand, it requires a high number of pads for the interconnections. Moreover, some parasitic capacitors due to the pads and the PCB wiring will appear. In this paper a high performance technique to improve the interconnection strategy able to overcome these drawbacks without any lack of functionality is presented

A CAD tool based on SPICE macromodels to simulate simplified faulty, circuit realizations of a fully programmable, two dimensional cellular neural network (CNN) is presented. The models can be easily adapted to match the electrical parameters of real circuit implementations. Generic macromodels for both current mode and voltage mode CNNs are provided. The macromodels not only simulate the conceptual CNN cell, but also provide the capability to model actual CNN architectures and their nonidealities. Moreover, macromodeling provides the capability to determine the effect of parameter variation on the operation of the CNN efficiently without the need for computationally expensive, exhaustive circuit simulations. We have used the CNN macromodels to develop robust testing strategies for detecting faults in VLSI implementations of CNN arrays. Three fault cases are introduced into a CNN array to provide insight to the usefulness of macromodeling. >

There are many cases where image processing is performed using the neural network. The content of this Chapter is implementation of CNN (Cellular Neural Network) on a chip in a new original digital approach. First, testing of some features of the proposed cell of the neural network is evaluated. Then the design of the basic circuit containing the cell for the CNN will be introduced. The idea is to use it for a more complex chip with image processing application. CNN have been extensively used in various image processing applications. One of the most important problems in signal processing is noise removal. The input signals mostly arrive from the real world and therefore they contain relatively high amounts of noise. The CNN circuits are capable of removing this noise partly. The possibility of noise removing depends on the template (weight) coefficients between the cells. CNN networks are based on relatively simple principles, very similar to biological neurons. The input signals are multiplied by appropriate weights, the weight matrix being given intuitively, as it is typical for CNN networks. Then they are added and multiplied by the transfer function. We describe also the settings of weights coefficients. CNN have been extensively used in various image processing applications ( Matsumoto & Yokohama, 1990 ) or ( Sziranyi & Csicsvari, 1993 ). The main problem of CNN implementations on a chip is the chip area consumption. The most area is reserved for the multiplexer, so we looked for alternative multiplications. We describe the achieved results with the designed chip. During the creation of the chip architecture we proposed and introduced special original coding for the weight coefficients. After simulations we recognized that the results were better with rounding than without it, but we found that the rounding during multiplication was not as important as we previously expected. Therefore we decided – instead of a hardware multiplexer – to use multiplication realized by simple gate timing of the special signal. The circuit was designed as a digital synchronized circuit. For the design and simulation we used the Xilinx tool. The cell is based on sub-circuits as it will be shown in detail. The Chapter describes the designed circuit. We introduce also our novel simulator for the CNN using the program tool Visual Basic for Application, and its algorithm which was based on the same principle as the planned designed circuit. The network can process the patterns with 400 points of recognition. O pe n A cc es s D at ab as e w w w .ite ch on lin e. co m

The development of new approaches and new architectures for locomotion control in legged robots is of high interest in the area of robotic and intelligent motion systems, especially when the solution is easy both to conceive and to implement.This first lecture emphasizes analog neural processing structures to realize artificial locomotion in mechatronic devices. The main inspiration comes from the biological paradigm of the Central Pattern Generator (CPG), used to model the neural populations responsible for locomotion planning and control in animals. The approach presented here starts by considering locomotion by legs as a complex spatio-temporal non linear dynamical system, modelled referring to particular types of reaction-diffusion non linear partial differential equations. In the following lecture these Spatio-temporal phenomena are obtained implementing the whole mathematical model on a new Reaction-Diffusion Cellular Neural Network (RD-CNN) architecture. Wave-like solutions as well as patterns are obtained, able to induce and control locomotion in some prototypes of biologically inspired walking machines. The design of the CNN structure is subsequently realized by analog circuits; this gives the possibility to generate locomotion in real time and also to control the transition among several types of locomotion. The methodology presented is applied referring to the experimental prototype of an hexapod robot. In the last lecture the same approach will be shown to be able to realize locomotion generation and control in a number of different robotic structures, such as ring worm-like robots or lamprey-like robots.KeywordsCentral Pattern GeneratorAnalog CircuitTuring PatternLocomotion ControlHexapod RobotThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

This paper develops and validates through a series of presentable examples, a comprehensive high-precision, and ultrafast computing concept for solving nonlinear ordinary differential equations (ODEs) and partial differential equations (PDEs) with cellular neural networks (CNN). The core of this concept is a straightforward scheme that we call "nonlinear adaptive optimization (NAOP),” which is used for a precise template calculation for solving nonlinear ODEs and PDEs through CNN processors. One of the key contributions of this work is to demonstrate the possibility of transforming different types of nonlinearities displayed by various classical and well-known nonlinear equations (e.g., van der Pol-, Rayleigh-, Duffing-, Rössler-, Lorenz-, and Jerk-equations, just to name a few) unto first-order CNN elementary cells, and thereby enabling the easy derivation of corresponding CNN templates. Furthermore, in the case of PDE solving, the same concept also allows a mapping unto first-order CNN cells while considering one or even more nonlinear terms of the Taylor's series expansion generally used in the transformation of a PDE in a set of coupled nonlinear ODEs. Therefore, the concept of this paper does significantly contribute to the consolidation of CNN as a universal and ultrafast solver of nonlinear ODEs and/or PDEs. This clearly enables a CNN-based, real-time, ultraprecise, and low-cost computational engineering. As proof of concept, two examples of well-known ODEs are considered namely a second-order linear ODE and a second order nonlinear ODE of the van der Pol type. For each of these ODEs, the corresponding precise CNN templates are derived and are used to deduce the expected solutions. An implementation of the concept developed is possible even on embedded digital platforms (e.g., field programmable gate array (FPGA), digital signal processor (DSP), graphics processing unit (GPU), etc.). This opens a broad range of applications. Ongoing works (as outlook) are using NAOP for deriving precise templates for a selected set of practically interesting ODEs and PDEs equation models such as Lorenz-, Rössler-, Navier Stokes-, Schrödinger-, Maxwell-, etc.

An effective character recognition procedure implemented on a new type of hardware system and using a new architecture called CNND is proposed. This CNND contains one or more analog cellular neural networks (CNNs) and some digital logic, combining the advantages of the fast analog CNN signal processing and the fast and easy decision capability of digital logic. It is shown that the CNND system can be used for recognition of multifont printed or handwritten characters and could recognize 100,000 char/s with a recognition rate of more than 95%. The more advantage of the system over competing types is that there is not an extra feature extraction procedure implemented in slow hardware.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>