Programmable quantum-dots memristor based architecture for image processing

The present of Speckle noise affects the exploitation of useful information in images, especially, in the ultrasound and SAR image. It is desirable to remove speckle noise in real time processing without damaging the image features. In this paper, we propose a new method to suppress the speckle noise in real- time by using Cellular Neural Network (CNN) technology. Section 2, CNN and Cellular Neural Network Universal Machine (CNN-UM) will be briefly introduced, which are the optimized technology for real time image processing applications. Section 3, a few mathematical models of anisotropic diffusion methods for reducing speckle noise on the SAR images will be surveyed and analyzed. In section 4, is also the main part, presented how to design a speckle denoising filter to eliminate the speckle noise and enhance the image features by converting the conventional denoising algorithm to templates, that make CNN chip understandable and processes as a real-time speckle reducing filter. The experiment's results are given in section 5 and some conclusions and future works are summarized in the last section.

We describe a novel cellular connectionist neural network model for the implementation of clustering-based Bayesian image segmentation with Gibbs random-field spatial constraints. The success of this algorithm is largely due to the neighborhood constraints modeled by the Gibbs random field. However, the iterative enforcement of the neighborhood constraints involved in the Bayesian estimation would generally require tremendous computational power. Such computational requirement hinders the real-time application of the Bayesian image segmentation algorithms. The cellular connectionist model proposed aims at implementing the Bayesian image segmentation with real-time processing potentials. With a cellular neural network architecture mapped onto the image spatial domain, the powerful Gibbs spatial constraints are realized through the interactions among neurons connected through their spatial cellular layout. This network model is structurally similar to the conventional cellular network. However, in this new cellular model, the processing elements designed within the connectionist network are functionally more versatile to meet the challenging needs of Bayesian image segmentation based on the Gibbs random field. We prove that this cellular neural network does converge to the desired steady state with a properly designed update scheme. Examples of CT volumetric medical image segmentation are presented to demonstrate the potential of this cellular neural network for a specific image segmentation application.

We describe the analog CMOS VLSI implementation of a cellular neural network (CNN) architecture which spatially filters a 2D image by two orientation selective image filters. The image is represented by a set of input currents supplied by an on-chip array of photosensors. The filters are similar to even and odd Gabor filters. The CNN architecture is implemented using two resistive networks coupled by transconductance amplifiers. The tuned orientation can be steered and the filter response scaled by adjusting the conductances of the resistors and gains of the transconductance amplifiers through externally supplied bias voltages. The circuit operation is explained via a variational principle, which defines the filter output as the minimum of a cost function. We report test results from both 25 × 25 and 45 × 45 pixel arrays.

A digital implementation of the recall phase of a backpropagation neural network for real time image classification is presented. The motivation has been, that parallelism of a neural network has less advantage, if the input data stream is sequential such as the pixel stream of an usual CCD camera. In addition, classifying a stream of pixels with a single chip neural processor implanted into a camera avoids the bottleneck caused by image data transfer and storage, which is neglected often. But the chip will not be restricted to real time image processing applications. The chip realizes a network with 32 output neurons, 8 hidden neurons and up to 64 K inputs (/spl ap/512 K synapses). It is estimated to classify 50 gray scale images per second of size up to 256/spl times/256 pixels, which complies to 26 M cps. The weights of hidden neurons are stored in external memory, whereas weights of output neurons are stored on-chip.

An effective character recognition procedure implemented on a new type of hardware system and using a new architecture called CNND is proposed. This CNND contains one or more analog cellular neural networks (CNNs) and some digital logic, combining the advantages of the fast analog CNN signal processing and the fast and easy decision capability of digital logic. It is shown that the CNND system can be used for recognition of multifont printed or handwritten characters and could recognize 100,000 char/s with a recognition rate of more than 95%. The more advantage of the system over competing types is that there is not an extra feature extraction procedure implemented in slow hardware.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Cellular neural networks show high performance capabilities in real time image processing applications. For this reason, their use in biomedical image analysis can be a useful aid to the doctor in clinical diagnosis. In this research area the improvements in systems for clinical specular microscopy in vivo made a strong contribution to the study and the comprehension of the physiopathology of corneal endothelium. The more recent systems allow acquisition of the images and morphometric analysis. Nevertheless, the results (i.e. the automated reconstruction of the endothelium cell borders) are often inaccurate. Moreover, they do not allow the correct recognition of the cell shapes. On the other hand, even if the semiautomatic systems allow an effective evaluation of the cell shape, they are highly time consuming and provide results that could be affected by the criterion used by the operator in the cell corner detection. In this paper a software tool for the full automated morphometric analysis of corneal endothelium images is presented. The tool makes use of an analogue cellular neural network algorithm that allows both cell shape recognition and endothelial cell area measurement.

The first quarter of 2007 started as an active season for the real-time image processing community. The annual SPIE Conference on Real-Time Image Processing, which was held in San Jose, CA, highlighted recent developments in this growing branch of image processing. As one of the few regular events with its focus matching that of JRTIP, one witnessed the growth in applications of real-time image and video processing. The conference served as an effective instrument to foster the dissemination of recent results and to leverage the cohesion of the real time image processing community. The preparations for the next SPIE Conference on Real-Time Image Processing in 2008 are already progressing and its call-for-papers is included at the end of this issue. In 2007, JRTIP is going to seek involvement of more scientists in the field of real-time image and video processing. After 1 year of operation, the editors-in-chief have started to recruit additional associate editors to enlarge the expertise base of the editorial board, to solicit manuscript submissions from potential authors, and to make the reviewing process more efficient. Interested colleagues should contact the editors-in-chief expressing their Associate Editor candidature in support of one or more fields within the focus of JRTIP. In addition, they wish to encourage researchers to act as guest editors for special issues on any real-time image or video processing related topics of interest to them. It is possible to schedule two special issues in 2007, provided that a draft call-for-papers is sent to the editors-in-chief as soon as possible. The third issue of JRTIP presents four articles, two are survey papers and two are original research papers. These articles address different real-time image processing perspectives ranging from algorithmic to hardware issues. The first survey paper deals with the real-time filtering in 2D and 3D using ordered statistics that are supported by a rich set of experimental results derived from several algorithmic variations. Performance measurements are used to demonstrate the effect of noise suppression and preservation of fine image structures and to show the DSP implementation of denoising filters. The second survey paper introduces a non-invasive analysis of dynamic processes in living cells using microscopic computer vision techniques for understanding the interactions between cellular and molecular functional units and for providing novel insights into the cell biology. The third article is an original research paper covering a machine vision application involving vision-based position sensing for aerial refueling of unmanned aerial vehicles in real-time. A full image processing chain is investigated and tested in a MATLAB/Simulink soft real-time environment as well as in a Linux/RTAI hard real-time environment. The feasibility of the real-time implementation is shown using off-the-shelf commercial hardware. The fourth article is another original research paper describing a hardware architecture for real-time fractal coding for image compression. The introduced parallel hardware architecture contains units for domain M. F. Carlsohn (&) Ingenieurberatung fur Computer Vision und Bildkommunikation, Am Heiddamm 36g, 28355 Bremen, Germany e-mail: matthias.carlsohn@t-online.de

In this paper, an original architecture of cellular neural network (CNN) vision chip is addressed. In the introduction, an analyse of the limitations of the usual approaches leads us to propose an original architecture. The paper is dedicated to the description of the three main blocks of our vision chip. Then, the major building blocks are detailed. Finally, design considerations and the practical implementation of a typical CNN algorithm are discussed.

We present the packet wavelet coder implemented with cellular neural network architecture, and show its superiority over the pyramidal wavelet representation. This paper also demonstrates how the cellular neural universal machine (CNNUM) architecture can be extended to image compression. The packet wavelet coder performs the operation of image compression, aided by CNN architecture. It uses the highly parallel nature of the CNN structure and its speed outperforms traditional digital computers. In packet wavelet coder, an image signal can be analyzed by passing it through an analysis filter banks followed by a decimation process, according to the rules of packet wavelets. The Simulation results indicate that the quality of the reconstructed image is superior by using packet wavelet coding scheme. Finally, a quantization operation is performed in order to translate the coefficient values to discrete environment. Our results are compared with that of pyramidal wavelet representation

In real-time image processing, the demand for efficient solutions has surged with the proliferation of applications spanning from autonomous vehicles to medical diagnostics. This study addresses the imperative need for accelerated machine learning algorithms to enhance the processing speed of image-related tasks. The research focuses on leveraging Field-Programmable Gate Arrays (FPGAs) to implement hardware acceleration, exploiting their parallel computing capabilities. The advent of machine learning in image processing has revolutionized various industries, yet real-time applications encounter computational bottlenecks. This research delves into hardware acceleration using FPGAs to overcome these constraints, offering a novel approach to expedite machine learning algorithms. Traditional software implementations of machine learning algorithms often fall short in meeting real-time processing requirements. This research aims to bridge this gap by exploring FPGA-based hardware acceleration, addressing the performance limitations hindering the seamless integration of machine learning into real-time image processing systems. While existing literature acknowledges the potential of FPGA-based acceleration, a comprehensive exploration of its application for real-time image processing is lacking. This research fills the void by presenting a detailed method and empirical results, contributing to the limited body of knowledge on FPGA-accelerated machine learning in the of image processing. The study employs a systematic approach, integrating machine learning algorithms onto FPGAs through hardware description languages. The implementation is optimized to exploit parallelism inherent in FPGAs, resulting in a tailored hardware solution for real-time image processing. Comparative analyses against software implementations provide insights into the performance gains achieved. The experimental results demonstrate a significant enhancement in processing speed, validating the efficacy of FPGA-based hardware acceleration for machine learning algorithms in real-time image processing applications.

Cellular neural network (CNN) implementations used in real time image processing are rapidly generated by a formal High-level synthesis (HLS) toolset in this work. Industrial and academic hardware design projects can benefit from the use of the Custom Coprocessors Compilation (CCC) HLS behavioral synthesise, via the massive reduction in design and verification time. The CCC tool is built with formal compiler-compiler, Logic Programming and XML validation techniques, thus the generated RTL VHDL or Verilog models are provably-correct. In this work, we rapidly modeled CNNs in the ADA programming language, compiled and verified along with all the necessary testbenches in GNU ADA. Edge-detection, halftoning and morphological processing applications were prototyped, so as to evaluate the CCC HLS method, which was the main contribution of this work. The combination of Logic Programming and RDF validation techniques, as well as prototyping of CNN applications made this work unique.

Reactors with heavy water coolants and moderators have been used extensively in today's power industry. Monitoring of the moderator condition plays an important role in ensuring normal operation of a power plant. A cellular neural network, the architecture of which has been adapted for hardware implementation, is proposed for use in a system for prediction of the heavy water moderator temperature. A reactor model composed in accordance with the CANDU Darlington heavy water reactor design was used to form the training sample collection and to control correct operation of the neural network structure. The sample components for the adjustment and configuration of the network topology include key parameters that characterize the energy generation process in the core. The paper considers the feasibility of the temperature prediction only for the calandria's central cross-section. To solve this problem, the cellular neural network architecture has been designed, and major parts of the digital computational element and methods for their implementation based on an FPLD have also been developed. The method is described for organizing an optical coupling between individual neural modules within the network, which enables not only the restructuring of the topology in the training process, but also the assignment of priorities for the propagation of the information signals of neurons depending on the activity in a situation analysis at the neural network structure inlet. Asynchronous activation of cells was used based on an oscillating fractal network, the basis for which was a modified ring oscillator. The efficiency of training the proposed architecture using stochastic diffusion search algorithms is evaluated. A comparative analysis of the model behavior and the results of the neural network operation have shown that the use of the neural network approach is effective in safety systems of power plants.

In this paper, we study the relationship between the standard cellular neural network (CNN) and the resonant tunneling diode (RTD)-based CNN. We investigate the functional and advanced capabilities of a new generation of CNNs that exploit the multiplicity of steady states. We also include in the analysis higher order CNNs. Furthermore, some methods for designing RTD-based CNNs with multiple steady states are presented.

A new methodology for real-time processing of DNA chip images is proposed. The idea developed here is to use the cellular neural network (CNN) array to analyze the DNA microarray. A CNN is an analog dynamic processor array that reflects this property: the processing elements interact directly within a finite local neighborhood. Due to its architecture, a two-dimensional CNN array is widely used to solve image processing and pattern recognition problems; moreover, the parallelism characteristic of this structure allows one to perform the most computationally expensive image analysis tasks three orders of magnitude faster than a classical CPU-based computer. This approach, thanks to the supercomputing capabilities of the CNN architecture, makes the whole DNA chip methodology fully parallel and also makes the processing phase, until now very time consuming, a real-time step. We discuss the results of testing an algorithm based on the CNN universal machine (CNN-UM) that has been designed to classify the image data. The algorithm is implemented in an analogic (analog and logic) microprocessor.

We present the pyramidal wavelet coder implemented with a Cellular Neural Network architecture, as an example of a Cellular Neural Network application, considering that some times it is extremely desired the massive and real-time processing and this kind of architecture fits very well for such purposes. The pyramidal wavelet coder works performing the image wavelet transform plus threshold and quantization operations. The wavelet transform consists essentially in a bank of filters, where an image is passed through them repeatedly, and after each filtering a sampling operation is performed. Once image has been filtered and sampled according the rules of the pyramidal image coder, the threshold operation is carried out, where we pretend to keep only the most significant wavelet coefficients. Finally, a quantization operation is performed in order to translate the coefficient values to a discrete environment.