A Pulse Bias/RF Environment for Device Characterization

Electronic devices produce heat as a byproduct of normal operation. Besides the damage that excess heat can cause, it also increases the movement of free electrons in a semiconductor, which can cause an increase in signal noise. The primary focus of this book is to examine various ways to reduce the temperature of a semiconductor, or group of semiconductors. If we do not allow the heat to dissipate, the device junction temperature will exceed the maximum safe operating temperature specified by the manufacturer. When a device exceeds the specified temperature, semiconductor performance, life, and reliability are tremendously reduced, as shown in Figure 1.1. Researchers estimate that every 10°C increase in junction temperature reduces the semiconductor life by 50%. The basic objective, then, is to hold the junction temperature below the maximum temperature specified by the semiconductor manufacturer.

Unbalanced currents effect on the thermal characteristic and reliability of parallel connected power switches

Monochromatic light emitting diodes (LEDs) are getting more attention day by day for a very wide range of applications such as general lighting, signage, automotive lighting, display, water purification, and skin imaging. While they are taking place in a large number of applications, thermal challenges associated with the operation of LEDs have become a significant issue to address since their performance is greatly affected by thermal conditions. Thus, this study focuses on identifying thermal, optical, and electrical characteristics of an AlGaInP-based red LED considering the impact of the LED dome on the chip performance. The junction temperature measurement results obtained with forward voltage change method were validated with thermal imaging method (TIM) and computational models. It was observed that the LED dome may critically affect the thermal, optical, and electrical behaviors of the LED chip. In fact, a 3.7% increase in junction temperature and a 6.1% drop in optical conversion efficiency were found at the normal operation of the red LED after the LED dome was removed. The results were also compared with a blue LED, and lower junction temperatures were measured for the red LED at each driving current. The difference in junction temperature became even more noticeable at higher driving currents. Results have shown a good agreement between three different methods with a maximum variation of 6.9%.

A real capacitor will have some power dissipation, whereas an ideal capacitor will not dissipate any power. In this paper, we designed a capacitance scaling-based low-power RAM design. Our work aims to analyze how the memory circuit works using capacitance scaling does and varying temperatures. This design is implemented in Verilog. Usually, for the functioning of a device, the junction temperature is below 125 °C. If we scale down frequency from 10 to 4.5 GHz, 2.3 and 1 GHz then there is 42.96, 59.03, and 70.4% reduction, respectively, in total power at 5 pF output load. With the increase in capacitance, there should be the increase in junction temperature. But the novelty of our work is that we can control the effect of capacitance scaling on junction temperature with the help of addition airflow of 500 Linear Feet per Minute (LFM).

The performance of white LED is highly dependent on the current effect and thermal effect. In this work, a measurement equipment is designed and set up to study the relationships among light output, current and junction temperature by controlling the junction temperature. Results revealed that the luminous flux increases nonlinearly with increasing current and decreases as junction temperature increases. Moreover, we presented an integrated model which links the photometric, electrical, and thermal aspects of an LED based on the results of experiment. This model verified by a LED without any thermal control can explain why the LED has a maximum luminous flux and how to obtain the higher current saturation point of luminous flux.

The potential increased power density and high temperature capability of silicon carbide makes it an ideal candidate for use in future hybrid electric vehicle (HEV) technology. A secondary cooling system is required to maintain an 85/spl deg/C base plate temperature for silicon based power electronics; but by creating a silicon carbide (SiC) based replacement this requirement could be relaxed. One anticipated benefit, among many, is that the secondary cooling loop could be eliminated and instead interfaced with the engine coolant system designed to maintain a maximum temperature of 105/spl deg/C. The purpose of this paper is to present an all-SiC scaled prototype that is modeled after the DC-DC converter used in the Prius II to establish a high voltage DC bus interconnecting the motor and generator. The design uses a SiC JFET and SiC Schottky diode as the switching pair of a 1 kW scale model that investigates an inherently safe approach for use in future HEVs. The ability to parallel these unipolar devices results in a scalable device technology capable of achieving high-current, 600-V SiC switch technology in the near term that offers a potential 100/spl deg/C increase in junction temperature above that rated for comparable silicon IGBTs.

Fast power devices thermal simulation method based on averaging power losses over each cycle of PWM switching frequency is presented in this paper. For implementing a long real time dynamic thermal simulation of power devices, device power losses during transient process and static characteristics are defined as a function of device conduction current and junction temperature, and are represented by a lookup table. By carrying out the circuit electrical simulation, the device conduction current can be obtained. By combining the device conduction currents, global device temperature (GDT) and the data from the lookup table, the average power loss over each cycle of PWM switching frequency is then calculated for carrying out the thermal simulation. With the proposed method, a relative large simulation time step can be employed and simulation speed can be increased dramatically. The method is suitable for a long real time thermal simulation for complex power electronics systems.

The optimal gate delay time control between the two internal devices to achieve excellent electrical and thermal performance of the Si/SiC hybrid switch is considerably affected by several factors and requires careful adjustment to suit the different operation conditions of power converters. However, the conventional gate control solution for the hybrid switch applies a fixed delay time to achieve the minimum switching loss at a specific load current, resulting in disparities in junction temperature of internal devices over a wide load range. This effectively reduces the safe operating area by risking one internal switch subjected to overrated junction temperature in a wide range operation with regard to power handling condition. To avoid such a serious risk of reliability degradation or thermal breakdown, a novel active gate delay time control strategy based on the electro-thermal coupling loss model is proposed. The gate delay time was dynamically adjusted and optimized according to the operation conditions of power converters so that the operation junction temperature difference of the two internal devices can be minimized. Experimental results demonstrate that the junction temperature of the hybrid switch decreases by 20 °C at 8-kW load condition and its maximum power handling capability increases by 18%, without compromising the power converter's efficiency in a 20 kHz Si/SiC hybrid switch-based dc/dc buck converter compared with the conventional approach.

The measurement of the junction temperature of power semiconductor devices during operation is highly relevant for efficient power electronic applications. This paper presents a novel galvanic isolated sensing approach for the online junction temperature measurement of a silicon carbide (SiC) mosfet. It is based on the temperature-dependent changes in the spectrum of the light emission from the body diode of the SiC mosfet. The spectrum exhibits two characteristic peaks at roughly 380 nm and around 480 nm. The first peak's intensity increases with rising temperature, whereas the other decreases. Consequently, the junction temperature can be derived from the ratio of the filtered intensities of those two wavelength regions. The proposed method is studied on the basis of a virtual experiment and experimentally validated by means of static characterization and dynamic double pulse measurement.

An increasing share of fluctuating and intermittent renewable energy sources can cause over-currents (OCs) in the power system. The heat generated during OCs increases the junction temperature of semiconductor devices and could even lead to thermal runaway if thermal limits are reached. In order to keep the junction temperature within the thermal limit of the semiconductor, the power module structure with heat-absorbing material below the chip is investigated through COMSOL Multiphysics simulations. The upper limits of the junction temperature for Silicon (Si) and Silicon Carbide (SiC) are assumed to be 175 and 250 ∘C, respectively. The heat-absorbing materials considered for analysis are a copper block and a copper block with phase change materials (PCMs). Two times, three times, and four times of OCs would be discussed for durations of a few hundred milliseconds and seconds. This article also discusses the thermal performance of a copper block and a copper block with PCMs. PCMs used for Si and SiC are LM108 and Lithium, respectively. It is concluded that the copper block just below the semiconductor chip would enable OC capability in Si and SiC devices and would be more convenient to manufacture as compared to the copper block with PCM.

Junction temperature is a critical parameter for ensuring the safety and field reliability of power devices in operational dc–dc converters. Traditional electrothermal methods, which rely on iterative calculations coupling electrical and thermal models, face challenges due to the disparity in timescales, where power devices manifest dynamic operation on fast timescales, while thermal effects evolve over much longer timescales. To tackle this challenge, the article introduces a novel multitimescale electrothermal coupling model, which balances computational demand and accuracy in calculating the junction temperature of power devices under various operating conditions such as switching frequency, load profiles, and ambient temperature. The proposed model integrates a circuit model encompassing a power loss model and a state model for the power device, with a thermal model constructed using the finite element method. For reducing computational complexity, the proper orthogonal decomposition (POD) method is applied to the thermal model. The junction temperature is iteratively calculated using the multitimescale electrothermal model of the power device, which is validated in an LLC resonant dc–dc converter, demonstrating that the proposed method achieves high computational speed and accuracy. The results confirm that the multitimescale electrothermal model exhibits excellent performance in managing the complex thermal dynamics of power devices under real-world operating conditions.

This paper presents an electro-thermal simulation model to estimate the power devices junction temperatures of traction inverter. The model includes four sub-systems: hybrid electric vehicle simulation, model of traction motor, temperature dependent power loss model, and the thermal model of traction inverter. Firstly, load profile of the traction inverter is obtained considering the vehicle dynamic, the traction motor, and the drive cycle of the vehicle. Then, instantaneous power loss is calculated by using the load profile of the inverter. Based on the power loss and developed thermal models, junction temperatures of power devices are estimated. With the feedback of the junction temperatures into the power loss model, the temperature dependent power losses are obtained. Therefore, the electro-thermal simulation of traction inverter can be conducted. The electro-thermal model presented in this paper is simulated for the Urban Dynamometer Driving Schedule (UDDS) drive cycle, and the junction temperatures of power devices are obtained.

Junction temperature (T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</inf> ) and forward voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> ) of LED devices are two critical LED variables that are not easily obtained in an LED system. While T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</inf> affects reliability and lifetime, V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> affects the power for a given current. This paper includes the modeling of T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</inf> and V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> based on externally measurable parameters such as heatsink temperature (Ths) and LED forward current (I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> ). Based on the I–V electrical characteristics, the modeling of T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</inf> is related to the forward current and does not need the information of V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> . The modeling of V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> is associated with forward current and heat sink temperature instead of junction temperature. Designers can therefore estimate the V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> by measuring the forward current I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> and T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">hs</inf> , thus avoid the inconvenience of measurement of junction temperature. The established theoretical models for T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</inf> and V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">F</inf> are verified by testing several kinds of LEDs. Very good agreements between the theoretical and practical results have been obtained.

With the increase of power consumption and running speed, the junction temperature of three-dimensional stacked memory devices has increased. It eventually leads to chip overheating and may cause device failures. It is essential to analyze and optimize the thermal performance of the package. In this paper, the finite element analysis method is used to study the influence of the package module on the chip junction temperature and thermal resistance for the typical six-layer stacked memory chip packaging structure. The main influencing factors are investigated. In addition, the thermal characteristics of the stacked packaging structure are optimized by using the orthogonal experimental design method. After further optimization, the junction temperature decreases by 7.17% and the thermal resistance decreases by 11.59%.

We investigate the impact of threading dislocation density (TDD) and thermal conductivity of substrates on the performance of GaInP/AlInP light-emitting diodes (LEDs) for the integration of III-V optoelectronics on Si. We utilized an arsenic (As) doped Ge/Si substrate that showed a reduced TDD compared to undoped Ge/Si. Compared to LEDs on undoped Ge/Si, the leakage current density for LEDs on As-doped Ge/Si substrate is reduced by four orders of magnitude and the light output is increased six-fold. An increased junction temperature causes light output saturation for LEDs on bulk Ge at high injection current densities. The light output of LEDs on As-doped Ge/Si shows good linearity with injection current density and its junction temperature is ~25 ± 5 °C lower than that of LEDs on bulk Ge at high injection current densities due to better thermal conductivity of the Ge/Si substrate.