A semi-supervised deep learning framework for efficient PCB defect detection confidence-thresholded self-training with YOLOv5

Image registration technology has been widely used in many parts of the computer vision system such as the automatic optical inspection system which is used to detect the printed circuit board (PCB) defects. The accuracy of the image registration will deeply influence the system's performance, so this study proposed an accurate image registration algorithm and applied it to the PCB defect detection. Good features to track feature detector and speeded up robust feature descriptor are combined to extract efficient features to achieve the first accurate image registration. Afterwards, cross‐correlation functions were used to compute the shift between the reference image and the first‐registered image for further accurate registration. Experimental results show that the authors’ algorithm performs a much better registration, with a lower root‐mean‐square error value between the reference image and transformed image. What is more, they applied it to detect the defects of PCB with a high accuracy.

In order to solve the problem of low accuracy and efficiency in printed circuit board(PCB) defect detection using reference methods, a Transformer-YOLO network detection model is proposed. Firstly, an imporved clustering algorithm is used to generate the anchor box suitable for the PCB defect data set of this paper. Secondly, abandoning the traditional idea of using convolutional neural network to extract image feature, Swin Transformer is used as the feature extraction network, which can effectively establish the dependency between image features. Finally, to modify the order of the channels in the feature map and enable the network to more effectively focus on the information with greater value, the convolution and attention mechanism module is added to the feature detection network component. Comparing the network model proposed in this paper with Faster R-CNN, SSD, YOLOv3, YOLOv4 and YOLOv5, the experimental results show that the proposed model improves the accuracy by 23.90%, 15.51%, 10.70%, 7.83% and 6.12% respectively, which is better than other most mainstream target detection models and has relatively small volume.

Printed Circuit Board (PCB) defect detection is essential for ensuring reliability in electronic manufacturing, as defects such as spur, mouse bites, missing holes, and open circuits can severely degrade performance or cause board failure. Traditional AOI systems often suffer from high false alarm rates due to lighting variations and complex backgrounds, while many deep learning methods struggle to efficiently detect tiny defects. To address these challenges, this study proposes SCMEO-DETR, a lightweight and effective end-to-end detector built upon RT-DETR. The model integrates a Sparse Enhanced Pyramid Network (SEPN) and a Context-Guided Feature Pyramid Network (CGFPN) to strengthen fine-grained feature extraction and contextual reasoning. An Optimized and Adaptive Backbone (OA-backbone) and an improved Enhanced Upsampling Convolution Block with Shift Channel Mix (EUCB-SC) block further enhance representational efficiency through adaptive sampling and channel shift mechanisms. An upgraded Multi-Head Multi-Scale Intra-Scale Feature-fusion Module (M2-IFM) module also improves feature interaction. Experiments on the PKU-Market-PCB dataset demonstrate that SCMEO-DETR achieves 97.10% mAP@0.5, surpassing RT-DETR-R18 by 5.28% while reducing parameters and GFLOPs by 50% and 39%. These results confirm its effectiveness and deployability for real-time PCB defect detection.

A printed circuit board (PCB) functions as a substrate essential for interconnecting and securing electronic components. Its widespread integration is evident in modern electronic devices, spanning computers, cell phones, televisions, digital cameras, and diverse apparatus. Ensuring product quality mandates meticulous defect inspection, a task exacerbated by the heightened precision of contemporary circuit boards, intensifying the challenge of defect detection. Conventional algorithms, hampered by inefficiency and limited accuracy, fall short of usage benchmarks. In contrast, PCB defect detection algorithms rooted in deep learning hold promise for achieving heightened accuracy and efficiency, bolstered by their adeptness at discerning novel defect types. This review presents a comprehensive analysis of machine vision-based PCB defect detection algorithms, traversing the realms of machine learning and deep learning. It commences by contextualizing and elucidating the significance of such algorithms, followed by an extensive exploration of their evolution within the machine vision framework, encompassing classification, comparison, and analysis of algorithmic principles, strengths, and weaknesses. Moreover, the introduction of widely used PCB defect detection datasets and assessment indices enhances the evaluation of algorithmic performance. Currently, the detection accuracy can exceed 95% at an Intersection over Union (IoU) of 0.5. Lastly, potential future research directions are identified to address the existing issues in the current algorithm. These directions include utilizing Transformers as a foundational framework for creating new algorithms and employing techniques like Generative Adversarial Networks (GANs) and reinforcement learning to enhance PCB defect detection performance.

Defect inspection is essential in the semiconductor industry to fabricate printed circuit boards (PCBs) with minimum defect rates. However, conventional inspection systems are labor-intensive and time-consuming. In this study, a semi-supervised learning (SSL)-based model called PCB_SS was developed. It was trained using labeled and unlabeled images under two different augmentations. Training and test PCB images were acquired using automatic final vision inspection systems. The PCB_SS model outperformed a completely supervised model trained using only labeled images (PCB_FS). The performance of the PCB_SS model was more robust than that of the PCB_FS model when the number of labeled data is limited or comprises incorrectly labeled data. In an error-resilience test, the proposed PCB_SS model maintained stable accuracy (error increment of less than 0.5%, compared with 4% for PCB_FS) for noisy training data (with as much as 9.0% of the data labeled incorrectly). The proposed model also showed superior performance when comparing machine-learning and deep-learning classifiers. The unlabeled data utilized in the PCB_SS model helped with the generalization of the deep-learning model and improved its performance for PCB defect detection. Thus, the proposed method alleviates the burden of the manual labeling process and provides a rapid and accurate automatic classifier for PCB inspections.

Printed circuit boards (PCBs) are ubiquitous and essential electronic components. Tiny targets and high precision are the focus of PCB defect detection. This paper proposes an improved model focusing on tiny defect detection and model compression to achieve better performance in PCB defect detection. The improved model has a compact structure based on MobileNet v3 Small-CA and an image-cutting layer. Moreover, it applies an improved multi-scale fusion step with a location weighted mechanism to enhance representation performance. The proposed model outperforms state-of-the-art detection algorithms such as Faster R-CNN, EfficientDet, SSD, and YOLO v7, based on experimental results on a public synthetic PCB dataset. The proposed tiny object detection model has better performances on speed and detection accuracy, thereby benefitting the manufacturing industries associated with PCBs.

This study aims at pixel-wise defect segmentation in Printed Circuit Boards (PCBs) using PCB Defects dataset using U-Net architecture. The primary objective is to demonstrate that lightweight segmentation architectures can effectively replace computationally expensive bounding-box models for resource-constrained environments. PCBs are critical components of electronic devices, and minor defects in these can lead to mal-functions. Automated diagnosis and rectification of PCB defects would need not only the classification and bounding-box-wise defect segmentation but also the pixel-wise region extraction from the image. While some studies exist on PCB defect segmentation, they heavily relied on bounded-box masks or resource-expensive frameworks such as YOLO. In this study, an efficient pixel-mask generation framework is proposed based on Hadamard-filtered difference imaging to generate pixel-level binary masks for PCB defects dataset without manual annotation. Then, a U-Net model is developed by training with this generated dataset. The evaluated metrics on the test set include 92% precision, 96% recall and 89% of IoU, which show competitive performance of the segmentation model. This study demonstrates that competing accuracies could be achieved for pixel-wise segmentation of PCB defects even with a simple U-Net model for resource-constrained devices.

This paper delves into various methodologies for enhancing the quality, design, and optimization of Printed Circuit Boards (PCBs). With the development of the technology, the importance of Printed Circuit Board(PCB) is recently mentioned by more and more people who is trying to make progress of human technology. The classification of PCB defects, a crucial step in ensuring product reliability, is discussed on several categories of defects in PCB, highlighting recent advancements such as fuzzy c-means segmentation, which significantly improves defect detection accuracy. When producing, the layout is quite significant. In a conference, a group of scientists used a thermal layout modelling and optimization routine to make the board having more space to put circuit on it. Methods to ensure PCB quality during production are examined, focusing on optical and electrical testing. The PCB design process is also explored, emphasizing the importance of those considerations before production. Finally, the paper reviews innovative approaches to PCB layout optimization, particularly in managing heat dissipation and dynamic behavior through advanced simulation techniques.

This study introduces a photonic stimulation‐based synaptic transistor utilizing oblique angle deposition (OAD) of dinaphtho[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene (DNTT). While OAD enables advanced nanostructures, its application to organic materials remains largely unexplored. Here, the electrical characteristics and photoinduced trap behavior of obliquely deposited DNTT transistors are systematically investigated, successfully replicating key synaptic functions. OAD‐controlled grain size and spacing in the DNTT channel yield distinct performance metrics compared to conventional devices. The introduced trap regions enable stable synaptic behavior across diverse gate voltage (VG) conditions. By adjusting presynaptic photonic pulse intensity, duration, and repetition, a robust transition is achieved to long‐term memory (LTM). The device further demonstrates reliable optoelectronic synaptic operation over 52 durability cycles. Concurrent photonic stimulation enables parallel potentiation‐depression dynamics, enhancing processing speed and performance, highlighting its promise for next‐generation neuromorphic computing. Its application is also showed in printed circuit board (PCB) defect inspection, successfully mimicking biological synapses under simultaneous photonic stimulation.

Defects in printed circuit boards (PCBs) are being detected using computer vision-based techniques. Defect-free PCBs are essential for the reliability of consumer electronics. However, deep learning-based methods often struggle with imbalanced defect distributions and limited generalization. To address these challenges, we propose ViT-Mamba, a hybrid framework that combines Vision Transformers with a Mamba-inspired attention mechanism for global feature extraction and precise defect segmentation. We further introduce an artificial defect generation module that systematically creates six types of PCB defects to improve robustness. A multiscale hierarchical refinement strategy is employed to enhance feature representation for accurate segmentation. Experiments on a public PCB defect dataset show that ViT-Mamba outperforms existing methods, achieving a mean Average Precision (mAP) of 99.69%.

Printed circuit board (PCB) defect detection is essential for ensuring the reliability of electronic manufacturing. Traditional automated optical inspection (AOI) methods rely on handcrafted features and rule-based heuristics, which often fail under complex defect patterns. Recent progress in deep learning, particularly the YOLO family of object detectors, has significantly improved industrial inspection. This paper presents a systematic benchmark of the YOLOv12 series, including five model scales (n, s, m, l, x), for PCB defect detection. All variants are trained and evaluated under unified protocols on a standard PCB dataset. Results show that YOLOv12l and YOLOv12x achieve the highest accuracy (mAP@0.5 ≈ 0.88 – 0.89), while YOLOv12n and YOLOv12s provide superior inference speed ( inference-only >300 FPS, end-to-end 6–8 FPS) at the expense of precision. YOLOv12m emerges as the most balanced variant, offering ~0.92 mAP@0.5 with real-time throughput. Error analysis using precision – recall curves and confusion matrices highlights challenges in fine-grained categories such as spur and mouse_bite. These findings provide practical guidelines for selecting YOLOv12 variants in PCB inspection, balancing accuracy and efficiency for diverse deployment scenarios.

Object detection is a well-known task in the field of computer vision, especially the small target detection problem that has aroused great academic attention. In order to improve the detection performance of small objects, in this article, a novel enhanced multiscale feature fusion method is proposed, namely, the atrous spatial pyramid pooling-balanced-feature pyramid network (ABFPN). In particular, the atrous convolution operators with different dilation rates are employed to make full use of context information, where the skip connection is applied to achieve sufficient feature fusions. In addition, there is a balanced module to integrate and enhance features at different levels. The performance of the proposed ABFPN is evaluated on three public benchmark datasets, and experimental results demonstrate that it is a reliable and efficient feature fusion method. Furthermore, in order to validate the applicational potential in small objects, the developed ABFPN is utilized to detect surface tiny defects of the printed circuit board (PCB), which acts as the neck part of an improved PCB defect detection (IPDD) framework. While designing the IPDD, several powerful strategies are also employed to further improve the overall performance, which is evaluated via extensive ablation studies. Experiments on a public PCB defect detection database have demonstrated the superiority of the designed IPDD framework against the other seven state-of-the-art methods, which further validates the practicality of the proposed ABFPN.

The small area of a printed circuit board (PCB) results in densely distributed defects, leading to a lower detection accuracy, which subsequently impacts the safety and stability of the circuit board. This paper proposes a new YOLO-BFRV network model based on the improved YOLOv8 framework to identify PCB defects more efficiently and accurately. First, a bidirectional feature pyramid network (BIFPN) is introduced to expand the receptive field of each feature level and enrich the semantic information to improve the feature extraction capability. Second, the YOLOv8 backbone network is refined into a lightweight FasterNet network, reducing the computational load while improving the detection accuracy of minor defects. Subsequently, the high-speed re-parameterized detection head (RepHead) reduces inference complexity and boosts the detection speed without compromising accuracy. Finally, the VarifocalLoss is employed to enhance the detection accuracy for densely distributed PCB defects. The experimental results demonstrate that the improved model increases the mAP by 4.12% compared to the benchmark YOLOv8s model, boosts the detection speed by 45.89%, and reduces the GFLOPs by 82.53%, further confirming the superiority of the algorithm presented in this paper.

The manufacturing quality of printed circuit boards (PCBs) significantly influences the functionality and life expectancy of electronic devices. This paper introduces a YOLO-WWBi based on improved YOLO11 framework method for the detection of surface defects. First, an improved weighted and re-parameterized ghost multi-scale feature aggregation module (WRGMSFA) is designed. This module focuses more on defect information channels, enhancing multi-scale feature extraction capabilities while suppressing redundant information. Then, BiFPN is integrated into the neck to enhance the quality of fused features and deepen the interaction of feature information. Finally, the WIoU loss function was employed to optimize the localization performance of defect positions, thereby enhancing robustness in highly similar PCB background interference. The experimental results indicate that YOLO-WWBi has an mAP of 96.6%, surpassing YOLO11 by 5.4 points. Its performance metrics indicate that the requirements for the high-precision, real-time detection of PCB defects are satisfactorily met.

A transformer-based dual-branch feature extraction for printed circuit board defect detection with enhanced spatial attention mechanism