SCMEO-DETR provides a lightweight and high efficiency solution for PCB defect detection based on RT-DETR.

Printed Circuit Board (PCB) defect inspection is critical in electronics manufacturing, yet annotating large training sets is labor-intensive and costly. This paper proposes a semi-supervised PCB defect detection framework based on YOLOv5, which leverages a small labeled dataset and a larger pool of unlabeled images through an iterative self-training pipeline. A YOLOv5 detector is first trained on the limited labeled data, then used to generate pseudo-labels on unlabeled images; high-confidence detections are retained as defect annotations, and the model is retrained on the combination of labeled and pseudo-labeled data. This pseudo-labeling and retraining cycle is repeated for multiple iterations to progressively refine the detector. The approach is evaluated on a PCB defect dataset with 100 labeled and 1,000 unlabeled images, and shows significant gains over a fully supervised baseline. The proposed semi-supervised YOLOv5 achieves 91.6% mAP@0.5 with only 100 labeled images, outperforming both the baseline (87.0% mAP) and prior semi-supervised methods, while substantially improving recall and precision. The results demonstrate that the method effectively reduces annotation effort while maintaining high detection accuracy, providing a simple, confidence-thresholded self-training strategy for deploying PCB defect detectors under limited labeling resources. This work directly supports SDG 9 by enabling cost-efficient, high-accuracy AI-based PCB inspection that strengthens intelligent and sustainable manufacturing systems.

Image registration technology has been widely used in many parts of the computer vision system such as the automatic optical inspection system which is used to detect the printed circuit board (PCB) defects. The accuracy of the image registration will deeply influence the system's performance, so this study proposed an accurate image registration algorithm and applied it to the PCB defect detection. Good features to track feature detector and speeded up robust feature descriptor are combined to extract efficient features to achieve the first accurate image registration. Afterwards, cross‐correlation functions were used to compute the shift between the reference image and the first‐registered image for further accurate registration. Experimental results show that the authors’ algorithm performs a much better registration, with a lower root‐mean‐square error value between the reference image and transformed image. What is more, they applied it to detect the defects of PCB with a high accuracy.

A printed circuit board (PCB) functions as a substrate essential for interconnecting and securing electronic components. Its widespread integration is evident in modern electronic devices, spanning computers, cell phones, televisions, digital cameras, and diverse apparatus. Ensuring product quality mandates meticulous defect inspection, a task exacerbated by the heightened precision of contemporary circuit boards, intensifying the challenge of defect detection. Conventional algorithms, hampered by inefficiency and limited accuracy, fall short of usage benchmarks. In contrast, PCB defect detection algorithms rooted in deep learning hold promise for achieving heightened accuracy and efficiency, bolstered by their adeptness at discerning novel defect types. This review presents a comprehensive analysis of machine vision-based PCB defect detection algorithms, traversing the realms of machine learning and deep learning. It commences by contextualizing and elucidating the significance of such algorithms, followed by an extensive exploration of their evolution within the machine vision framework, encompassing classification, comparison, and analysis of algorithmic principles, strengths, and weaknesses. Moreover, the introduction of widely used PCB defect detection datasets and assessment indices enhances the evaluation of algorithmic performance. Currently, the detection accuracy can exceed 95% at an Intersection over Union (IoU) of 0.5. Lastly, potential future research directions are identified to address the existing issues in the current algorithm. These directions include utilizing Transformers as a foundational framework for creating new algorithms and employing techniques like Generative Adversarial Networks (GANs) and reinforcement learning to enhance PCB defect detection performance.

Printed circuit boards (PCBs) are ubiquitous and essential electronic components. Tiny targets and high precision are the focus of PCB defect detection. This paper proposes an improved model focusing on tiny defect detection and model compression to achieve better performance in PCB defect detection. The improved model has a compact structure based on MobileNet v3 Small-CA and an image-cutting layer. Moreover, it applies an improved multi-scale fusion step with a location weighted mechanism to enhance representation performance. The proposed model outperforms state-of-the-art detection algorithms such as Faster R-CNN, EfficientDet, SSD, and YOLO v7, based on experimental results on a public synthetic PCB dataset. The proposed tiny object detection model has better performances on speed and detection accuracy, thereby benefitting the manufacturing industries associated with PCBs.

Object detection is a well-known task in the field of computer vision, especially the small target detection problem that has aroused great academic attention. In order to improve the detection performance of small objects, in this article, a novel enhanced multiscale feature fusion method is proposed, namely, the atrous spatial pyramid pooling-balanced-feature pyramid network (ABFPN). In particular, the atrous convolution operators with different dilation rates are employed to make full use of context information, where the skip connection is applied to achieve sufficient feature fusions. In addition, there is a balanced module to integrate and enhance features at different levels. The performance of the proposed ABFPN is evaluated on three public benchmark datasets, and experimental results demonstrate that it is a reliable and efficient feature fusion method. Furthermore, in order to validate the applicational potential in small objects, the developed ABFPN is utilized to detect surface tiny defects of the printed circuit board (PCB), which acts as the neck part of an improved PCB defect detection (IPDD) framework. While designing the IPDD, several powerful strategies are also employed to further improve the overall performance, which is evaluated via extensive ablation studies. Experiments on a public PCB defect detection database have demonstrated the superiority of the designed IPDD framework against the other seven state-of-the-art methods, which further validates the practicality of the proposed ABFPN.

Printed circuit board (PCB) defect detection is essential for ensuring the reliability of electronic manufacturing. Traditional automated optical inspection (AOI) methods rely on handcrafted features and rule-based heuristics, which often fail under complex defect patterns. Recent progress in deep learning, particularly the YOLO family of object detectors, has significantly improved industrial inspection. This paper presents a systematic benchmark of the YOLOv12 series, including five model scales (n, s, m, l, x), for PCB defect detection. All variants are trained and evaluated under unified protocols on a standard PCB dataset. Results show that YOLOv12l and YOLOv12x achieve the highest accuracy (mAP@0.5 ≈ 0.88 – 0.89), while YOLOv12n and YOLOv12s provide superior inference speed ( inference-only >300 FPS, end-to-end 6–8 FPS) at the expense of precision. YOLOv12m emerges as the most balanced variant, offering ~0.92 mAP@0.5 with real-time throughput. Error analysis using precision – recall curves and confusion matrices highlights challenges in fine-grained categories such as spur and mouse_bite. These findings provide practical guidelines for selecting YOLOv12 variants in PCB inspection, balancing accuracy and efficiency for diverse deployment scenarios.

In order to solve the problem of low accuracy and efficiency in printed circuit board(PCB) defect detection using reference methods, a Transformer-YOLO network detection model is proposed. Firstly, an imporved clustering algorithm is used to generate the anchor box suitable for the PCB defect data set of this paper. Secondly, abandoning the traditional idea of using convolutional neural network to extract image feature, Swin Transformer is used as the feature extraction network, which can effectively establish the dependency between image features. Finally, to modify the order of the channels in the feature map and enable the network to more effectively focus on the information with greater value, the convolution and attention mechanism module is added to the feature detection network component. Comparing the network model proposed in this paper with Faster R-CNN, SSD, YOLOv3, YOLOv4 and YOLOv5, the experimental results show that the proposed model improves the accuracy by 23.90%, 15.51%, 10.70%, 7.83% and 6.12% respectively, which is better than other most mainstream target detection models and has relatively small volume.

Printed Circuit Board (PCB) testing has traditionally relied on manual inspection methods, which are often timeconsuming, error-prone, and costly. These limitations result in longer processing times, increased production costs, and inconsistent quality assurance. To address these challenges, this paper proposes a Generative AI-Based PCB Testing (GABPT) system designed to automate defect detection and classification in PCBs. The system leverages high-resolution image acquisition, advanced AI-powered image processing, and classification algorithms to identify common defects such as scratches, missing holes, broken paths, mouse bites, short circuits, and absent conductors. Utilizing a Quad ARM Cortex-A72 processor, the system processes captured PCB images in realtime and delivers immediate feedback on defects. The GABPT system aims to reduce human error, accelerate the inspection process, and minimize testing costs. It emphasizes efficient image preprocessing, precise image analysis, and hardware-software integration for reliable defect detection. By automating PCB inspection, the proposed system enhances testing accuracy, promotes cost-effective production, and supports sustainable manufacturing practices, ultimately contributing to the delivery of higher-quality electronic products.

This study focuses on the development of a model based on the YOLOv8x neural network for the automated detection of defects in printed circuit boards (PCBs). Purpose: to train a neural network capable of effectively detecting and classifying various types of PCB defects. Methods: a deep learning method based on the YOLOv8x architecture, designed for object detection tasks. An accuracy and loss metrics analysis was conducted to assess the model’s effectiveness. Results: the trained model demonstrates high accuracy in classifying defects such as missing holes, shorts, and spurious copper, achieving an accuracy of 1.0. The “open circuits” and “copper spurs” classes also yield satisfactory results. However, the “mouse bites” class requires further improvement. Practical significance: the potential application of the developed model for automating quality control processes in PCBs could significantly enhance the reliability of electronic devices and reduce the potential failures in critical systems.

A transformer-based dual-branch feature extraction for printed circuit board defect detection with enhanced spatial attention mechanism

This study introduces a photonic stimulation‐based synaptic transistor utilizing oblique angle deposition (OAD) of dinaphtho[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene (DNTT). While OAD enables advanced nanostructures, its application to organic materials remains largely unexplored. Here, the electrical characteristics and photoinduced trap behavior of obliquely deposited DNTT transistors are systematically investigated, successfully replicating key synaptic functions. OAD‐controlled grain size and spacing in the DNTT channel yield distinct performance metrics compared to conventional devices. The introduced trap regions enable stable synaptic behavior across diverse gate voltage (VG) conditions. By adjusting presynaptic photonic pulse intensity, duration, and repetition, a robust transition is achieved to long‐term memory (LTM). The device further demonstrates reliable optoelectronic synaptic operation over 52 durability cycles. Concurrent photonic stimulation enables parallel potentiation‐depression dynamics, enhancing processing speed and performance, highlighting its promise for next‐generation neuromorphic computing. Its application is also showed in printed circuit board (PCB) defect inspection, successfully mimicking biological synapses under simultaneous photonic stimulation.

This paper presents inspection of Printed Circuit Boards (PCBs) based on normalized crosscorrelation. Correlation gives the similarity measure of images. In this paper, Normalized Cross-Correlation has been used to differentiate between a defective and defect free printed circuit board. Different PCBs have been inspected using normalized cross-correlation in this paper and further defected PCBs have been used for detection of all possible defects. Image subtraction(one of referential methods) is used for detection of defects of PCBs. And after detection of defects using image subtraction method, the wrong hole defects, missing conductors defects, etching defects, break lines have been classified.

Printed circuit boards (PCBs) are primarily used to connect electronic components to each other. It is one of the most important stages in the manufacturing of electronic products. A small defect in the PCB can make the final product inoperable. Therefore, careful and meticulous defect detection steps are necessary and indispensable in the PCB manufacturing process. The detection methods can generally be divided into manual inspection and automatic optical inspection (AOI). The main disadvantage of manual detection is that the detection speed is too slow, resulting in a waste of human resources and costs. Thus, in order to speed up the production speed, AOI techniques have been adopted by many PCB manufacturers. Most current AOI mechanisms use traditional optical algorithms. These algorithms can easily lead to misjudgments due to different light and shadow changes caused by slight differences in PCB placement or solder amount so that qualified PCBs are judged as defective products, which is also the main reason for the high misjudgment rate of AOI detection. In order to effectively solve the problem of AOI misjudgment, manual re-judgment is currently the reinspection method adopted by most PCB manufacturers for defective products judged by AOI. Undoubtedly, the need for inspectors is another kind of labor cost. To reduce the labor cost. of manual re-judgement, an accurate and efficient PCB defect reinspection mechanism based on deep learning algorithm is proposed. This mechanism mainly establishes two detection models, which can classify the defects of the product. When both models have basic recognition capabilities, the two models are then combined into a main model to improve the accuracy of defect detection. In the study, the data provided by Lite-On Technology Co., Ltd. were implemented. To achieve the practical application value in the industry, this research not only considers the problem of detection accuracy, but also considers the problem of detection execution speed. Therefore, fewer parameters are used in the construction of the model. The research results show that the accuracy rate of defect detection is about 95%, and the recall rate is 94%. Compared with other detection modules, the execution speed is greatly improved. The detection time of each image is only 0.027 s, which fully meets the purpose of industrial practical application.

Surface-mounted technology (SMT) welding defect detection plays a key role in the printed circuit board assembly (PCBA) production process, which affects the use of electronic products and cost. Previous works tend to realize defect detection with only defect samples and they assume that there are sufficient defect samples. However, defect samples are usually difficult to collect in real-life scenarios while enough template samples can be easily obtained. In addition, most existing works carry out defect detection based on benchmarks with simple backgrounds of PCBA, which is not suitable for PCBA with complex structures in modern electronic product manufacturing. To address the above issues, we propose a template-guidance Siamese network based on YOLO for SMT welding defect detection (TGSYOLO), which is deployed on a real SMT automatic optical inspection (AOI) system. First, the two-stream structure is introduced to extract deep features in defect images and template images, in which template features serve as guidance knowledge. Then, a template fusion Transformer (TFT) is proposed to model global features between detect and template features in the low-level stage, which could acquire long-range correlations to force the network to focus on potential defect regions. Next, to avoid the disappearance of tiny defect features during deep feature fusion, a multiscale attention feature pyramid network (MAFPN) is proposed to directly fuse defect semantic information from low-level features, which retains detailed expressions of defects through skip connection and obtains compact fusion features. Furthermore, we collect limited welding defect samples based on more complex PCBA backgrounds than previous works through a real SMT AOI system. Experiments on the limited dataset show that TGSYOLO could reach 0.985 of mAP@0.5, 0.885 of mAP@0.75, and 0.984 of F1, which is 0.008, 0.054, and 0.025 higher than other SOTA methods. Also, generalization experiments on the public DeepPCB show that TGSYOLO could still reach the best with 0.991 of mAP@0.5 and 0.89 of mAP@0.75, which proves that TGSYOLO has good generalization performance.

A printed circuit board (PCB) is an essential element for practical circuit applications and its failure can inflict large financial costs and even safety concerns, especially if the PCB failure occurs prematurely and unexpectedly. Understanding the failure modes and even the failure mechanisms of a PCB failure are not sufficient to ensure the same failure will not occur again in subsequent operations with different batches of PCBs. The identification of the root cause is crucial to prevent the reoccurrence of the same failure. In this work, a step-by-step approach from customer returned and inventory reproduced boards to the root cause identification is described for an actual industry case where the failure is a PCB burn-out. The failure mechanism is found to be a conductive anodic filament (CAF) even though the PCB is CAF-resistant. The root cause is due to PCB de-penalization. A reliability verification to assure the effectiveness of the corrective action according to the identified root cause is shown to complete the case study. This work shows that a CAF-resistant PCB does not necessarily guarantee no CAF and PCB processes can render its CAF resistance ineffective.