An Active Gate Driver Design for Dynamic Voltage Balancing in Series-Connected SiC MOSFETs

This article is focused on the electromagnetic radiation effects of Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) under total ionizing dose (TID) effect. A 650V trench-gate SiC MOSFET was selected as the experimental subject. The variations in the electronic characteristics of SiC MOSFETs were explained from the perspective of crystal defects. Furthermore, an analysis of the trends in the electromagnetic radiation characteristics of the device was conducted based on the changes in the electrical properties of SiC devices. A broad network model for electromagnetic radiation signals from SiC MOSFETs was proposed. This model facilitates the prediction and assessment of the damage extent and operational status of SiC MOSFET power devices through electromagnetic radiation signals. Additionally, a method for evaluating the on-orbit cycle of SiC devices was introduced based on this network model, presenting a new approach for predicting the lifespan and reliability analysis of SiC MOSFETs operating in space.

Industrial processes which use induction and dielectric heating are still relying on resonant converters based on vacuum tubes. New emerging medium‐voltage silicon carbide (SiC) semiconductor power devices have a potential to replace vacuum tubes and allow for more efficient and compact converters in the high‐frequency range. High‐voltage packages have been proposed in the literature that are suitable for the 10 kV SiC metal–oxide–semiconductor field‐effect transistors (MOSFETs), and its fast voltage switching capabilities in hard‐switched applications have been demonstrated. However, no packaging is presented which allows the high‐frequency operation of a 10 kV SiC MOSFET die. This study proposes the design of a power module for MHz resonant operation of a 10 kV SiC MOSFET. At high switching frequencies, the gate losses become substantial, thus the gate driver is included inside the power module package to ensure a low inductive and high thermally conductive design as seen from the gate driver. The inductance of the proposed power module layout structure is evaluated using ANSYS Q3D Extractor. The thermal performance of the integrated gate‐driver circuitry is experimentally verified. Finally, the resonant operation of a medium‐voltage SiC MOSFET power module is demonstrated experimentally at 1 MHz.

Series connection of Silicon Carbide (SiC) Metal‐Oxide‐Semiconductor Field‐Effect Transistors (MOSFETs) is an interesting solution to design switches for voltages that are not yet commercially available or limited for single‐die devices. However, inherent static and dynamic voltage balancing must be achieved. Voltage imbalance is caused by the device parameters spread, whose impact is pronounced in low‐inductive circuit layouts. This study investigates the optimal design and tuning limits of resistor‐capacitor (RC)‐snubber circuits and non‐adaptive, standard, voltage‐source gate drivers for achieving the best balancing in transient and steady‐state voltage distributions among series‐connected discrete SiC MOSFETs operating at speeds up to . It has been shown that a larger parameter mismatch will lead to uneven switching energy losses and larger voltage imbalances. It was also experimentally shown that increasing the gate resistor to slow down the devices will not always improve balancing when their parameter spread is large. Thus, tuning recommendations for the RC‐snubber circuit and gate driver were developed based on these findings.

Silicon carbide (SiC) metal oxide semiconductor field effect transistor (MOSFET) power module is the next generation switching device for the medium voltage (MV) variable frequency drive (VFD). This paper investigates two problems which compromise system reliability and robustness of SiC MV VFD products. The first object is to mitigate the overvoltage transients on AC induction motors when connected through a cable of arbitrary length to a MV VFD consisting of a pulse-width modulation (PWM) inverter with SiC MOSFETs. The second topic is to develop the inverter thermal model to prevent the device failure from overheat issue. One solution is to design the smart SiC MOSFET gate driver with adjustable turn-on resistors. Second option is to use the dv / dt or sine-wave filters to smooth the inverter output waveforms. Analysis and simulations have been carried out to verify the proposal.

Silicon carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) has become the core device of power-switching converters with its excellent characteristics. An accurate and simple model of medium voltage SiC MOSFET is necessary for device evaluation, system design, and power converter efficiency prediction. This paper presents an equivalent circuit simulation behavior model, of which all parameters are abstracted from the datasheet, based on a three layers’ artificial neural network. The inputs are the gate voltage and the drain-source voltage, and the output is the drain current. In addition, the method of importing the neural network into circuit simulation software Pspice is discussed. The model is simple to create with no additional experiment, and is suitable for engineers at all stages to evaluate SiC MOSFET characteristics. The accuracy of the new model proposed in this paper has been verified by comparison with the data in the datasheet.

Power electronic devices are crucial components of power converter systems. The evolution of power devices drives the development of power converters, including improvements in performance, reliability, and power capacity. In this chapter, the author expounds the structure, working principle, and static and dynamic characteristics of the conventional PN junction diode. And the silicon carbide (SiC) Schottky barrier diode (SBD), junction barrier Schottky (JBS) diode, trench JBS (T-JBS) diode, and sidewall-enhanced trench JBS (SET-JBS) diode are also discussed and compared. Also, the structures and properties of the gallium oxide (Ga2O3) SBD and heterojunction diode are also summarized. Next, the author gives a detailed analysis and discussion of the silicon power metal-oxide-semiconductor field-effect transistor (MOSFET), superjunction MOSFET, and the SiC MOSFET and JFET, and the Ga2O3 MOSFET. Then, the device structure and operating principle, switching characteristics, and current tailing mechanism of the insulated gate bipolar transistor (IGBT) are also analyzed and summarized in detail. Finally, the energy band structure, working principle, and switching characteristic of the gallium nitride (GaN) high-electron mobility transistor (HEMT), one of the hot devices in the current market, are also described. Finally, the summary and prospect of power electronic devices are also presented in this chapter.

Due to its high thermal conductivity, high critical breakdown electric field, and high power, the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) has been generally used in industry. In industrial applications, a common reliability problem in SiC MOSFET is avalanche failure. For applications in an avalanche environment, an improved, vertical, double-diffused MOSFET (VDMOSFET) device has been proposed. In this article, an unclamped inductive switching (UIS) test circuit has been built using the Mixed-Mode simulator in the TCAD simulation software, and the simulation results for UIS are introduced for a proposed SiC-power VDMOSFET by using Sentaurus TCAD simulation software. The simulation results imply that the improved VDMOSFET has realized a better UIS performance compared with the conventional VDMOSFET with a buffer layer (B-VDMOSFET) in the same conditions. Meanwhile, at room temperature, the modified VDMOSFET has a smaller on-resistance (Ron,sp) than B-VDMOSFET. This study can provide a reference for SiC VDMOSFET in scenarios which have high avalanche reliability requirements.

Silicon carbide (SiC) metal-oxide-semiconductor field effect transistors (MOSFETs) are commonly used in the power transistor industry owing to their superior conductivity, low switching loss, high-frequency operation, and desirable thermal characteristics. However, the short-circuit withstand time of SiC MOSFETs is shorter than that of Si devices, which is disadvantageous in fault states. Gate drivers for SiC MOSFETs require short-circuit protection and soft termination circuits to detect short circuits and protect the power devices and systems from a short-circuit state. Thus, short-circuit protection circuits for SiC MOSFETs are reviewed in this paper. Accordingly, short-circuit detection circuits classified according to gate-source voltage (VGS), drain-source voltage (VDS), and drain-source current (IDS) detection methods are discussed. Moreover, the merits and demerits of soft termination circuits are reviewed.

The silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) under real-world operating conditions contends with multistress scenarios, involving thermal, mechanical, and electrical stresses, which in turn impact its reliability and operational lifespan. Consequently, a comprehensive exploration of aging precursors and failure mechanisms becomes imperative for the SiC MOSFETs under diverse stress interactions. This study delved into the repercussions of low-temperature storage (LTS) on power cycling test (PCT) reliability and short-circuit (SC) ruggedness, the impact of PCT on SC ruggedness, and the combined influence of LTS and PCT on SC ruggedness through direct current characteristic tests (dc test), low-frequency noise (LFN) tests, and failure analysis (FA) for 1.2 kV SiC MOSFETs. The outcomes revealed that LTS adversely affected both PCT lifetime and SC withstand time (SCWT), PCT, and LTS and PCT also adversely affected SCWT. These findings provide insights into the reliability and operational lifespan of SiC MOSFETs under real-world operating conditions.

In this paper, a feedback active gate driver (AGD) based on a multistage technique for improving the switching trajectory of silicon carbide (SiC) MOSFET devices is presented. The main purpose of this technique is to reduce the oscillations and overshoot in high-frequency with low switching losses. Besides, the gate driver is designed considering the current load variations with simple circuit structure. An AGD validation has been developed by using simulations. The results have shown the behaviour of the AGD and feasibility. Therefore, the AGD can reduce the oscillations to avoid electromagnetic interference (EMI) and also decrease the overshoots caused by high di/dt current and dv/dt voltage slopes. In addition, the tests showed that the proposed AGD can be developed with low switching losses in high-frequency applications and medium power.

A change regulation of variation in drain current (dID/dt) of silicon carbide (SiC) metal–oxide–semiconductor field‐effect transistors (MOSFETs) and their temperature dependencies are examined. Experimental results show that the magnitude of turn‐off dID/dt decreases with temperature and turn‐on dID/dt increases with increasing temperature. Further analysis shows that turn‐on dID/dt is better than turn‐off dID/dt in terms of temperature dependency and exhibits good linearity. This behaviour results from the positive temperature coefficient of the intrinsic carrier concentration and the negative temperature coefficient of the effective mobility of the electrons in the SiC MOSFET. Other factors that affect the temperature dependency of dID/dt, such as supply voltage, load current, and gate resistance, are also discussed. A temperature‐based analytical model of dID/dt for the SiC MOSFET is derived using fundamental device physics equations. The calculations generally fit the measurements well. These results are beneficial since they provide a potential approach for junction temperature estimation in the SiC MOSFET. In SiC MOSFET‐based practical applications, if turn‐on dID/dt is sensed, then the junction temperature can be derived from the relationship curve of turn‐on dID/dt versus temperature drawn experimentally in advance.

This paper investigates an active gate driver for a large capacity multi-chip SiC-MOSFET power module. The active gate driver utilizes the reactive voltage of the source wire inductance as the negative feedback signal of the gate voltage. In addition, the feedback stabilization design is included in the circuit. The switching characteristics of the conventional resistive gate driver and the active gate driver are experimentally investigated by a double pulse test setup. The switching setup condition is 800 V / 300 A. This paper describes the construction of the active gate driver circuit and the experimental results. The over-shoot and ringing of the Vds and Is are reduced by using the active gate driver. In addition, the switching loss is simultaneously reduced.

An approach for extracting the SiC/SiO2 SiC MOSFET interface trap distribution and study during short circuit

This paper presents a novel analytical loss formulation to predict the efficiency of three-phase inverters using silicon carbide (SiC) metal—oxide—semiconductor field-effect transistors (MOSFETs). The proposed analytical formulation accounts for the influence of the output current harmonic distortion on the conduction losses as well as the impact of the output parasitic capacitances and the deadtime on the switching losses. The losses are formulated in balanced conditions to select suitable SiC MOFETs for the desired target efficiency. To validate the proposed methodology, a 3-phase inverter is designed to present full load efficiency in excess of 99% when built using SiC MOSFETs antiparalleled with SiC Schottky diodes selected for the specified full load efficiency. Experimental assessment of the designed inverter efficiency is compared with the expected values from the proposed analytical formulation and shown to match or exceed the predicted results for loads ranging from 40% to 100% of full load.

Threshold voltage (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> ) shift caused by bias temperature instability (BTI) has become the most serious reliability problems in silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET). BTI-induced V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> shift is divided into recoverable shift and permanent shift. The traditional V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> shift measurement method for silicon (Si) devices is difficult to monitor the recoverable shift of SiC MOSFET. To solve this problem, firstly, based on the physical structure and working principle of SiC MOSFET, this paper establishes an analytical model of forward voltage of body diode (V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SD</inf> ) under body effect based on the reverse conduction resistance (R <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SD-ON</inf> ). Secondly, the influence mechanism of BTI on V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SD</inf> is studied. Finally, a method is proposed to monitor V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> of SiC MOSFET utilizing the forward voltage of body diode under body effect at small current. The experimental results prove that this method can real-time extract V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</inf> , and the monitoring method is simple.