Active Gate Driver for High Power SiC-MOSFET Module with Source Current Feedback and P-D controller

This paper investigates an active gate driver (AGD) for an SiC-MOSFET. The source current feedback type active gate driver utilizes the reactive voltage of the source wire inductance as a negative feedback signal to regulate the source current di/dt. Recently, the improvement of the switching performance of the AGD is limited due to the feedback system bandwidth. In this paper, a high bandwidth current feedback type power operational amplifier is applied as the gate drive circuit. Switching characteristics of the conventional resistive gate driver and the active gate driver are experimentally investigated by a double pulse test setup. The switching setup condition is 700 V / 80 A. This paper describes the construction of the AGD circuit and the experimental results. The over-shoot and ringing of the Vds and Is are reduced by using the active gate driver. In addition, the switching loss is simultaneously reduced.

In this paper, a feedback active gate driver (AGD) based on a multistage technique for improving the switching trajectory of silicon carbide (SiC) MOSFET devices is presented. The main purpose of this technique is to reduce the oscillations and overshoot in high-frequency with low switching losses. Besides, the gate driver is designed considering the current load variations with simple circuit structure. An AGD validation has been developed by using simulations. The results have shown the behaviour of the AGD and feasibility. Therefore, the AGD can reduce the oscillations to avoid electromagnetic interference (EMI) and also decrease the overshoots caused by high di/dt current and dv/dt voltage slopes. In addition, the tests showed that the proposed AGD can be developed with low switching losses in high-frequency applications and medium power.

High power insulated gate bipolar transistors (IGBTs) are integral to modern power conversion systems across railway traction, renewable energy, and HVDC transmission. Traditional gate drivers offer limited adaptability under dynamic conditions, leading to increased switching losses and reduced reliability. This paper proposes a novel current source based active gate driver (CS-AGD) tailored for high-power IGBT modules, enabling dynamic control of transient switching characteristics. We design and prototype a CS-AGD circuit, integrate it within a wide-range double-pulse test platform, and experimentally validate its performance under voltages up to 1000 V and currents up to 600 A. Results demonstrate significant reductions in switching losses and peak voltage/current overshoots compared to conventional gate driving strategies. The proposed solution offers enhanced controllability, opening new pathways for reliability- optimized and high-efficiency power electronic systems.

With the development of silicon carbide devices, the use of low-voltage Silicon Carbide (SiC) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) in series has become an option in medium/high voltage applications, but it introduces voltage imbalance problem and SiC MOSFETs suffer the great voltage peak stresses as well as the extremely high dv/dts. This brings great challenges to the insulation design of the gate driver circuit. In this study, based on the strategy of adjusting the driving signal time delay, an active gate driver is designed, it can not only reduce the design of sampling isolation through the ‘floating ground’ but also reduce the requirement for the coupling capacitance of the isolated power supply. Finally, the proposed active gate driver circuit is verified through experiments.

The trend in power electronic applications is to reach higher power density and higher efficiency. Currently, the wide band-gap devices such as silicon carbide MOSFET (SiC MOSFET) are of great interest because they can work at higher switching frequency with low losses. The increase of the switching speed in power devices leads to high power density systems. However, this can generate problems such as overshoots, oscillations, additional losses, and electromagnetic interference (EMI). In this paper, a novel active gate driver (AGD) for improving the SiC MOSFET switching trajectory with high performance is presented. The AGD is an open-loop control system and its principle is based on gate energy decrease with a gate resistance increment during the Miller plateau effect on gate–source voltage. The proposed AGD has been designed and validated through experimental tests for high-frequency operation. Moreover, an EMI discussion and a performance analysis were realized for the AGD. The results show that the AGD can reduce the overshoots, oscillations, and losses without compromising the EMI. In addition, the AGD can control the turn-on and turn-off transitions separately, and it is suitable for working with asymmetrical supplies required by SiC MOSFETs.

The acceptance of Wide band Gap devices is partially dependent on the ease of retrofitting existing designs of power converter. Standard power modules are inherently ill-suited to the fast switching behavior of Silicon Carbide power transistors. Active gate drivers can manage the switching dynamics of power devices by means of feedback and control on the gate. This paper proposes a low cost yet effective di/dt-based active gate driver using a sensor made on a printed circuit board (PCB) and an analog feedback loop.

Silicon carbide (SiC) MOSFET features low switching loss and it is advantageous in high switching frequency application, but the manufacture per Ampere cost is approximately five times higher than the silicon (Si) IGBT. Therefore, by paralleling Si IGBT and SiC MOSFET together, a trade-off between cost and loss is achieved. In this paper, a four control freedoms active gate driver (AGD) including turn-on delay, turn-off delay, and two independent gate voltages, is proposed to optimize the performance of the paralleled device. By adjusting these four control freedoms, optimal operation for paralleled device can be obtained. Moreover, the proposed AGD can dynamically adjust the current ratio between two paralleled devices, which can help achieve thermal balance between two devices and improve system reliability. Double pulse test (DPT) experimental results are presented and analyzed to validate the effectiveness of the proposed AGD for paralleled Si IGBT and SiC MOSFET application.

This paper addresses the issues of switching behavior of a high power insulated gate bipolar transistor (IGBT) that works in hard switching conditions. First, the voltage and current switching waveforms of IGBT modules are described for an IGBT phase-leg module with an inductive load, and the associated switching losses, reverse recovery current of free-wheeling diodes, voltage overshoot, and EMI noise are analyzed. Based on the analysis, an actively controlled gate drive circuit is proposed, which provides optimization of the fast driving for low switching losses and short switching time, and slow driving for low noise and switching stress. Compared to a conventional gate drive strategy, the proposed active gate driver (AGD) has the capability of reducing the switching losses, delay time, and Miller plateau duration effectively during both turn-on and turn-off transient. Experimental results verify the validity and effectiveness of the proposed gate driving method.

The series connection of silicon carbide (SiC) MOSFETs and the cascaded system allows operating at a higher voltage than the rated voltage of devices. However, the unbalancing voltage problem occurs in the series-connected devices. The main reason for the unbalancing voltage problem is the parasitic capacitance of the device's gate to the ground. There are several methods for balancing the series-connected device voltage. The snubber circuits, active clamp circuits and the active gate driver. In this paper, the active gate driver method is proposed to control the unbalanced device voltage. Also, the device voltage sensing circuit and the feedback controller are designed in detail. Finally, the proposed active gate driver is verified with the simulation.

Flyback converters with synchronous rectifiers are an important topic in power electronics, given their widespread use in various applications and the focus on efficiency improvement. However, flyback converters suffer from a high overvoltage across the synchronous rectifier on their secondary side. This overshoot voltage is a result of resonance between the flyback transformer stray inductance and the output capacitance of the rectifier. This paper presents an in-depth experimental study on the optimization of dead time and Active Gate Driving in flyback converters employing synchronous rectifiers, i.e. Silicon Carbide Power MOSFETs in place of the secondary rectifier driven synchronously with the primary switch. The focus is the influence of symmetrical dead time variation between the primary and secondary switches on switching losses and overshoot voltage. In addition, the influence of a three voltage level active gate driver on the overshoot voltage and switching losses is examined, finding no significant influence. The findings from this study contribute to the existing body of knowledge by providing a nuanced understanding of dead time optimization in flyback converters with synchronous rectifiers, as well as the utilization of Active Gate Drivers in such systems. The results have implications for the design and operation of these converters, potentially leading to more efficient and reliable systems.

The trend in the development of power converters is focused on efficient systems with high power density, reliability and low cost. The challenges to cover the new power converters requirements are mainly concentered on the use of new switching-device technologies such as silicon carbide MOSFETs (SiC). SiC MOSFETs have better characteristics than their silicon counterparts; they have low conduction resistance, can work at higher switching speeds and can operate at higher temperature and voltage levels. Despite the advantages of SiC transistors, operating at high switching frequencies, with these devices, reveal new challenges. The fast switching speeds of SiC MOSFETs can cause over-voltages and over-currents that lead to electromagnetic interference (EMI) problems. For this reason, gate drivers (GD) development is a fundamental stage in SiC MOSFETs circuitry design. The reduction of the problems at high switching frequencies, thus increasing their performance, will allow to take advantage of these devices and achieve more efficient and high power density systems. This Thesis consists of a study, design and development of active gate drivers (AGDs) aimed to improve the switching performance of SiC MOSFETs applied to high-frequency power converters. Every developed stage regarding the GDs is validated through tests and experimental studies. In addition, the developed GDs are applied to converters for wireless charging systems of electric vehicle batteries. The results show the effectiveness of the proposed GDs and their viability in power converters based on SiC MOSFET devices. La tendencia en el diseño y desarrollo de convertidores de potencia está enfocada en realizar sistemas eficientes con alta densidad de potencia, fiabilidad y bajo costo. Los retos para cubrir esta tendencia están centrados principalmente en el uso de nuevas tecnologías de dispositivos de conmutación tales como, MOSFETs de carburo de silicio (SiC). Los MOSFETs de SiC presentan mejores características que sus homólogos de silicio; tienen baja resistencia de conducción, pueden trabajar a mayores velocidades de conmutación y pueden operar a mayores niveles de temperatura y tensión. A pesar de las ventajas de los transistores de SiC, existen problemas que se manifiestan cuando estos dispositivos operan a altas frecuencias de conmutación. Las rápidas velocidades de conmutación de los MOSFETs de SiC pueden provocar sobre-voltajes y sobre-corrientes que conllevan a problemas de interferencia electromagnética (EMI). Por tal motivo, el desarrollo de controladores de puertas es una etapa fundamental en los MOSFETs de SiC para eliminar los problemas a altas frecuencias de conmutación y aumentar su rendimiento. En consecuencia, aprovechar las ventajas de estos dispositivos y lograr sistemas más eficientes y con alta densidad de potencia. En esta tesis, se realiza un estudio, diseño y desarrollo de controladores activos de puerta para mejorar el rendimiento de conmutación de los MOSFETs de SiC aplicados a convertidores de potencia de alta frecuencia. Los controladores son validados a través de pruebas y estudios experimentales. Además, los controladores de puerta desarrollados son aplicados en convertidores para sistemas de carga inalámbrica de baterías de vehículos eléctricos. Los resultados muestran la importancia de los controladores de compuerta propuestos y su viabilidad en convertidores de potencia basados en carburo de silicio.

This article describes a novel resonant gate driver for charging the gate capacitor of power metal-oxide semiconductor field-effect-transistors (MOSFETs) that operate at a high switching frequency in power converters. The proposed resonant gate driver is designed with three small MOSFETs to build up the inductor current in addition to an inductor for temporary energy storage. The proposed resonant gate driver recovers the CV2 gate loss, which is the largest loss dissipated in the gate resistance in conventional gate drivers. In addition, the switching loss is reduced at the instants of turn on and turn off in the power MOSFETs of power converters by using the proposed gate driver. Mathematical analyses of the total loss appearing in the gate driver circuit and the switching loss reduction in the power switch of power converters are discussed. Finally, the proposed resonant gate driver is verified with experimental results at a switching frequency of 1 MHz.

This article shows both theoretical and experimental analyses of a fully integrated CMOS active gate driver (AGD) developed to control the high dv/dt of GaN transistors for both 48 and 400 V applications. To mitigate negative effects in the high-frequency spectrum emission, an original technique is proposed to reduce the dv/dt with lower switching losses compared to classical solutions. The AGD technique is based on a subnanosecond delay feedback loop, which reduces the gate current only during the dv/dt sequence of the switching transients. Hence, the dv/dt and di/dt can be actively controlled separately, and the tradeoff between the dv/dt and EON switching energy is optimized. Since GaN transistors have typical voltage switching times on the order of a few nanoseconds, introducing a feedback loop from the high voltage drain to the gate terminal is quite challenging. In this article, we successfully demonstrate the active gate driving of GaN transistors for both 48 and 400 V applications, with initial open-loop voltage switching times of 3 ns, due to a full CMOS integration. Other methods for dv/dt active control are further discussed. The limits of these methods are explained based on both experimental and simulation results. The AGD showed a clear reduction in the peak dv/dt from -175 to -120 V/ns for the 400 V application.

Silicon carbide (SiC) devices have the benefit of low energy losses and high operation temperature. The fast switching speed of SiC may result in serious electromagnetic interference (EMI) noise, overshoot voltage, and even false triggering. To address these issues, an intelligent cascaded multi-level active gate driver (AGD) topology is proposed to control the switching trajectory of the power device dynamically. It can flexibly adjust the switching speed by either speeding up or slowing down. Its slow turn-off mode has the advantage of short turn-off delay compared with a two-stage turn-off. The circuit has the benefits of simple-realization and cost-effectiveness. Also, a switching behavior trajectory-based model predictive control (MPC) strategy is introduced for this gate driver circuitry. The MPC strategy balances the switching energy losses, EMI noise, and switching process duration. The experimental results reveal that the proposed intelligent AGD can provide desirable performance for controlling the slew rate of the semiconductor device

Nowadays, most of the motor driving systems are still using IGBTs as power switches. Moreover, also for this kind of applications, energy saving is of the utmost importance. IGBTs driving solutions are traditionally implemented using a fixed output current for charging and discharging the switch's gate. This solution, however, does not take into account Miller Capacitance (Crss) non-linearity effects in recent device generation. As Crss value spreads at least of one order of magnitude over the collector-to-emitter voltage (V CE ) swing, the fixed current produces two different dV/dt, causing additional switching losses. In order to reduce them, a two-step gate driver is proposed in this paper. The presented solution has been firstly validated on a discrete concept board, then implemented in an integrated circuit developed in a $1\boldsymbol{\mu}\mathbf{m}$ High-Voltage (HV) SOI technology. Simulation and bench results are presented, highlighting the advantages of this solution and defining future improvements.