An advanced reactive ion etching process for very high aspect-ratio sub-micron wide trenches in silicon

Hierarchical nanostructures are typically fabricated with multiple lithography steps on prepatterned micro- or nanostructures. However, such conventional multiple lithography steps result in poor coverage and uniformity, especially when patterning on high-aspect-ratio micro- or nanostructures. In this work, the authors present a new fabrication method which can make hierarchical nanostructures even on high-aspect-ratio prepatterns, using a free-standing trilayer membrane. The nanoporous trilayer composite films, consisting of metal/photoresist/antireflective coating, is created on a planar silicon substrate by using laser interference lithography, reactive ion etching, and e-beam deposition. Then, a customized solution of ammonia (NH3), hydrogen peroxide (H2O2), and water (H2O) is used to release the composite film from the supporting substrate. The free-standing composite membrane is then transferred on a prepatterned silicon substrate. Showing no major defects on the membrane surface, the flexible and soft trilayer membrane allows a good, uniform contact with the top surface of the prepatterns and is utilized as a robust etch mask in the deep reactive ion etching (DRIE) process of silicon to fabricate hierarchical nanopore structures. Since the membrane covers the top surfaces of the prepatterns seamlessly, the nanopore patterns of the membrane are transferred onto the top surfaces with great fidelity during the etching process. The membrane can also be used as a stencil for deposition processes. For example, metal is deposited through the nanoporous membrane by a lift-off process. Then, the transferred metal nanodot patterns are used as an etch mask in the DRIE process to achieve high-aspect-ratio hierarchical nanopillar structures. Compared to conventional methods to fabricate hierarchical nanostructure, the introduced new approach is more reliable and versatile to realize large-area hierarchical nanostructures with a good uniformity, in both nanopore and nanopillar array by using the same single membrane.

In this work, a silicon-based micro-probe array was fabricated using multi-step deep reactive ion etching (DRIE) and reactive ion etching (RIE) processes. The micro-probe structure was implemented using a micromachining technique through a combination of two anisotropic DRIE and two isotropic RIE processes with a single etch mask. The cone-shaped tip height and tapered tip-end angle were experimentally varied with respect to the first DRIE depth. As the first DRIE depth was decreased, the micro-probe tip height increased and the sharpness consequently improved. The conductive layer was exposed only at the tip ends of the micro-probe to form a conical ultra-micro electrode, and it was characterised via cyclic voltammetry measurements.

The thickness of a capacitive disk resonator can be increased by selecting a deep reactive ion etching (DRIE) process for reducing motional resistance. However, the DRIE process sometimes causes MEMS capacitive resonators to have a non-ideal profile. In this paper, the slope effect of a resonator profile fabricated by a DRIE process on the capacitance, electrostatic force, electrical stiffness, motional resistance and output current of the capacitive resonator is analyzed. The relation curves between these parameters and the sloped angle are obtained theoretically. The results show that the capacitance, electrostatic force, electrical stiffness and output current decrease as the sloped angle increases, but the motional resistance obviously increases. By capturing the electric field distribution of a capacitive resonator with different ratios of the gap to thickness by using FEM software ANSYS, the effects of slope angle and thickness on the natural frequency of the resonator are investigated. The analyzed results can provide the theoretical basis for designing high-performance MEMS disk resonators fabricated by the DRIE process.

This paper reports an advanced deep reactive ion etching (DRIE) process for realizing ultra-deep ( 500-μm) and ultra-high aspect-ratio (UHAR) silicon structures (AR 40 for 1-mm through-trench etch, AR ≈ 80 for 500-μm through-trench etch, and AR 20 for 500-μm through-hole etch), with straight sidewalls across a wide range of feature sizes. The challenges of making such structures are overcome by continuously ramping critical parameters of the Bosch DRIE process throughout the process, including the 380-kHz bias power during etch step, the etch/passivation step duration, and the chamber pressure. The masking material capable of enduring the long DRIE process is also discussed; 10-μm and 25-μm wide trenches are etched to a depth of 750-μm and 1000-μm, respectively, in 1-mm-thick silicon wafers with straight sidewall profiles and flat trench bottoms. Deeper trenches are expected to be etched beyond a 1-mm thick wafer with thicker and/or higher selectivity masking materials. We have also demonstrated etching of circular holes of diameters as small as 25-μm to a depth of 500-μm, and potentially with 10-15 μm diameter holes. This advanced DRIE process offers opportunities for applications ranging from through-silicon via in 3-D CMOS integration to emerging microand meso-scale microelectromechanical system applications that demand ultra-deep and UHAR DRIE.

Switchable wetting and flexible SiC thin film with nanostructures for microfluidic surface-enhanced Raman scattering sensors

The notching and stiction problem, which widely exists in silicon on insulator (SOI) microstructure fabrication, were resolved in this study. In this paper, a new plasma trench technique that is based on the deep reactive ion etching (DRIE) process is proposed. In this modified process, the deep reactive ion etching (RIE) was divided into several steps, where conformal plasma enhanced chemical vapor deposition (PECVD) oxide coating, and directional oxide etch back were employed to prevent the notching effect and the reactive ion etching (RIE) lag effect is also improved. Therefore, the microstructures regardless of the feature sizes could be realized. The stiction problem is eliminated by using dry chemical release replacing wet release in this approach, where the notching effect is used. The notching or footing effect was exploited for attaining the lateral etch following the deployment of the anisotropic plasma etching of the inductively coupled plasma (ICP). This method was proven useful for both the uniform and non-uniform feature designs. With this novel process, the high aspect ratio beams can be obtained. The thickness of the silicon layer is 75 μm, while the depth of the beams is 70 μum where the 5 μm silicon was etched to suspend the movable beams. The aspect ratio is as high as 35. Trenches with very different widths of 2.5 μm and 35 μm are also achieved at the same time.

Recently, demands for nanochannels have been increasing in biological and nanofluidic applications. In this paper, a fabrication process that produces a nanochannel with a width of less than 20 nm and a high aspect ratio is proposed. For the versatility of channel pattern design, focused ion beam (FIB) direct writing is applied for mask fabrication. A metal mask pattern is fabricated using localized ion implantation method and is used for a deep reactive ion etching (DRIE) process. A process condition for minimum undercut in the DRIE process is determined. The proposed method is applied to the fabrication of nanochannels with various dimension and patterns.

Development, fabrication, and test of a modular eddy current micro sensor on a flexible polymer foil

In information and communication technology (ICT) equipment indispensable for modern society, semiconductor memories occupy the main position of storage memories, working memories, and e-memories in logic blocks. In current semiconductor memories, rapid increase in the power consumption is most serious issue, as the more energy-saving is strongly required for ICT technology. From above view point, STT-MRAM and its application such as NV-Logic are aggressively studied in the world and many excellent results were published. However, almost results of STT-MRAM were fabricated by ion beam etch (IBE) process. Therefore, for higher density STT-MRAM's mass-production under wide patterning process margin and high TAT, plasma based reactive ion etch (RIE) process technology for MTJs is needed. In this invited paper, it is reviewed our previas results regarding STT-MRAM and NV-Logic fabricated by RIE process as shown in Fig. 1. It is shown that STT-MRAM and NV-MCU etc. were successfully worked under extremely low power consumption. Moreover, it is reviewed our previas results of RIE process technology itself. We presented process and device results from a developed chemistry set which significantly reduces the etch damage compared with conventional chemistry. An etched MTJ stack profile is included in Fig. 2. The damage caused by RIE on the magnetic properties of the CoFeB free layer in a MTJ with a perpendicular easy axis (p-MTJ), and on the TMR ratio of CoFeB-MgO p-MTJs was characterized to identify its root cause. Fig. 3 includes TMR data from a selection of different chemistry sets. Our developed chemistry is based on learning that it is N and H radicals that are the primary source of damage. With our developed process, high TMR ratio was achieved with very slight degradation. We report our chemistry, its underlying concept, resultant MTJ profiles, device electrical and magnetic properties. Finally, we summarize the MTJ damage mechanism useful for bringing MTJ fabrication etch technology to maturity.

We are developing novel ultra light-weight and high-resolution X-ray micro pore optics for space X-ray telescopes. In our method, curvilinear micro pore structures are firstly fabricated by silicon deep reactive ion etching (DRIE) or X-ray LIGA processes. Secondly, side walls of the micro structures are smoothed by magnetic field assisted finishing and/or hydrogen annealing techniques for high reflectivity mirrors. Thirdly, to focus parallel X-ray lights from astronomical objects, these structures are elastically or plastically bent into a spherical shape. Fourthly, the bent structures are stacked to form a multi-stage X-ray telescope. In this paper, we report on fabrication and X-ray reflection tests of silicon and nickel X-ray mirrors using the DRIE and LIGA processes, respectively. For the first time, X-ray reflections were confirmed on both of the mirrors. Estimated rms roughnesses were 5 nm and 3 nm for the silicon and nickel mirrors, respectively.

In contrast to existing microelectromechanical systems (MEMS), this paper describes the development, fabrication, and testing of an anisotropic magnetoresistance (AMR) microsensor using a 7 μm thick polymer foil as substrate material. The modular magnetic field micro sensors are fabricated on a standard 4 in Si Wafer due to handling purposes during the sensor fabrication process. To enable a release of the micro sensors at the end of the fabrication process, initial investigations concentrated on the proof of principle applying a deep reactive-ion etching (DRIE) process to structure the Si wafer. The DRIE process was used to structure Si frames, which serve as carriers for the modular magnetic field micro sensors. For the evaluation of the fabricated modular magnetic field micro sensors, electrical resistance measurements were accomplished. The aim of these investigations was the characterization of the magnetic field dependence of the electrical resistance. The electrical output signal of the AMR sensors were subsequently compared to electrical resistance measurements of AMR sensors fabricated on a Si substrate and served as reference. The measurement results show a marginal effect of the substrate material on the characteristics of the AMR sensors.

Surface wettability in terms of the size of the micro nano structures has been examined. To evaluate the influence of the nano structures on the contact angles, we fabricated two different kinds of structures: squarepillar-type microstructure with nano-protrusions and without nano-protrusions. Microstructure and nanostructure arrays were fabricated by deep reactive ion etching (DRIE) and reactive ion etching (RIE) processes, respectively. And plasma polymerized fluorocarbon (PPFC) was finally deposited onto the fabricated structures. Average value of the measured contact angles from microstructures with nanoprotrusions was 6.37° higher than that from microstructures without nano-protrusions. This result indicates that the nano-protrusions give a crucial effect to increase the contact angle.

We report about the development of novel nanocomposite resists that incorporate colloidal silica nanoparticles into conventional resist materials to yield thick coatings with both excellent lithographic properties and significantly increased plasma etch resistance. 10-50 wt% silica nanoparticles of 10-15 nm in size were dispersed homogeneously in a variety of standard resist resins by a simple process. The nanocomposite resists have similar lithographic performances to conventional resists without silica nanoparticles. The nanocomposite resists also show excellent process window capability and stability. Oxygen plasma etch and deep reactive ion etching (DRIE) processes were used to evaluate the etch resistance of the nanocomposite resists. Compared with standard photoresists, the oxygen plasma etch rate is reduced by 38-80% when the silica content increases from 20 to 50 wt%. The etch selectivity of nanocomposite resists with 40 wt% silica is increased by 70% in DRIE test.

A reactive ion etching (RIE) process is used for the fabrication of submicron, movable single-crystal silicon (SCS) mechanical structures and capacitor actuators. The process is called SCREAM for single crystal reactive etching and metallization process. The RIE process gives excellent control of lateral dimensions (0.2 mu m approximately 2 mu m) while maintaining a large vertical depth (1 mu m approximately 4 mu m) for the formation of high aspect ratio, freely suspended SCS structures. The silicon etch processes are independent of crystal orientation and produce controllable vertical profiles. The process also incorporates process steps to form vertical, 4 mu m deep, aluminum, capacitor actuators. Using SCREAM, the authors have designed, fabricated and tested two-dimensional x-y microstages and circular SCS structures. For the x-y stage they measured a maximum displacement of +or-6 mu m in x and y with 40 V DC applied to either x or y, or both x and y actuators. The process technology offers the capability to use a structural stiffness as low as 10-2 N m-1.

There is a growing concern over the side wall damage caused by plasma etching in low-k interconnect process development. The extended vertical irregularities termed as “striations” is one such plasma damage resulting in a very rough surface on trench side walls. In the present work, mechanism of striation formation was studied in the trench etching process of ultra low-k (ULK) “spin-on type” film in Cu/ULK interconnects for 130 nm technology node. Reactive ion etch process was carried out to form trenches in the ultra low-k film capped with a dual hard mask deposited by chemical vapor deposition (CVD) technique. The ultra low-k film thickness was 5000 Å and critical dimension target of trench was 180 nm. Very obvious trench side wall striations were seen after etching the trenches with the conventional etch chemistry containing C4F8/CO gas mixture and stripping with O2 gas. An alternate method using different etch chemistry containing CHF3 gas mixture was proposed which greatly minimized the side wall striations. The mechanism of striation formation on trench side walls and successful elimination by modified etch process was studied and correlation of results was obtained through surface roughness measurements on blanket film. The alternate method of etching provided valuable solutions to trench etch of ultra low-k material. Several advantages evolved from this method of etching will also be discussed in this paper.