An improved Zero-Voltage-Transition interleaved boost converter with high power factor

These A novel power factor correction (PFC) Converter employing zero voltage transition (ZVT) technique based boost topology is proposed in this paper. It operates at a fixed frequency while achieving zero voltage turn-on of the main switch and zero current turn-off of the boost diode. This is accomplished by employing resonant operation only during switch transitions. During the rest of the cycle, the resonant network is essentially removed from the circuit and converter operation is identical to its non-resonant counterpart. This technique increases the efficiency to 95% and power factor to 0.99. Soft switching of the diode also reduces EMI, an important system consideration.The principle of operation, theoretical analysis, simulation results and experimental results are presented. A prototype of 500 W is built to test the proposed topology. The input voltage is from 170 V rms to 230 V rms. The output voltage is 400 V. The operation frequency is 100 KHz.

This paper proposes a new high-gain soft-switching dc–dc topology based on a switched inductor boost converter (SIBC). A conventional SIBC as a high gain boost topology has the issues of high conduction loss in switching diodes and high switching loss in the main switches. Also, it has severe electromagnetic interference (EMI) issue due to high-frequency ringing formed by parasitic inductance and diode junction capacitors. The new topology is derived with the objective of achieving zero voltage switching (ZVS) turn on of the main switch. Instead of adding extra active clamp zero voltage transition (ZVT) path at the switching node, the proposed topology augments the auxiliary ZVT path to the switching diode path. This is achieved by replacing the switching diodes with synchronous switches. The new topology can achieve soft switching for all the switches and alleviate the EMI issue. All the diodes achieve zero current switching (ZCS) turn off without reverse recovery. Auxiliary switches have ZCS turn on and ZVS turn off , and the main switches have ZVS turn on . The soft-switching SIBC also reduces the conduction loss in the switching diodes. A numerical simulation in PLECS and a prototype hardware are built corresponding to a micro-inverter application with 100 kHz switching frequency. Peak power conversion efficiency of 94.76% is achieved in the hardware prototype with Si devices.

This study presents a zero‐voltage‐transition (ZVT) bridgeless power factor correction (PFC) rectifier, which uses an auxiliary circuit with a transformer to achieve soft‐switching for the main power switches. With the auxiliary circuit, the main switches can be ZVT turned‐on without any additional voltage or current stresses. In addition, the auxiliary switch is turned‐off with zero‐current switching. Therefore, the switching loss of all power switches is reduced, and the overall rectifier efficiency is improved. The circuit topology, operation analysis and the components selection of the proposed rectifier are described in detail. Finally, a laboratory prototype of 700 W is implemented and tested to verify the performance of the proposed PFC rectifier.

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn- on of part power switch and soft turn- off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis.

In this study, a new zero-voltage transition (ZVT)–zero-current transition (ZCT) quasi-resonant buck converter, which ensures zero crossings at any time required for soft switching (SS) and provides ZVT turn-on and ZCT turn-off together for the main switch of active snubber cell in buck converter is presented. The proposed circuit combines the most of the advantageous features of the circuits presented previously and overcomes most of drawbacks of these circuits by using only one auxiliary switch with fewer other components. Consequently, new ZVT–ZCT quasi-resonant buck converter, which is verified by a prototype of a 0.4-kW and 100-kHz circuit, is analysed in detail. All semiconductor devices operate under SS, the main switch is subjected to no additional voltage and current stresses, and the stress on the auxiliary switch is very low in the proposed new converter.

Bridgeless Cuk PFC converter with full load range soft switching operation by using a simple auxiliary circuit

This paper is concerned with the design, construction and testing of a 3-phase to 3-phase soft switching matrix converter. Two auxiliary soft switching circuits are added to each output phase in order to achieve soft switching without significantly increasing the conduction losses. The converter operation is discussed with reference to theoretical waveforms. The distribution of the switching losses with respect to load current and commutation voltage is investigated. Using the proposed topology it is possible to disable the auxiliary switch when the current and/or voltage is low. This simplifies the design of the auxiliary circuit as the range of operating conditions is reduced, allowing better optimisation in terms of switching losses and commutation speed. We present results from a 3-phase to 3-phase prototype matrix converter showing switching waveforms for all commutation scenarios. Measurements of the overall power circuit losses are presented and comparisons are made with conventional hard switching matrix converters. The distribution of losses between the different loss mechanisms will be investigated for both converters. It is shown that the switching losses for the main switches is reduced by about 50% but this is compensated for by the losses in the auxiliary switches resulting in no significant increase in efficiency. Further research will be required to develop viable soft switching matrix converter structures.

The inherent dead angles of the input line current in buck power factor correction (PFC) converter deteriorates the power factor (PF). This article introduces a new bridgeless single-phase buck (PFC) converter with reduced components. This converter is designed to operate in discontinuous conduction mode (DCM) to achieve inherent PFC with a simple structure. The DCM operation gives additional advantages, such as low turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> losses and reduced complexity of the control circuitry. Unlike the buck PFCs, in which dead angle is the main drawback, in the proposed converter the PF is improved and the dead angle is eliminated by applying an auxiliary switch. Besides, the efficiency is further improved by employing the bridgeless structure. The switching losses are eliminated due to achieved zero current switching (ZCS) at the turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> of the main switches, and also ZCS at the turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> and zero voltage switching at turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> of the auxiliary switch. The proposed topology is successfully implemented on a 120 W prototype converter at 110 Vrms input voltage and 48 V output voltages, and its performance is experimentally verified. The results show the total harmonic distortion of 5.3% and efficiency of 93.1% at the rated load.

&lt;div class="section abstract"&gt;&lt;div class="htmlview paragraph"&gt;As light electric vehicles (LEVs) gain popularity, the development of efficient and compact on-board chargers (OBCs) has become a critical area of focus in power electronics. Conventional AC-DC topologies often face challenges, including high inrush currents during startup, which can stress components and affect system reliability. Furthermore, DC-DC converters often have a limited soft-switching range under light load conditions, leading to increased switching losses and reduced efficiency. This paper proposes a novel 6.6 kW on-board charger architecture comprising a bridgeless totem-pole power factor correction (PFC) stage and an isolated LLC resonant DC-DC converter. The main contribution lies in the specific focus on enhancing startup behavior and switching performance. In PFC converters, limiting inrush current during startup is crucial, especially with fast-switching wide-bandgap devices like SiC or GaN. Conventional soft-start techniques fall short in of ensuring smooth voltage transitions. Moreover, maintaining stable operation across a universal input voltage range and achieving a high-power factor under light load conditions remain persistent challenges. Although resonant converters are widely used for their natural soft-switching ability, achieving zero voltage switching (ZVS) over a wide range of loads, especially at light load conditions, is still a technical challenge. Existing solutions rely on complex control strategies or hardware modifications, which increase cost and design complexity. The proposed architecture was modeled and simulated using MATLAB/Simscape to assess dynamic and steady-state behavior under a range of operating conditions. Results demonstrated high input power factor, line/load regulation, and switch-node waveforms to confirm ZVS operation. Additionally, the proposed charger exhibits low harmonic distortion, ensuring compliance with IEC 61000-3-2 power quality standards. These findings confirm the topology’s effectiveness for high-performance LEV charging and set a strong foundation for future experimental validation and hardware development.&lt;/div&gt;&lt;/div&gt;

Dedicated to such industry requirements as high power, rigorous harmonic standard and isolation, a novel solution that combines the topology of full-bridge and fully digital controller is presented. This paper deals with a 5 KW power factor correction (PFC) converter that is based on the topology of single-stage (SS) full-bridge (FB) structure with input current shaper and RCD clamping circuit. Especially, the clamping capacitor can partly return its stored energy. A transformer used to provide galvanic isolation allows a wide range of output, offering multi-output solutions. The adopted improved digital strategy features fast dynamic response and excellent steady regulation, in addition, problem of flux density bias for the transformer that occurs in analog control strategy is successfully solved without any auxiliary circuit. Both power stage and density are drastically improved. High power factor and high efficiency are achieved. The excellent performances of the converter are verified by a prototype, whose rating output power is 5 kW and PFC operating frequency is 55 kHz. Furthermore, PF value and efficiency of full load are respective 0.994 and more than 92%.

This paper proposes an interleaved zero voltage transition (ZVT) PWM buck converter. The proposed converter consists of two identical buck converter modules and an auxiliary circuit. The auxiliary circuit provides zero voltage switching condition for the main switches. Also, zero current switching condition for the auxiliary switch and diodes is achieved. The interleaved buck converter with the proposed auxiliary switch is analyzed. The simulation results of a 300W ZVT interleaved buck converter operating at 100 KHz are presented to justify the validity of theoretical analysis.

Buck-buck/Boost power factor correction (PFC) converter is a great choice to compensate the inherent dead zones in the input current of buck PFC converter. However, whether the converter operates with traditional constant on-time control in critical conduction mode (CRM) or with conventional constant duty-cycle control in discontinuous conduction mode (DCM), the power factor (PF) is low, especially at low input voltage. Therefore, fixed on-time ratio control (FOTRC) and fixed duty-cycle ratio control (FDCRC) are proposed for CRM/DCM buck-buck/boost PFC converter to achieve high PF, respectively. Both control methods maximize PF over wide input voltage range by adjusting on-time or duty-cycle of buck/boost mode and buck mode. Compared with the traditional controls, the proposed control methods also have advantage of increasing efficiency. Furthermore, for improving dynamic response performance, smooth and rapid dynamic response control (SRDRC) is put forward, which can reduce the regulation time and output voltage overshoot/undershoot when the load or input voltage changes abruptly. In addition, the implementation circuits combining FOTRC/FDCRC and SRDRC are designed. Two prototypes have been built and tested in the lab to demonstrate the validity of the theoretical analysis.

Power Factor Correction (PFC) converter is a key component in modern switching power supplies, while high efficiency and high power density are the main goals of PFC converter. In this paper, taking a single-phase Boost circuit as an example, a PFC converter with 300 kHz switching frequency and 1 kW output power which is based on continuous inductor current (CCM) mode is designed to reduce the volume of the core component and improve the power density of the converter. The paper includes the detailed design of the boost inductor, the analysis of the loss of the inductor at high frequency operation and the loss of the PFC converter. Finite element analysis is used to verify that the winding loss can be reduced by taking multi-strand wire winding. New semiconductor devices CoolMOS and SiC are employed which can reduce the loss effectively. The experimental results are provided which demonstrate that the employ of SiC diode and multi-strand wire winding can enable enhanced performance on efficiency.

In this paper, a novel interleaved high step-up (HSU) converter is presented. The proposed converter features a large voltage gain and common input-output grounding. In this interleaved HSU converter, by using only one zero voltage transition (ZVT) auxiliary circuit with one auxiliary switch and low number of elements, soft switching (SS) performance for all the semiconductors over a wide range of load variations is achieved. This leads to advantages of high efficiency and low complexity, expense, and size. The characteristics of the proposed converter are compared to similar state of the art converters, and to confirm its effectiveness, the simulation results of the proposed converter are presented.

There is a need to improve the power quality of the grid as well as the power factor implied on the grid due to the nonlinear loads connected to it. A new single phase bridgeless AC/DC power factor correction (PFC) topology to improve the power factor as well as the total harmonic distortion (THD) of the utility grid is proposed in this research. By eliminating the input bridge in conventional PFC converters, the control circuit is simplified; the total harmonics distortion THD and power factor PF are improved. The controller operates in multi loop fashion as the outer control loop calculates the reference current through innovative filtering and signal processing. Inner current loop generates PWM switching signals through the PI controller. Analytical derivation of the proposed converter is presented in detail. Performance of the proposed PFC topology is verified for prototype using PSIM circuit simulations. The experimental system is developed, and the experimental results agree with simulation results.