Analysis and implementation of complex phase-coded pulse signals

This article discusses the current state and development trends of microwave frequency synthesizers for test-and-measurement instruments. The discussed trends are also applicable for other synthesizer types used as modules in more complex systems. Test-and-measurement synthesizer market is estimated at $300 with an annual growth rate about 3%.A modern trend for the development of frequency synthesizers is associated with low phase noise, low spurious and fast switching speed. Important parameters also include operating frequency range, frequency resolution, modulation capabilities as well as size and cost characteristics. The main architectures based on direct analog, direct digital and indirect synthesis are evaluated. As of today, traditional indirect phase-lock-loop (PLL) architectures still dominate. On the other hand, direct analog synthesis is the most advanced approach that demonstrates extremely fast switching speed and low phase noise. Nevertheless, future developments are associated with direct digital synthesis (DDS) due to the rapid progress in solid-state technologies. DDS are currently available as special integrated circuits (IC) or can be build using field-programmable logic arrays (FPGA) and high-frequency digital-to-analog converters (DAC). Parallel (multichannel) digital structures coupled with high-frequency DACs allow generating output signals at microwave frequencies. Further improvements are possible using two or more DACs in an interleaved data mode. Wider frequency coverage through several tens of gigahertz and lower spur characteristics are expected.The article notes that modern frequency synthesizers allow generating complex signals using vector IQ-modulation. The modulation bandwidth is constantly increases through hundreds of megahertz or even several gigahertz. Further advances in microwave frequency synthesizers are associated with new reference types such as sapphire-loaded cavity oscillators with combined frequency stabilization as well as optoelectronic methods.

This chapter provides a design of micro-broadband radar signal source based on direct digital frequency synthesis technology. This micro-broadband radar signal source is composed of baseband signal source and frequency multiplier chain. Direct Digital Synthesis (DDS) chip AD9858 was used in the baseband signal source. A FPGA chip was employed to load DDS control words to create 200MHz ± 50MHz baseband signal. Multiplier chain achieved up-conversion and frequency doubling of baseband signal, and output 1.5GHz + 400MHz broadband radar Linear Frequency Modulated (LFM) signal. Oscilloscope and spectrum analyzer measurements results showed that the quality of LFM signal met the design requirements.KeywordsExcitation SignalLinear Frequency ModulateBaseband SignalLinear Frequency Modulate SignalFPGA ChipThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Traditional Direct Digital Synthesis (DDS) waveform generators were usually completed by DDS chips, which were expensive and poorly customizable. This paper proposed a CPLD-based DDS multi-waveform generator design. DDS was independently developed and programmed by VHDL language. The system could be interfaced with PC. The system was mainly divided into two parts: upper computer and lower computer. The upper computer part mainly included the main interface design of the system, the sending of control commands and the receiving part of data. The sending and receiving of commands and data was realized by serial communication. The upper computer part was programmed by High-level programming language named DELPHI. The lower computer part mainly included DDS design part, the reception of control commands and the transmission of data, etc., the lower computer part mainly adopt VHDL language to be programmed in CPLD. The DDS design part mainly included the design of the phase accumulator, the design of the ROM, the design of the D/A part, and the design of the low-pass filter. The system could adjust the frequency of the output waveform by adjusting the size of the frequency word, and adjust the waveform shape of the system output by adjusting the internal data of the ROM. Simulation and experimental results showed that: the DDS multi-waveform generator designed by CPLD could achieve the expected goal, and the work effect was good.

linear frequency modulated continuous wave (LFM-CW) radars require high linearity and good phase noise characteristics of its modulated signal to obtain a good resolution and sensitivity. Direct digital Synthesis (DDS) is becoming an increasingly competitive alternative to traditional Voltage Controlled Oscillators (VCO) to perform the modulation. Although there are plenty of publications describing the performance of the DDS, there has up to now not been any direct comparison between the performance of the DDS and the VCO as applied in FM-CW radars. In this paper the performance of DDS is analyzed both theoretically and with measurements. The performance of DDS in a linear frequency modulated continuous wave (LFM-CW) radar system, (the Transportable Atmospheric Radar TARA developed in IRCTR), is compared to a VCO demonstrating its superiority. DDS is, therefore, expected to play an important role in radar systems in the near future.

This paper presents a novel completely scaling-free CORDIC algorithm in rotation mode for hyperbolic trajectory. We use most-significant-1 bit detection technique for micro-rotation sequence generation to reduce the number of iterations. By storing the sinh/cosh hyperbolic values at octant boundaries in a ROM, we can extend the range of convergence to the entire coordinate space. Based on this, we propose a pipeline hyperbolic CORDIC processor to implement a direct digital synthesizer (DDS). The DDS is further used to derive an efficient arbitrary waveform generator (AWG), where a pseudo-random number generator modulates the linear increments of phase to produce random phase-modulated waveform. The proposed waveform generator requires only one DDS for generating variety of modulated waveforms, while existing designs require separate DDS units for different type of waveforms, and multiple DDS units are required to generate composite waveforms. Therefore, area complexity of existing designs gets multiplied with the number of different types waveforms they generate, while in case of proposed design that remains unchanged. The proposed AWG when mapped on Xilinx Spartan 2E device, consumes 1076 slices and 2016 4-input LUTs. The proposed AWG involves significantly less area and lower latency, with nearly the same throughput compared to the existing CORDIC-based designs.

Direct digital synthesis (DDS) is a useful tool for generating periodic waveforms. In this two-part article, the basic idea of this synthesis technique is presented and then focused on the quality of the sinewave a DDS can create, introducing the SFDR quality parameter. Next effective methods to increase the SFDR are presented through sinewave approximations, hardware schemes such as dithering and noise shaping, and an extensive list of reference. When the desired output is a digital signal, the signal's characteristics can be accurately predicted using the formulas given in this article. When the desired output is an analog signal, the reader should keep in mind that the performance of the DDS is eventually limited by the performance of the digital-to-analog converter and the follow-on analog filter. Hoping that this article would incite engineers to use DDS either in integrated circuits DDS or software-implemented DDS. From the author's experience, this technique has proven valuable when frequency resolution is the challenge, particularly when using low-cost microcontrollers.

In this paper, we propose a low-cost arbitrary waveform generator to simulate battery voltage transients specified by ISO 16750–2 voltage profiles. The proposed methodology is based on the technique of direct digital synthesis (DDS) implemented in a microcontroller. The proposed approach allows reducing the amount of Flash memory used by the lookup table. The device generates several types of waveforms and uses a sequencer to combine them into the desired voltage profile. For testing purposes, emulations of the variations on the cranking voltage and the superimposed A.C. voltage are used to validate the proposed solution.

In modern calibrators of instruments for measuring electric-power quality, the voltage is reproduced by direct digital synthesis (DDS) of the signal. The main structures and methods of regulating the frequency of the output signal of DDS-synthesizers are considered. It is shown that, for a number of parameters, the frequency regulation method, when the reference frequency of the digital-to-analog converter is varied using a DDS generator, is the most preferable.

High-stability adaptive frequency comparison method based on fuzzy area characteristics

The traditional GNSS (Global Navigation Satellites System) signal simulation method cannot be applied to the DS-FH signal directly for the carrier frequency is hopping. Especially under high-dynamic conditions, it increases the difficulty to precisely simulate Doppler shift and synthesize real-time signal phase for DS-FH (Direct Sequence - Frequency Hopping) signal simulation. In this paper, the high-dynamic DS-FH signal model is demonstrated and the approach to generate hopping frequency is discussed. Then the high-order DDS (direct digital synthesis) model and its parameter design criteria are provided. Simulation results indicate that the method is effective to simulate the high-dynamic DS-FH signal.

This paper describes a low spurious and small step frequency synthesizer module based on PLL (Phase-Locked Loop)-DDS (Direct Digital Synthesis)-PLL structure, which is controlled by the parallel port of the computer. The module consists of four parts: the first PLL (PLL1), the DDS, the second PLL (PLL2) and the control part. The spurious of this module is ameliorated to some extent in comparison with traditional synthesizer technologies using single PLL. The experimental measurement of the actual module shows that the spurious is as low as -65 dBc. In addition, its frequency range is 2060 MHz-2160 MHz, the frequency step size 10 kHz, the phase noise -90 dBC/Hz@10 kHz and the harmonics -40 dBc.

Advances in communications have enabled the development of various types of radars for applications such as cartography, military industry, materials testing, air traffic control, and autonomous vehicle guidance. We present the design and implementation of an embedded system for generating Radio Frequency (RF) signals for radar applications. Using a Cyclone V Field Programmable Gate Array (FPGA) and the BladeRF 2.0 platform, the system employs Direct Digital Synthesis (DDS) and In-phase/Quadrature (I/Q) modulation techniques for precise signal generation. The carrier signal embeds information from Lineal Frequency-Modulated signals (LFM), which are shifted in frequency to the S-band. Additionally, a synchronization module has been implemented to ensure precise activation during transmission. Simulation and experimental results demonstrate significant improvements in signal stability, flexibility, and precision. This development advances high-frequency embedded technologies with applications in wireless communications and radar detection systems.

Traditional human impedance measuring instruments adopt excitation signal with single frequency, which makes the measurement result cannot reflect the true character of human impedance. Meanwhile, they measure the whole body impedance, which makes the measurement result cannot reflect the body segments' impedance character that is very significant on many conditions, such as the measure of the body composition and the analysis of the blood flow. To solve these problems, multifrequency and multi-segment measuring method is introduced. In the design of this human impedance measuring instrument, ARM microprocessor is adopted as the microcontroller. The multifrequency signals are generated by direct digital synthesis (DDS) technology. At the process of analyzing the human impedance, fast Fourier transform (FFT) algorithm is used. The test for the instrument after the finished design verifies that the instrument measures impedance accurately and has a high precision. So the instrument can be applied in the area of both clinic and research.

There exist a number of algorithms to map the phase to amplitude in direct digital synthesis (DDS). For DDS with more than 14 output bits, the Coordinate Rotation Digital Computer (CORDIC) algorithm is well known for its high precision. Also, it is effective in solutions where there is the need of in-phase and quadrature components simultaneously because the algorithm calculates both. In this paper, a Taylor expansion based method was proposed to calculate both in-phase and quadrature at the same time. Numerical simulations for different data format, e.g., double and finite bits, were carried out in Matlab and Quartus, which were followed by the hardware implementation in Field Programmable Gate Array. The results demonstrated that the proposed method possessed higher precision and exhausted less logic elements than the CORDIC algorithm.

Electrical impedance tomography is a new imaging modality that produces images by computing electrical conductivity within the body. This paper presents a basic acquisition hardware system of Electrical Impedance Tomography with direct digital synthesis (DDS), which is used for studying the human head electrical property. The filtered back-projection algorithm is used for image reconstruction.