Analysis of Power Consumption in VLSI Global Interconnects

Power consumption analysis of constant bit rate video transmission over 3G networks

Design and analysis of a low-swing driver scheme for long interconnects

Synergistic and interference effects in coaxial mixers: Numerical analysis of the power consumption

At-speed scan testing has become mandatory due to the extreme CMOS technology scaling. The two main at-speed scan testing schemes are namely Launch-Off-Shift (LOS) and Launch-Off-Capture (LOC). As it can be easily implemented, LOC has been widely investigated in the literature in the last few years, especially regarding test power consumption. Conversely, LOS has received much less attention. In this paper, we propose a comparison between the two testing schemes in terms of transition fault coverage and power consumption, in order to quantify the pros and cons of LOS with respect to LOC. This study shows that LOS not only exhibits higher performance in coverage but also does not require as much extra power as predicted, especially in terms of peak power. These facts may represent convincing arguments for its wider use and development.

Analysis of power consumption in standalone 5G network and enhancement in energy efficiency using a novel routing protocol

In the anticipated spectrum, a lot of work has gone into managing the trade-offs between power, location, and efficiency in the moderate efficiency, moderate power region. However, research into the extremities of this spectrum remains restricted. In particular, there hasn't been enough research done on the extremes of extraordinarily low power consumption with appropriate efficiency and extraordinary efficiency with energy that is within realistic bounds. In this work, very low subthreshold power levels are used to study the power consumption characteristics of digital logic circuits in static Complementary Metal-Oxide-Semiconductor (CMOS) devices. The study shows that operating transistors below their threshold voltage might result in significant energy savings. This research emphasises the significance of subthreshold design strategies for contemporary electronic circuits that aspire for low-power operation without sacrificing efficiency. The results highlight the potential for significant progress in energy-efficient circuit design and highlight the delicate balance between preserving performance and cutting power usage. As a result, this research adds to our understanding of low-power electronics and provides information that may lead to the development of future technologies that are more efficient and sustainable. Keywords— Power consumption analysis, Digital logic circuits, Ultra-low power, Subthreshold operation, Static CMOS gates

Various gas pipeline networks used for the transit of energy sources are some of the most important infrastructures. However, carrying gas from one point to another is not the only concern when planning the construction of a new network or expanding an already existing one. The reliability and environmental impact of the system are crucial when evaluating the network and risks posed by potential gas leaks, fires, explosions, etc. Even though everyone admits that reliability is a key aspect of any system, its constraints will still be most likely neglected in the assessment of the pipeline project. How much energy is wasted by pushing an additional amount of gas through the pipeline network, which will eventually gush out of the pipeline because of one crack or another? Moreover, if this additional power or fuel consumption and related environmental impact are significant, how could it be reduced? In this paper, an approach is introduced for the simulation and quantification of how much more power would be required if the pipelines are regarded as unreliable (i.e., by leaking, rupturing, or even exploding). By employing stochastic simulations and time-dependent topology (topology determined by the value of a variable representing time) of the pipeline network as a case study for the selected representative gas transmission network, the amount of additional power consumption in gas compressor stations due to uncertain cracking and the leaking rate was evaluated. Although the analysis of power consumption was performed for a hypothetical network, the estimates of the cracking rates, detection effectiveness, and leaking rates used were as close to the real cases as possible.

This report describes an experiment carried out to understand how traffic transfer affects power consumption on consumer-grade ADSL modems. Three ADSL modems were studied: a Linksys AG041, a Cisco 837 and a Netgear DG834G. Parallel streams of data were sent between a client and a server PC and the effect on power consumption by the routers was recorded. We discovered that there was almost no difference in the amount of power drawn from the routers with regards to the amount of data transferred or the duration of transfer. We did determine that the Linksys AG041 draws significantly more power than the other two routers.

Container crane electrification is a re-powering process of container cranes from diesel to electricity. In electrification process, it is required an analysis of electrical power consumption that is needed in the operational of container crane. It aims to determine whether the amount of electrical power that is supplied by PLN can be optimally used in the operational of container crane to do loading and unloading activities. To perform the analysis of electrical power consumption, it is required various data and calculations. The required data are container crane specifications and other electrical equipment specifications, the amount of electrical power that is supplied by PLN, also the single line diagram from the electrical system at the port. While, the calculations that is needed to be performed are the calculation of electrical power load in motors and other electrical equipments, the calculation of nominal current and start current, the selection of cable and busbar, and the calculation of wiring diagram junction power. From the calculations that has been done, then the next step is to do the load flow analysis simulation by using software simulation, so an accurate and effective load flow analysis can be obtained to optimize loading and unloading activities at the port. The result of this research, it can be seen that container crane electrification will give advantages in both technical and economical for the company and for the ship, such as accelerate the loading and unloading time of containers and reduce idle time, especially in the operational of diesel generator .

Wi-Fi networks are becoming more and more ubiquitous and represent a substantial source of energy consumption around the globe, mainly when it comes to Access Points (APs). There has been some work done on the characterization of the power consumption of Wi-Fi APs and network interface cards (NICs), and the power usage of these devices under different configurations and standards but mostly using legacy standards. A detailed AP power consumption analysis, exploring the whole set of degrees of freedom and capabilities of these devices is lacking in the state of the art. In this paper, we present a thorough power consumption analysis, covering the configuration options available in enterprise Wi-Fi APs from the three major vendors on the market. The goal is to understand how the power consumption of an AP varies with the different configurations, and provide insights on the parameters that significantly affect the AP power consumption. The obtained experimental results confirm previous state-of-the-art conclusions but contradict some of the studies and results found in the literature, while updating results and conclusions taken in the past to the most recent standards, configurations, and data rates available today. The analysis provided herein is a valuable source of information for deriving new AP power consumption models and designing energy-efficient Wi-Fi networks.

Current power saving techniques have been focused on reducing the dynamic power consumption induced by switching activity in CMOS digital circuits. Among these techniques, we can cite the clock gating, dynamic voltage frequency scaling, adaptive voltage scaling, and multiple voltage thresholds. Recently, as transistor sizes get smaller, the leakage power consumption has become a non-negligible and dominating part of the total power consumption. Thus, it is essential to take care of this new constraint in order to design low-power embedded wireless communication systems. It's well known that there are a strong relationship between leakage power and die-temperature, so that the larger leakage power consumption is associated with the higher temperature. In this paper we give a detailed analysis of FPGA leakage power consumption based on die temperature measurement. Also, after discretizing the FPGA area into several rectangular regions, we investigate whether dynamic partial reconfiguration technique can be performed over different regions to decrease average die-temperature, and consequently the leakage power consumption.

-As the demand for low-power, high-performance memory systems grows, the design of efficient SRAM (Static Random Access Memory) cells becomes increasingly crucial. This paper explores the power consumption, performance, and stability of two SRAM cell designs: the conventional 6T and the Single Ended 6T SRAM. While the conventional 6T SRAM is prone to read disturb noise and high leakage power, it remains widely used due to its simplicity and compactness. To address these issues, the Single Ended 6T SRAM cell is introduced as an alternative, which reduces both power consumption and area while maintaining competitive performance. The study provides a detailed analysis of static and dynamic power consumption, read/write stability, and overall energy efficiency for both cell architectures. Simulation results show that the Single Ended 6T SRAM offers significant improvements in power reduction without compromising speed, making it a promising solution for future low-power, high-performance memory applications. Keywords— SRAM cell, Pre-Charge Circuits, Sense Amplifiers, and Single-Ended vs. Conventional 6T SRAM Cell.

In the context of the rapid development of electric vehicles, various new energy vehicle companies are promoting technological upgrading of products. High efficiency of power system, lightweight body and parts are its main development trend. In order to analyze the technical level of electric vehicle power consumption, this paper analyzes the technical level of three batches of vehicles mainly from three aspects: power consumption, temperature adaptability and power performance based on the test results of 21 EV-TEST models. The results show that after one year of technology development, the energy consumption has been reduced by about 9.9%; The temperature adaptability in high temperature environment is increased by 40.9%. The temperature adaptability in low temperature environment has been increased by 25.3%; The power performance has been improved by 11.3%. It shows that with the progress of technology, electric vehicles are developing in the direction of low energy consumption and high performance.

Power consumption of analog systems is poorly understood today, in contrast to the very well developed analysis of digital power consumption. We show that there is good opportunity to develop also the analog power understanding to a similar level as the digital. Such an understanding will have a large impact in the design of future electronic systems, where low power consumption will be crucial. Eventually we may reach a power centric analog design methodology.

With the growth of the Internet, communication and network security have been the focus of much attention. In addition, deployment of resource intensive security protocols in battery-powered mobile devices has raised power consumption to a significant design basis of network design. In this paper, we propose a power-efficient secure communication restart mechanism for a wireless network and analyze the power consumed while restarting a secure communication. An experimental test bed was developed to inspect the proposed mechanism and to evaluate it in terms of power consumption relative to that of conventional secure communication restart mechanisms. Using our enhanced mechanism, we were able to reduce the power consumed during a secure communication restart by up to 60% compared with conventional restart mechanisms.