Application of Resistive Random Access Memory in Hardware Security: A Review

A reconfigurable PUF structure with dual working modes based on entropy separation model

Chapter 12 - Hardware Security Primitives

This chapter introduces resistive random-access memory (RRAM), a futuristic memory technology that excels its counterparts in terms of reliability, nano-scale dimensions, energy per bit, and fast read/write times. Also, it is promising for use in neuromorphic computing and digital applications. However, the major challenge encountered during the progress of the technology is the presence of leakage current (sneak path current) while using it in crossbar arrays. Various techniques are employed to mitigate the sneak current problem. However, associating a selector with RRAM is an efficient method. To study the one selector-one RRAM (1S-1R) characteristics, the electrical model of the selector, as well as RRAM, is necessary; therefore, this chapter discusses the electrical modeling of selector device (1S), RRAM devices (1R), integration of selector models with the RRAM model (1S-1R), and formation of 1S-1R crossbar arrays. The selector device used to model this is Pt/Ta2O5/TaOx /TiO2/Pt, and the RRAM model adopted is Pt/Ta2O5/TaOx/Pt. Further, various parameters are analyzed, such as R off /R on ratio, nonlinearity, and off-current are improved in the 1S-1R cell compared to RRAM characteristics. Besides, it is perceived that 98% of the sneak path current is mitigated in the 1S-1R crossbar array compared to the 1R crossbar array.

Physically unclonable function (PUF) has been increasingly used as a promising primitive for hardware security with a wide range of applications in the Internet of Things (IoT). In recent years, novel PUF techniques based on resistive switching mechanism in various emerging nonvolatile memories have demonstrated superior performance on reliability and integration density. In this work, a resistive random access memory (RRAM)-based PUF chip with 8-kb capacity is developed. Two operation modes, namely differential mode and median mode, are embedded on chip. To implement these modes, a current sampling-based sense amplifier is designed to distinguish the current values of the PUF cells and the reference cell. In addition, a split-resistance scheme is proposed to enhance the PUF's reliability significantly. The experiment results show that the differential PUF exhibits excellent performance with native bit error rate (N-BER) below 6 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-6</sup> and inter-Hamming distance (inter-HD) of 49.99%. In the meanwhile, the reconfigurability of PUF challenge-response pairs (CRPs) is demonstrated with 49.77% and 47.29% reconfigure-Hamming distance (reconfigure-HD) in the median mode and the differential mode, respectively.

Resistance random access memory (RRAM) based on resistive switching in metal oxides has attracted considerable attention as a promising candidate for next-generation nonvolatile memory due to its high operating speed, superior scalability, and low power consumption. However, some operating parameters of RRAM cannot meet the practical requirement, which impedes its commercialization. A lot of experimental results show that doping is an effective method of improving the performance of RRAM, while the study on the physical mechanism of doping is rare. It is generally believed that the formation and rupture of conducting filaments, caused by the migration of oxygen vacancies under electric field play a major role in resistive switching of metal oxide materials. In this work, the first principle calculation based on density functional theory is performed to study the effects of transition metal element X (X=Mn, Fe, Co, and Ni) doping on the migration barriers and formation energy of oxygen vacancy in ZnO. The calculation results show that the migration barriers of both the monovalent and divalent oxygen vacancy are reduced significantly by Ni doping. This result indicates that the movement of oxygen vacancies in Ni doped ZnO is easier than in undoped ZnO RRAM device, thus Ni doping is beneficial to the formation and rupture of oxygen vacancy conducting filaments. Furthermore, the calculation results show that the formation energy of the oxygen vacancy in ZnO system can be reduced by X doping, especially by Ni doping. The formation energy of the oxygen vacancy decreases from 0.854 for undoped ZnO to 0.307 eV for Ni doped ZnO. Based on the above calculated results, Ni doped and undoped ZnO RRAM device are prepared by using pulsed laser deposition method under an oxygen pressure of 2 Pa. The Ni doped ZnO RRAM device shows the optimized forming process, low operating voltage (0.24 V and 0.34 V for Set and Reset voltage), and long retention time (&gt;104 s). Set and Reset voltage in Ni doped ZnO device decrease by 80% and 38% respectively compared with those in undoped ZnO device. It is known that the density of oxygen vacancies in the device is dependent on the oxygen pressure during preparation. The Ni doped ZnO RRAM device under a higher oxygen pressure (5 Pa) is also prepared. The Ni doped ZnO RRAM device prepared under 5 Pa oxygen pressure shows a little higher Set and Reset voltage than the device prepared under 2 Pa oxygen pressure, while the operating voltages are still lower than those of undoped ZnO RRAM. Thus, the doping effect in the ZnO system is affected by the density of oxygen vacancies in the device. Our work provides a guidance for optimizing the performance of the metal oxide based RRAM device through element doping.

In this study, we present an extensive statistical characterization of the cycling variability and Random Telegraph Noise (RTN) in the HfO 2 -based Resistive Random Access Memories (RRAM) cells. Devices with different dielectric stacks are tested under a variety of read (sampling times and read voltage magnitudes) and operational (reset voltages) conditions. A Factorial Hidden Markov Model (FHMM) analysis is employed to reveal the properties of the traps causing multi-level RTN in High Resistive State (HRS), while the I-V data are analyzed through the developed compact model to investigate cycling variability. The activation and deactivation of traps assisting the charge transport through a dielectric barrier in HRS is found to be responsible for the observed RTN while the read current variations can be attributed to the stochastic nature of the filament oxidation process during reset, also leading to a variable number of traps formed in the barrier after each switching cycle. The statistical characterization of RTN and cycling variability, which demonstrates the uncorrelated nature of these phenomena, provides guidelines for scaling and optimization of RRAM device operations and reliability.

Logic-in-memory architectures based on resistive random access memory (RRAM) technology and the material implication (IMPLY) logic are a promising solution for the development of energy efficient computing hardware for edge computing applications. However, RRAM devices nonidealities, such as cycle-to-cycle variability and random telegraph noise, and circuit-related issues such as logic state degradation, strongly affect the reliability of these circuits and complicate their design. In this, work we use a physics-based RRAM compact model which reproduces the effect of device nonidealities (i.e., variability, Random Telegraph Noise, self-heating) and that was calibrated on three RRAM technologies from the literature to study the reliability and performance of a conventional and a recently proposed smart IMPLY architectures. Finally, we underline the importance of the physics-based RRAM compact model as a tool for implementing device-circuit co-design strategies.

Random numbers are widely used in cryptographic algorithms and protocols. A faulty true random number generator (TRNG) may open a door into a system in spite of cryptographic protection. It is therefore important to design TRNGs so that they can be tested at different stages of their lifetime to assure their trustworthiness. In this paper, we propose a method for designing physical unclonable function (PUF)-based TRNGs which can be tested in-field by known answer tests. We present a prototype FPGA implementation of the proposed TRNG based on an arbiter PUF which passes all NIST 800-22 statistical tests and has the minimal entropy of 0.918 estimated according to NIST 800-90B recommendations. This is a nontrivial achievement given that arbiter PUFs are notoriously hard to place in a symmetric manner in FPGAs.

Resistive random-access memory (ReRAM) devices have emerged to be a promising source for ample information storage in next-generation nonvolatile memories (NVMs) and true random number generation (TRNG)-based robust cybersecurity. However, cycle-to-cycle performance degradation at the nanoscale results in deviation of the normal probability distribution, limiting ReRAM applicability to micron-size devices. This work demonstrates the efficacy of low-energy Au-ion implantation in nanometer-thick HfOx films in achieving a superior ReRAM performance at the nanoscale toward TRNG application. The role of Au-ion implantation in a single amorphous HfOx layer is demonstrated to create high-performance memory cells at the nanoscale. Local probe microscopy analysis provides a spatial identification of homogeneously distributed reproducible conductive filament locations and its one-to-one correlation with surface topography. The Au-implanted films exhibit a highly stable, forming-free bipolar resistive switching, having well-separated set and reset transitions with significantly small fluctuations (as low as 3.6% and 3.2%, respectively). The films display a negligible cycle-to-cycle degradation in low and high resistive states, thereby resulting in an outstanding cumulative probability distribution. The chi-square tests further reveal that the low resistive state current is an excellent physical source of six distinct random states. Hence, the ion implantation on economically viable and fabrication-friendly HfOx material is found to be a robust technique to fabricate high-performance ReRAM devices for future ultrahigh-integration density NVMs and TRNG sources for cybersecurity applications.

Lightweight implementation of security primitives, e.g., physical unclonable functions (PUFs) and true random number generator, in field programmable gate array (FPGA) is crucial replacement of the conventional decryption key stored in battery-backed random access memory or E-Fuses for the protection of field reconfigurable assets. A slice is the smallest reconfigurable logic block in an Xilinx FPGA. The entropy exploitable from each slice of an FPGA is an important factor for the design of security primitives. Previous research has shown that the locations of slices can impact the quality of delay-based PUF designs implemented on FPGAs. To investigate the effect of the placement of each single-bit PUF cell free from the routing resource constraint between slices, single-bit ring oscillator (RO) and identity-based PUF design (Pi-coPUF) cells that can each be fully fitted into a single slice are evaluated. To accurately evaluate their statistical performance, data from a large number of devices are required. To this end, 217 Xilinx Artix-7 FPGAs has been employed to provide a large-scale comprehensive analysis for the two designs. This is the first time single-slice disorder-based security entities have been investigated and compared on 28-nm Xilinx FPGA. Uniqueness, uniformity, correlation, reliability, bit-aliasing and min-entropy of each type of cell are evaluated for four different types of cell placement. Our experimental results corroborate that the location of both cell types in the FPGA affects their performances. For both cell types, the lower the correlation between devices, the higher the min-entropy and uniqueness. Overall, the min-entropy, correlation and uniqueness of PicoPUF are slightly higher than those of RO. Otherwise, the uniformity, bit-aliasing and reliability of the PicoPUF are slightly lower than those of the RO. Comparing the resource usage and metrics of the PicoPUF, ring oscillator PUF and some existing memory-based PUF implementations, PicoPUF stands out as a lightweight FPGA-based weak PUF design. The raw data for the PicoPUF design are made publicly available to enable the research community to use them for benchmarking and/or validation.

Random telegraph noise (RTN) is an important intrinsic phenomenon of any logic or memory device that is indicative of the reliability and stochastic variability in its performance. In the context of the resistive random access memory (RRAM), RTN becomes a key criterion that determines the read disturb immunity and memory window between the low (LRS) and high resistance states (HRS). With the drive towards ultra-low power memory (low reset current) and aggressive scaling to 10 × 10 nm2 area, contribution of RTN is significantly enhanced by every trap (vacancy) in the dielectric. The underlying mechanisms governing RTN in RRAM are yet to be fully understood. In this study, we aim to decode the role of conductance fluctuations caused by oxygen vacancy transport and inelastic electron trapping and detrapping processes. The influence of resistance state (LRS, shallow and deep HRS), reset depth and reset stop voltage (VRESET-STOP) on the conductance variability is also investigated.

The traditional von Neumann architecture limits the increase in computing efficiency and results in massive power consumption in modern computers due to the separation of storage and processing units. The novel neuromorphic computation system, an in-memory computing architecture with low power consumption, is aimed to break the bottleneck and meet the needs of the next generation of artificial intelligence (AI) systems. Thus, it is urgent to find a memory technology to implement the neuromorphic computing nanosystem. Nowadays, the silicon-based flash memory dominates non-volatile memory market, however, it is facing challenging issues to achieve the requirements of future data storage device development due to the drawbacks, such as scaling issue, relatively slow operation speed, and high voltage for program/erase operations. The emerging resistive random-access memory (RRAM) has prompted extensive research as its simple two-terminal structure, including top electrode (TE) layer, bottom electrode (BE) layer, and an intermediate resistive switching (RS) layer. It can utilize a temporary and reversible dielectric breakdown to cause the RS phenomenon between the high resistance state (HRS) and the low resistance state (LRS). RRAM is expected to outperform conventional memory device with the advantages, notably its low-voltage operation, short programming time, great cyclic stability, and good scalability. Among the materials for RS layer, indium gallium zinc oxide (IGZO) has shown attractive prospects in abundance and high atomic diffusion property of oxygen atoms, transparency. Additionally, its electrical properties can be easily modulated by controlling the stoichiometric ratio of indium and gallium as well as oxygen potential in the sputter gas. Moreover, since the IGZO can be applied to both the thin-film transistor (TFT) channel and RS layer, it has a great potential for fully integrated transparent electronics application.In this work, we proposed amorphous transparent IGZO-based RRAMs and investigated switching behaviors of the memory cells prepared with different top electrodes. First, ITO was choosing to serve as both TE and BE to achieve high transmittance. A multi-target magnetron sputtering system was employed to deposit all three layers (TE, RS, BE layers) on glass substrate. I-V characteristics were evaluated by a semiconductor parameter analyzer, and the bipolar RS feature of our RRAM devices was demonstrated by typical butterfly curves. The optical transmission analysis was carried out via a UV-Vis spectrometer and the average transmittance was around 80% out of entire devices in the visible-light wavelength range, implying high transparency. We adjusted the oxygen partial pressure during the sputtering of IGZO to optimize the property because the oxygen vacancy concentration governs the RS performance. Electrode selection is crucial and can impact the performance of the whole device. Thus, Cu TE was chosen for our second type of device because the diffusion of Cu ions can be beneficial for the formation of the conductive filament (CF). A ~5 nm SiO2 barrier layer was employed between TE and RS layers to confine the diffusion of Cu into the RS layer. At the same time, this SiO2 inserting layer can provide an additional interfacial series resistance in the device to lower the off current, consequently, improve the on/off ratio and whole performance. Finally, an oxygen affinity metal Ti was selected as the TE for our third type of device because the concentration of the oxygen atoms can be shifted towards the Ti electrode, which provides an oxygengettering activity near the Ti metal. This process may in turn lead to the formation of a sub-stoichiometric region in the neighboring oxide that is believed to be the origin of better performance.In conclusion, the transparent amorphous IGZO-based RRAMs were established. To tune the property of RS layer, the sputtering conditions of RS were varied. To investigate the influence of TE selections on switching performance of RRAMs, we integrated a set of TE materials, and a barrier layer on IGZO-based RRAM and compared the switch characteristics. Our encouraging results clearly demonstrate that IGZO is a promising material in RRAM applications and breaking the bottleneck of current memory technologies.

In this paper, the switching layer thickness and temperature impacts on resistance switching polarity of tantalum oxide (TaO x ) based resistive random access memory (RRAM) have been investigated. Our results show that at room temperature unipolar behavior was activated in thick TaO x but failed in thin TaO x , while in 280 °C condition thin TaO x layer RRAM can also show stable unipolar characteristics. For thick TaO x device, the unipolar behavior is attributed to more heat accumulation in thicker switching layer. In 280 °C condition, stable unipolar characteristic of thin TaO x device is due to extra ambient heat offered. In addition, thin TaO x RRAM with Si0 2 buffer layer is also fabricated to investigate the heat accumulation impact on operation polarity of RRAM devices. These results are helpful in obtaining the insight on understanding the switching mechanism of TaO x RRAM and improve the RRAM device performance and reliability capability.

Recent advances in the performance of resistive random access memory (RRAM) have engendered significant interest for system-on-chip (SoC) applications in Si-based CMOS technologies1, including various wireless sensor networks (WSNs) and medical health care devices. For most applications, the realization of energy-efficient sensor nodes with a high lifetime provides the prospect of completely autonomous systems. Recent hardware-based approaches to obtain energy-efficient sensor nodes focus on the integration of RRAM in a microcontroller unit (MCU) 2.Given the wide range of possible transition metal oxides, HfO2-based RRAM provides an ideal CMOS back-end-of-line (BEOL) compatibility with sufficient performance parameters and thus considerable progress has been made in integrating RRAM devices as well as in understanding the physical/chemical properties of the resistive switching behavior3,4. It still remains difficult in HfO2-based RRAM to further reduce energy dissipation and in addition to increase reliability for autonomous sensor nodes. To address this issue, RRAM integration aspects are accompanied by fundamental materials research studies.First, non-destructive and in-operando Hard X-ray Photoelectron Spectroscopy (HAXPES) 5,6 (Fig. 1(a)) was performed to correlate the RS characteristics for increased current compliance (CC) with materials modifications at the HfO2/Ti interface. HAXPES data indicate that the RS behvior does not only affect the Ti 2p, Hf 4f and O 1s photoemission lines but also C 1s (Fig. 1(b)). After survey spectra normalization to the Hf 4d peak intensity, the C 1s peak intensity increases with the increase of the electrical stress applied to the sample. After electroforming, the C 1s to Hf 4d intensity ratio IC/IHf increases from 0.4 (as-deposited-state) to 0.6 (ON-state 30 mA CC). This result indicates that carbon present in the HfO2film cannot be neglected and its role on the RS behavior of RRAM cells should be investigated in more detail. Obtained results will be presented.The fundamental materials research insights were then transferred to integrated 4 kbit RRAM test modules with the associated control circuitry 5 (Fig. 1(c)). Due to the statistic nature of the electroforming process as well as due to process-induced variation, the inter-cell variability of memory elements in a memory array after electroforming and during RS must be studied. To address the point above, Fig. 1 (d)-(e) shows the current distribution in the initial state (d) and after DC forming (e) for one 64 × 64 bit (4 kbit) memory device array. We note that the initial state shows inter-cell variability which affects the DC forming process. Statistical analysis reveals that some memory elements were conductive with a current of >1×10−5A and could thus not be formed. The presentation will summarize further results on inter-cell and intra-cell variability for a 4 kbit memory array.This work is financially supported by the German research foundation DFG under contract SCHR1123/7-1.[1] J. Suhonen et al. Low-Power Wireless Sensor Networks, Springer, (2012).[2] Y. Zhang, Future Wireless Networks and Information Systems, Springer, (2012).[3] S.-S. Sheu et al., Proc. ISSCC, pp. 200–202, (2011).[4] Tz-Yi Liu et al., Proc. ISSCC, pp. 210–212, (2013).[5]M. Sowinska et al., Appl. Phys. Lett. 100, 233509 (2012).[6] T. Bertaud et al., Appl. Phys. Lett. 101, (2012).[7] D. Walczyk et al., ISCDG, pp. 143-146, (2012).Figure 1: (a) RRAM device mounted on a PCB inside the HAXPES vacuum chamber 5,6. (b) HAXPES survey spectra for different resistive states: as-deposited and three ON-states (CC = 6, 20 and 30 mA). C 1s spectra of the as-deposited- and ON-state (30 mA). (c) Image of the 4 kbit memory array with control circuits 7. Current distribution in the initial state (d) and after DC forming (e) for a 64 × 64 bit (4 kbit) memory device array.

Ion irradiation: a tool to understand oxide RRAM mechanism