Approximate Time-Parallel Cache Simulation

Time-parallel simulation offers the potential of massive parallelization of a simulation application, due to the amount of achievable parallelism not being restricted by the decomposability of the state space of a simulation model. Unfortunately, the potential speedup of a time-parallel simulation highly depends on the ability to match final and initial states of adjacent time intervals. Depending on the properties of the underlying simulation model, it might be feasible to accept a simulation iteration, even if the states of adjacent time intervals do not match exactly. This leads to the concept of approximative state matching in time-parallel simulation, which is introduced in this paper. Experiments with a prototypical implementation of a simple simulation model show encouraging results in terms of simulation speedup and introduced error.

The paper presents the cache performance analysis of the Chronological Garbage Collection algorithm used in the LVM system. The LVM is a new Logic Virtual Machine for Prolog. It adopts one stack policy for all dynamic memory requirements and cooperates with an efficient garbage collection algorithm, Chronological Garbage Collection to recuperate space, not as deliberate garbage collection operation but as a natural activity of the LVM engine to gather useful objects. This algorithm takes advantages of the traditional copying, mark-compact, generational, and incremental garbage collection schemes. In order to determine the improvement of cache performance under our garbage collection algorithm, we developed an emulator to do the trace driven cache simulation. Direct mapped cache and set-associative cache with different cache sizes, block sizes and set associativities are simulated and measured. The objectives of this simulation are to verify and validate our experimental results, and to find important factors which influence the performance of the CGC algorithm.

We discuss some of the difficulties present in trace collection and trace-driven cache simulation. We then describe our multiprocessor tracing technique and verify that it accurately collects long traces. We propose sampling as a method to reduce required disk space, enable simulations to run faster, and effectively enlarge the trace buffer of our hardware monitor, decreasing trace distortion. To this end, we investigate time sampling and two types of set sampling. We conclude that the second set sampling technique achieves the most accurate results. The miss rate for the second set sampling method is calculated as the number of misses to sampled sets divided by the total number of references scaled by the sample size. We determined that a 10% sample size was the most accurate while still reducing required disk space.

Determining output uncertainty of computer system models

The performance of servers for network-intensive workloads such as web services and online transaction processing applications depends on the effective utilization of the processor caches. A detailed analysis of the cache space utilization of web workloads shows us that several memory addresses are referenced only once during their lifetime in the cache. These references frequently reside in the cache for a long time contributing to the pollution of cache. The most commonly adopted least-recently-used (LRU) replacement scheme does not exploit this characteristic. In this paper, we propose an alternative block replacement policy called Single-Touch Aware Replacement (STAR) algorithm. This algorithm predicts blocks that will potentially be referenced only once and replaces them early enough to improve cache efficiency. The STAR scheme was implemented in a trace-driven cache simulator and the performance with several commercial workloads was analyzed. The use of the STAR algorithm results in up to 20% improvement in cache performance for web workloads (SPECweb96, SPECweb99) and up to 5% improvement in online transaction processing (TPC-C) workloads.

Based on a new characterisation of data reuse across multiple loop nests, we preset a method, a prototyping implementation and some experimental results for analysing the cache behaviour of whole programs with regular computations. Validation against cache simulation using real codes shows the efficiency and accuracy of our method. The largest program, we have analysed, Applu from SPECfP95, has 3868 lines, 16 subroutines and 2565 references. In the case of a 32KB cache with a 32B line size, our method obtains the miss ratio with an absolute error of about 0.80% in about 128 seconds while the simulator used runs for nearly 5 hours on a 933MHz Pentium. III PC. Our method can be used to guide compiler locality optimisations and improve cache simulation performance.

BackgroundTelehealth played a critical role during the COVID-19 pandemic and continues to function as an essential component of health care. Existing platforms cannot ensure privacy and prevent cyberattacks.ObjectiveThe main objectives of this study are to understand existing cybersecurity issues in identity management and trustworthy communication processes in telehealth platforms and to design a software architecture integrated with blockchain to improve security and trustworthiness with acceptable performance.MethodsWe improved personal information security in existing telehealth platforms by adopting an innovative interdisciplinary approach combining design science, social science, and computer science in the health care domain, with prototype implementation. We used the design science research methodology to implement our overall design. We innovated over existing telehealth platforms with blockchain integration that improves health care delivery services in terms of security, privacy, and efficiency. We adopted a user-centric design approach and started with user requirement collection, followed by system functionality development. Overall system implementation facilitates user requirements, thus promoting user behavior for the adoption of the telehealth platform with decentralized identity management and an access control mechanism.ResultsOur investigation identified key challenges to identity management and trustworthy communication processes in telehealth platforms used in the current health care domain. By adopting distributed ledger technology, we proposed a decentralized telehealth platform to support identity management and a trustworthy communication process. Our design and prototype implementation using a smart contract–driven telehealth platform to provide decentralized identity management and trustworthy communication with token-based access control addressed several security challenges. This was substantiated by testing with 10,000 simulated transactions across 5 peers in the Rahasak blockchain network. The proposed design provides resistance to common attacks while maintaining a linear time overhead, demonstrating improved security and efficiency in telehealth services. We evaluated the performance in terms of transaction throughput, smart contract execution time, and block generation time. To create a block with 10,000 transactions, it takes 8 seconds on average, which is an acceptable overhead for blockchain-based applications.ConclusionsWe identified technical limitations in current telehealth platforms. We presented several design innovations using blockchain to prototype a system. We also presented the implementation details of a unique distributed architecture for a trustworthy communication system. We illustrated how this design can overcome privacy, security, and scalability limitations. Moreover, we illustrated how improving these factors sets the stage for improving and standardizing the application and for the wide adoption of blockchain-enabled telehealth platforms.

This paper investigates the questions of what statistical information about a memory request sequence is useful to have in making page replacement decisions. Our starting point is the Markov Request Model for page request sequences. Although the utility of modeling page request sequences by the Markov model has been recently put into doubt ([13]), we find that two previously suggested algorithms (Maximum Hitting Time [11] and Dominating Distribution [14]) which are based on the Markov model work well on the trace data used in this study. Interestingly, both of these algorithms perform equally well despite the fact that the theoretical results for these two algorithms differ dramatically. We then develop succinct characteristics of memory access patterns in an attempt to approximate the simpler of the two algorithms. Finally, we investigate how to collect these characteristics in an online manner in order to have a purely online algorithm.KeywordsMain MemoryFault SizePriority QueueFault RatePage SizeThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Recent research has demonstrated that ordinal comparison, i.e., comparing relative orders of performance measures of different designs, is efficient in the comparison and selection of designs for discrete event dynamic systems. This paper is concerned with comparison and selection in concurrent simulation where a large number of sample paths under different designs are generated efficiently. Particularly, effect of correlation among simulation processes on the convergence of ordinal comparison is investigated. By using a concept of indicator process, bounds on the rate of convergence of ordinal comparison are obtained. Such bounds imply that perturbation analysis, a powerful technique for performance analysis of discrete event dynamic systems, can be advantageous for ordinal comparison. Simulation examples show that appropriate correlation can significantly increase the convergence of ordinal comparison. Furthermore, it is shown that positive quadrant dependence provides guaranteed acceleration of the convergence of ordinal comparison compared with independent simulations.

Abstract. In the simulation of complex multi-scale flows arising in weather and climate modelling, one of the biggest challenges is to satisfy strict service requirements in terms of time to solution and to satisfy budgetary constraints in terms of energy to solution, without compromising the accuracy and stability of the application. These simulations require algorithms that minimise the energy footprint along with the time required to produce a solution, maintain the physically required level of accuracy, are numerically stable, and are resilient in case of hardware failure. The European Centre for Medium-Range Weather Forecasts (ECMWF) led the ESCAPE (Energy-efficient Scalable Algorithms for Weather Prediction at Exascale) project, funded by Horizon 2020 (H2020) under the FET-HPC (Future and Emerging Technologies in High Performance Computing) initiative. The goal of ESCAPE was to develop a sustainable strategy to evolve weather and climate prediction models to next-generation computing technologies. The project partners incorporate the expertise of leading European regional forecasting consortia, university research, experienced high-performance computing centres, and hardware vendors. This paper presents an overview of the ESCAPE strategy: (i) identify domain-specific key algorithmic motifs in weather prediction and climate models (which we term Weather & Climate Dwarfs), (ii) categorise them in terms of computational and communication patterns while (iii) adapting them to different hardware architectures with alternative programming models, (iv) analyse the challenges in optimising, and (v) find alternative algorithms for the same scheme. The participating weather prediction models are the following: IFS (Integrated Forecasting System); ALARO, a combination of AROME (Application de la Recherche à l'Opérationnel à Meso-Echelle) and ALADIN (Aire Limitée Adaptation Dynamique Développement International); and COSMO–EULAG, a combination of COSMO (Consortium for Small-scale Modeling) and EULAG (Eulerian and semi-Lagrangian fluid solver). For many of the weather and climate dwarfs ESCAPE provides prototype implementations on different hardware architectures (mainly Intel Skylake CPUs, NVIDIA GPUs, Intel Xeon Phi, Optalysys optical processor) with different programming models. The spectral transform dwarf represents a detailed example of the co-design cycle of an ESCAPE dwarf. The dwarf concept has proven to be extremely useful for the rapid prototyping of alternative algorithms and their interaction with hardware; e.g. the use of a domain-specific language (DSL). Manual adaptations have led to substantial accelerations of key algorithms in numerical weather prediction (NWP) but are not a general recipe for the performance portability of complex NWP models. Existing DSLs are found to require further evolution but are promising tools for achieving the latter. Measurements of energy and time to solution suggest that a future focus needs to be on exploiting the simultaneous use of all available resources in hybrid CPU–GPU arrangements.

A new distributed information system called DORMIA has been developed to support mobile information access from portable computers with weak network connectivity. This paper describes the design and implementation of DORMIA. The design aims to provide high availability, heterogeneous support and high efficiency. To maximize availability, users can read or write any accessible replica. A scalable algorithm based on logical clocks has been developed to keep object replicas consistent. Novel methods are used to detect and resolve conflicts based on record level checking. The use of reliable multicast provides effective means to update the replicas. The use of CORBA IDL and Java to define interfaces provides the full heterogeneous support. To enable a mobile client to continue accessing critical data during temporary disconnection, we have developed the pre-fetching and reintegration mechanism to support the disconnected operation. A performance measurement study is subsequently conducted with the prototype implementation. The results indicate that the system developed is highly efficient.

This paper presents a dynamic and scalable caching algorithm for proxy servers with a finite storage size. Under a general video traffic condition, it is observed that the amount of decreased client’s buffer size and channel bandwidth after caching a video frame depends on the relative frame position in the time axis as well as the frame size. Based on this fact, we proposed an effective scalable caching algorithm to select the cached frames by using the normalized buffer size. The obtained data are saved into the metafile. Now, we study the caching and replacing algorithms for multiple videos that are based on the metafile and effectively reduce both the buffer size and the required bandwidth. Finally, experimental results are provided to show the superior performance of the proposed algorithm.

Learning algorithms are often equipped with kernels that enable them to deal with non-linearities in the data, which ensures increased performance in practice. However, traditional kernel based methods suffer from the problem of scalability. As a workaround, explicit kernel maps have been proposed in the past. Previously for the task of streaming Kernel Principal Component Analysis (KPCA), an explicit kernel map has been combined with a matrix sketching technique to obtain scalable dimensionality reduction (DR) algorithm. This algorithm is limited by two issues, both pertaining to the explicit kernel map and the matrix sketching algorithms respectively. As a solution, two new scalable DR algorithms called ECM-SKPCA and Euler-SKPCA are proposed. The efficacy of the proposed algorithms as scalable DR algorithms is demonstrated via the task of classification with many publicly available datasets. The results indicate that the proposed algorithms produce more effective features than the previous algorithm for the classification task. Furthermore, ECM-SKPCA is also demonstrated to be much faster than all other algorithms.

Software prefetching, typically in the context of numeric- or loop-intensive benchmarks, has been proposed as one remedy for the performance bottleneck imposed on computer systems by the cost of servicing cache misses. This paper proposes a new heuristic-SPAID-for utilizing prefetch instructions in pointer- and call-intensive environments. We use trace-driven cache simulation of a number of pointer- and call-intensive benchmarks to evaluate the benefits and implementation trade-offs of SPAID. Our results indicate that a significant proportion of the cost of data cache misses can be eliminated or reduced with SPAID without unduly increasing memory traffic.

H.264 video codec provides a wide range of compression options and is popularly implemented over various video recording standards. The compression complexity increases when low-bit-rate video is required. Hence, the encoding time is often a major issue when processing a large number of video files. One of the methods to decrease the encoding time is to employ a parallel algorithm on a multicore system. In order to exploit the capability of a multicore processor, a scalable algorithm is proposed in this paper. Most of the parallelization methods proposed earlier suffer from the drawbacks of limited scalability, memory, and data dependency issues. In this paper, we present the results obtained using data-level parallelism at the macroblock (MB) level for encoder. The key idea of using MB-level parallelism is due to its less memory requirement. This design allows the encoder to schedule the sequences into the available logical cores for parallel processing. A load balancing mechanism is added to allow the encoding with respect to macroblock index and, hence, eliminating the need of a coordinator thread. In our implementation, a dynamic macroblock scheduling technique is used to improve the speedup. Also, we modify some of the pointers with advanced data structures to optimize the memory. The results show that with the proposed MB-level parallelism, higher speedup values can be achieved.