Bridging the Gap Between Design and Implementation of Discrete-Event Controllers

As automated manufacturing systems become more complex, the need for an effective design tool to produce both high-level discrete event control systems (DECS) and low-level implementations becomes more important. Petri nets represent the most effective method for both the design and implementation of DECSs. In this paper, automation Petri nets (APN) are introduced to provide a new method for the design and implementation of DECSs. The APN is particularly well suited to multiproduct systems and provides a more effective solution than Grafcet in this context. Since ordinary Petri nets do not deal with sensors and actuators of DECSs, the Petri net concepts are extended, by including actions and sensor readings as formal structures within the APN. Moreover, enabling and inhibitor arcs, which can enable or disable transitions through the use of leading-edge, falling-edge and level of markings, are also introduced. In this paper, the methodology is explained by considering a fundamental APN structure. The conversion of APNs into the IEC1131-3 ladder diagrams (LD) for implementation on a PLC is also explained by using the token passing logic (TPL) concept. Finally, an illustrative example of how APNs can be applied to a discrete manufacturing problem is described in detail.

Identification of labeled Petri nets from finite automata

Reconfigurable manufacturing systems supported by Industrial Internet-of-Things (IIoT) are modular and easily integrable, promoting efficient system/component reconfigurations with minimal downtime. Industrial systems are commonly based on sequential controllers described with Control Interpreted Petri Nets (CIPNs). Existing design methodologies to distribute centralized automation/control tasks focus on maintaining functional properties of the system during the process, while disregarding failures that may occur during execution (e.g., communication packet drops, sensing or actuation failures). Consequently, in this work, we provide a missing link for reliable IIoT-based distributed automation. We introduce a method to transform distributed control models based on CIPNs into Stochastic Reward Nets that enable integration of realistic fault models (e.g., probabilistic link models). We show how to specify desired system properties to enable verification under the adopted communication/fault models, both at design- and run-time; we also show feasibility of runtime verification on the edge, with a continuously updated system model. Our approach is used on real industrial systems, resulting in modifications of local controllers to guarantee reliable system operation in realistic IIoT environments.

Modern manufacturing systems have challenged the use of LDs for PLCs to design their discrete-event controllers. Researchers are constantly pursuing integrated tools that eliminate the limitations of LDs. These tools are aimed not only for control but also for system analysis, evaluation, and simulation. For the past decades, Petri nets (PNs) have emerged as an important tool to provide an integrated solution for modeling, analysis, simulation, and control of industrial automated systems Different types of PN-based controllers in academia are intended for application in industry. There is a need for more benchmark studies of PN and LD methods in order to form a structured and integrated framework for logic control software development. The paper surveys work on these methods with focus on the conversion methods between PNs and LDs.

In this paper, a new method is proposed for digital hardware implementation of Petri net-based specifications. The purpose of this paper is to introduce a new discrete event control system paradigm, where the control system is modeled with extended Petri nets and implemented as an asynchronous controller using circuit elements. The applicability of the proposed method is demonstrated by an asynchronous implementation of a Petri net-based discrete event control system (DECS) for an experimental manufacturing system using a Xilinx field programmable gate array (FPGA). Unlike microprocessor, microcontroller or programmable logic controller (PLC)-based software implementations or hardware-based synchronous implementations, the implementation method used in this paper is asynchronous and based on hardware offering very high speed to control fast plants at low cost. This paper is expected to serve as a guideline to show how to obtain very high speed, concurrent and asynchronous Petri net-based controllers.

We investigate the decidability of termination, reachability, coverability and deadlock-freeness of Petri nets endowed with a hierarchy of places, and with inhibitor arcs, reset arcs and transfer arcs that respect this hierarchy. We also investigate what happens when we have a mix of these special arcs, some of which respect the hierarchy, while others do not. We settle the decidability status of the above four problems for all combinations of hierarchy, inhibitor, reset and transfer arcs, except the termination problem for two combinations. For both these combinations, we show that deciding termination is as hard as deciding the positivity problem on linear recurrence sequences -- a long-standing open problem.

1.1 Relationship between Petri net and linear logic Petri nets were first introduced by Petri in his seminal Ph.D. thesis, and both the theory and the applications of his model have flourished in concurrency theory (Reisig & Rozenberg, 1998a; Reisig & Rozenberg, 1998b). The relationships between Petri nets and linear logics have been studied by many researchers (Engberg & Winskel, 1997; Farwer, 1999; Hirai, 2000; Hirai 1999; Ishihara & Hiraish, 2001; Kamide, 2004, Kamide, 2006; Kanovich, 1995; Kanovich 1994; LarcheyWendling & Galmiche, 1998; Larchey-Wendling & Galmiche, 2000; Lilius, 1992; Mart -Oliet & Meseguer, 1991; Okada, 1998; Tanabe, 1997). A category theoretical investigation of such a relationship was given by Mart -Oliet and Meseguer (Mart -Oliet & Meseguer, 1991), purely syntactical approach using Horn linear logic was established by Kanovich (Kanovich, 1995; Kanovich 1994), a naive phase linear logic for a certain class of Petri nets was given by Okada (Okada, 1998), a linear logical view of object Petri nets were studied by Farwer (Farwer, 1999), and various Petri net interpretations of linear logic using quantale models were obtained by Ishihara and Hiraishi (Ishihara & Hiraish, 2001), Engberg and Winskel (Engberg & Winskel, 1997), Larchey-Wendling and Galmiche (Larchey-Wendling & Galmiche, 1998; Larchey-Wendling & Galmiche, 2000), and Lilius (Lilius, 1992). Petri net interpretations using Kripke semantics for various fragments and extensions of intuitionistic linear logic were studied by Kamide (Kamide, 2004; Kamide, 2006c). In (Kamide, 2004), Petri net interpretations of various fragments of a spatio-temporal soft linear logic were discussed. In (Kamide, 2006c), Petri nets with inhibitor arcs, which were first introduced by Kosaraju (Kosaraju, 1973) to show the limitation of the usual Petri nets, were described using Kripke semantics for intuitionistic linear logic with strong negation. The approarches using Kripke semantics can obtain a very simple correspondence between Petri net and linear logic.

Given a labeled Petri net with silent (unobservable) transitions, we are interested in performing initial marking estimation in a probabilistic setting. We assume a known finite set of initial markings, each with some a priori probability, and our goal is to obtain the conditional probabilities of initial markings of the Petri net, conditioned on an observed sequence of labels. Under a Markovian assumption on the probabilistic model, we develop a recursive algorithm that allows us to efficiently determine the conditional probabilities for each possible initial marking (conditioned on the sequence of observations seen so far). We illustrate the proposed methodology via an example and discuss potential applications in the context of initial state opacity for security applications.

The interleaved expansion presented in [QLP93] is a method to compute and represent the global events of a system preserving parallelism. As a side effect, this method provides important advantages in the technology of translation from LOTOS to Petri nets over static (direct) transformations and opens a simple process algebra form of representation for an important class of Petri nets. This work presents an algorithm that maps ITcalulus elements into labeled Petri nets and gives a comprehensive overview of different aspects of the translation from LOTOS to Petri nets using this intermediate form of representation.

In this paper we present a survey on methods for the synthesis of Petri nets from behavioral descriptions given as languages. We consider place/transition Petri nets, elementary Petri nets and Petri nets with inhibitor arcs. For each net class we consider classical languages, step languages and partial languages as behavioral description. All methods are based on the notion of regions of languages. We identify two different types of regions and two different principles of computing from the set of regions of a language a finite Petri net generating this language. For finite or regular languages almost each combination of Petri net class, language type, region type and computation principle can be considered to compute such a net. Altogether, we present a framework for region-based synthesis of Petri nets from languages which integrates almost all known approaches and fills several remaining gaps in literature.

This article addresses expressiveness problems for Petri nets and their useful extension for modeling and control of a system that can be modeled with Petri nets. We construct some Petri net modules, namely, an enabling module, an inhibitor module and a Modulo-N counter, which are useful for system operations. We also present the simplifications for the enabling and inhibitor modules. Then, we propose two new types of arcs, namely, enabling and inhibitor arcs, with a weighted function set. The arcs with the weighted function set from places to transitions are the marked arcs. A function set is employed to denote the weight of an arc according to the system requirements. They are very useful to solve the resource reallocation problem in a resource allocation system, where resource sharing contributes to the occurrences of deadlocks. Finally, two examples are used to show the advantages of the presented new types of arcs.

This paper presents a software tool to deal with the diagnosis of discrete-event system modeled by labeled Petri nets (LPNs). This tool, called PEtri-Net-based Diagnosability Analyzer (PENDA), is an updated version of the prototype that implements our techniques for (K-)diagnosability analysis of discrete-event models. In order to cope with the state explosion problem that arises when establishing a diagnoser, PENDA implements an incremental and on-the-fly algorithm to analyze (K-)diagnosability while partially building the state space of the LPN. In addition, several improvements have been carried out in the source code to improve the time/memory efficiency of the analysis. The current version shows better performance and allows for handling LPN models encoded in the standard PNML format.

Petri nets have been extensively applied for specification, design, verification, performance evaluation, and simulation of discrete event control systems (DECS). The usual way to verify the dynamic behaviour of DECS design is to employ a process-based model, which proves to be impractical in application because the process-based model does not usually fully correspond to the control programming behaviour. This paper proposes a sensor-based stage Petri net (SBSPN) to represent a programmable logic controller (PLC) stage logic diagram (LD) for discrete-event control design. The new technique is able to simplify the modelling process of the complex PLC program without considering the interlocking problem within the ladder diagram. An illustrated example is used to explore the new methodology. The proposed method contains the power and flexibility of the Petri net analysis prior to the PLC implementation. It is believed that this technique is significant for industry practice.

The optimal controller synthesis problem for discrete event control of a flexible manufacturing system (FMS) is presented in this paper. To explicitly formulate concurrent activities, multiple resources sharing, precedence constraints and dynamic routing in FMS operation, we adopt timed (place) Petri nets for problem representation. The A* based heuristic search algorithm is proposed to search for an optimal event sequence to achieve minimum-time and deadlock-free discrete event control. Based on the obtained event-driven sequence, we use two levels of specification to design the optimal sequence controller. The coordination control level consists of synchronization and parallelism of different sub-systems and is specified by decision-free Petri nets (marked graphs). The local control level consists of running elementary sequences for subsystems and is specified by sequential function charts.

With this contribution, we aim to draw a comprehensive classification of Petri nets with stopwatches w.r.t. expressiveness and decidability issues. This topic is too ambitious to be summarized in a single paper. That is why we present our results in two different parts. The scope of this first paper is to address the general results that apply for both dense-time and discrete-time semantics. We study the class of bounded Petri nets with stopwatches and reset arcs (rSwPNs), which is an extension of T-time Petri nets (TPNs) where time is associated with transitions. Stopwatches can be reset, stopped and started. We give the formal dense-time and discrete-time semantics of these models in terms of Transition Systems. We study the expressiveness of rSwPNs and its subclasses w.r.t. (weak) bisimilarity (behavioral semantics). The main results are following: 1) bounded rSw- PNs and 1-safe rSwPNs are equally expressive; 2) For all models, reset arcs add expressiveness. 3) The resulting partial classification of models is given by a set of relations explained in Fig. 7: in the forthcoming paper, we will complete these results by covering expressiveness and decidability issues when discrete-time nets are considered. For the sake of simplicity, our results are explained on a model such that the stopwatches behaviors are expressed using inhibitor arcs. Our conclusions can however be easily extended to the general class of Stopwatch Petri nets.