Built-in self-reconfiguring systems for mesh-connected processor arrays with spares on two rows/columns

The paper discusses the advantages and shortcomings of alternate double single track (ADST) lines with respect to double track lines for high speed lines. ADST lines consists of sequences of double and single track segments optimally selected in order to reduce the construction and maintenance costs of railway lines and to optimize the timetables used to satisfy a given demand. The single tracks are selected to coincide with expensive segments (tunnels and viaducts) and the double tracks are chosen to coincide with flat areas and only where they are necessary. At the same time, departure times are adjusted for trains to cross at the cheap double track segments. This alternative can be used for new lines and also for existing conventional lines where some new tracks are to be constructed to reduce travel time (increase speed). The ADST proposal is illustrated with some examples of both types (new lines and where conventional lines exist), including the Palencia-Santander, the Santiago-Valparaíso-Viña del Mar and the Dublin-Belfast lines, where very important reductions (90 %) are obtained, especially where a railway infrastructure already exist.DOI: http://dx.doi.org/10.4995/CIT2016.2016.3426

In this paper we investigate the parallel complexity of backtrack and branch-and-bound search on the mesh-connected array. We present an Ω(√dN/√logdN) lower bound for the time needed by arandomized algorithm to perform backtrack and branch-and-bound search of a tree of depthd on the √N × √N mesh, even when the depth of the tree is known in advance. The lower bound also holds for algorithms that are allowed to move tree-nodes and create multiple copies of the same tree-node.

The problems of sorting and routing on n 1×... × n r mesh-connected arrays of processors are studied. A new sorting algorithm for r-dimensional meshes, r≥3, is presented. On meshes without wrap-around-connections it only needs 2(n 1+...+n r−1)+n r steps which is asymptotically optimal. For meshes with wrap-arounds the number of steps is asymptotically n 1+n 2+...+n r which is very close to the lower bound of (n 1+...+n r−1)+n r /2. Furthermore, for two-dimensional meshes a new deterministic routing algorithm is given for n×n meshes where each processor has a buffer of size f(n)<n. It needs 2n+O(n/f(n)) steps on meshes without wrap-arounds. Hence it is asymptotically optimal and as good as randomized algorithms routing data only with high probability.

During the laser cladding process, thermal stresses are induced because of the high-energy input, high temperature gradient, fast cooling rate, and inconsistency of the clad-substrate material. The induced thermal stresses not only increase the crack tendency, but also influence the mechanical performance of the deposited layer. In this study, a three dimensional (3D) uncoupled thermo-mechanical finite element (FE) model was established to simulate the stress evolution of laser cladding of cobalt-based coatings on mild steel A36. The temperature field was simulated first and then used as transient thermal loading to simulate the stress evolution. Stress distributions for three cases: single track on a flat substrate, double-track on a flat substrate, and double-track on a cylindrical substrate, were investigated in detail. To check the accuracy of the simulation results, validation experiments were carried out using an 8-kW high-power direct diode laser. The thermocouples were used to monitor the temperature cycles at several marked points. The cross-sections of single and double tracks on a flat substrate obtained experimentally were compared with the simulation results. The residual stress on the clad was experimentally determined by an X-ray diffraction machine. The experimentally obtained data showed a significant consistency with the prediction results.

We propose a new restructuring method for mesh-connected processor arrays (PAs) using single track shift with spare processing elements (PEs) on the orthogonal two or four sides. First, a method called “ROT method” for mesh-connected PAs with spare PEs on the orthogonal sides is described. Next, the method is applied to mesh-conected PAs with spare PEs on the four sides. The effect of the method is evaluated by computer simulation and it is shown that ROT method makes array reliabilites fairly higher than those of the existing methods for mesh-connected PAs with the same number of spare PEs and the same network structure. The hardware realization of ROT method is also discussed and it is seen that the method can be realized as a simple built-in circuit. The circuit can be embedded in a target PA to reconstruct the PA with faulty PEs very quickly. This implies that the proposed method is especially effective in enhancing the run-time reliability of a PA in mission critical systems where first self-reconfiguration is required without an external host computer or manual maintenance operations.KeywordsFault-toleranceMesh arraySingle track shiftSelf-restructuringBuilt-in circuit

A parallel reconfiguration algorithm for WSI/VLSI processor arrays

Efficient implementation of global computations on a linear array of processors is complicated due to the small communication bandwidth and the large communication diameter of the array. This paper presents efficient parallel techniques for partitioning, movement, and reduction of data on linear arrays. Also, efficient data structures are used to enable fast sequential access of query points within each processor. This combination of serial and parallel techniques is used to derive an optimal parallel algorithm for computing the convex hull of each connected region in an n×n image. The algorithm takes O(n 2/p) time on a linear array with p processors, where 1≤p≤n/log n. This result is processor-time optimal since an optimal sequential algorithm takes O(n 2) to solve the problem. Thus, a linear array with n/log n processors can solve the above problem in O(n log n) time. In comparison, a two dimensional mesh-connected array of processors can solve this problem in O(n) time using n 2 processors. The processor-time product for the mesh is O(n 3), which is not optimal.KeywordsConvex HullExtreme PointLinear ArrayLocal MemoryQuery PointThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

The local shadow can easily make the photovoltaic (PV)array appear hot spot phenomenon, reduce the output power and affects the security and the reliability of the PV power generation system; At the same time, the P-V characteristic of PV array is changed from single peak curve to multi peak curve, which makes the MTTP controller unable to achieve maximum power tracking. In order to solve the problem that the output power is affected by the partial shading, in this paper, a global optimization method for PV array reconfiguration is adopted. By changing the connection mode of the PV array, shadow localized PV array by optimization algorithm can achieve optimal distribution of shadows, maximally achieve the output power of PV array smoothly under the condition of shadow, improve the output power of the whole PV array to some extent. It also eliminate the local peak value, improve the multi peak phenomenon and verify the effectiveness of the optimization strategy by PSCAD/EMTDC simulation.

The direct laser writing (DLW) using femtosecond lasers allows for the inscription of 3D microstructures embedded inside optical materials. Based solely on the silver ions photochemistry, the DLW in silver‐containing glasses enables to locally induce inside glasses a unique combination of optical properties. The physical modifications of the material encompass not only a refractive index change, but also new physical properties like fluorescence, second‐ and third‐harmonic generations, and surface plasmon resonance. Numerous efforts are deployed to develop the DLW‐assisted silver photochemistry in phosphate glasses. However, this glass family is suffering from its near‐infrared optical cutoff as opposed to the silver‐doped gallo‐germanate glasses. With an extended mid‐infrared (mid‐IR) transmission, these glasses are synthesized via the melt‐quenching technique. Depending on the glass composition, either a glass matrix‐based single track (Type I) or a silver cluster‐based double track (Type A) of refractive index change is produced. By enabling an order of magnitude smaller structures than with Type I, Type A modification is further expanded to embed, for the first time, periodic structures below the inter‐track spacing. Demonstrated with a pitch down to 400 nm, these Type A–based periodic structures bring new insights through the fabrication of 3D diffractive gratings in mid‐IR glasses.

Simply supported pre-stressed concrete box-girder bridges are the most common bridge type found on high-speed railway and urban rail transit lines in China. A field experiment has been conducted on the Pixian Viaduct of the Chengdu–Dujiangyan Intercity Railway, where two kinds of simply supported pre-stressed concrete box-girder bridges with a standard span of 32 m are used, one single track and the other double track. Characteristics of the noise underneath the box-girder, far from the bridge, and near the bridge gap were measured and analyzed in the time and frequency domains during high-speed train passage, as was the vibration of the box-girder’s bottom plate. The variations of noise with distance and train speed at locations 1.5 and 9 m above ground level were measured and fitted using mathematical formulae. A simplified formula to predict near-field bridge-borne noise was proposed and verified. The peak bridge-borne noise frequency and its tonal characteristic at 50 and 63 Hz for the double-track and single-track box-girders, respectively, were interpreted in terms of bridge vibration and sound radiation efficiency, respectively. The vibration/noise transfer function and coherence were evaluated, showing that vibration resonance is more significant than acoustic coincidence and that the former is more important in terms of noise reduction.

We present a novel architecture for an optical network, translucent smart pixel array (TRANSPAR), having smart pixel devices which effectively function in an optically translucent manner. The network protocol is similar to carrier-sense multiple-access/collision-detection (CSMA/CD) commonly used in Ethernet, but adapted to a ring configuration using optical parallel packets in free space. The TRANSPAR devices also function as a fine-grain mesh-connected parallel pipeline array for image and video signal processing. We designed, fabricated, and are currently testing the TRANSPAR smart pixel devices and network node hardware. This paper presents the network architecture, tradeoffs, and design decisions, the testing results to date, and ends with considerations on practicality and future scalability.

Effective fault tolerance techniques are essential for improving the reliability of multiprocessor systems. At the same time, fault tolerance must be achieved at high speed to meet the real-time constraints of embedded systems. While parallelism has often been exploited to increase performance, to the best of our knowledge, there has been no previously reported work on parallel reconfiguration of mesh-connected processor arrays with faults. This paper presents two parallel algorithms to accelerate reconfiguration of the processor arrays. The first algorithm reconfigures a host array in parallel in a multithreading manner. The threads in the parallel algorithm execute independently within a safe rerouting distance. The second algorithm is based on a divide-and-conquer approach to first generate the leftmost segments in parallel and then merge the segments in parallel. When compared to the conventional algorithm, simulation results from a large number of instances confirm that the proposed algorithms significantly accelerate the reconfiguration without loss of harvest.

The actual cooling load of underground stations in recent years has been much lower than the designed load thirty years ago. Therefore, it is important to estimate the actual load in the planning of cooling systems. In this study, the cooling load caused by train wind in an underground station was discussed and a field measurement and computational fluid dynamics (CFD) simulation were conducted. The main conclusions are as follows: (1) The measurement showed that air volume of the train wind was greatly affected by the train speed and the tunnel structure (single or double track). (2) In the CFD simulation, the train was modeled as a moving body to simulate train wind. The CFD simulation with a pressure loss model in the tunnel could reproduce the measurement. (3) The influence of train wind on the platform cooling system was examined by the CFD simulation in terms of an influence coefficient. In the Shin-Nihombashi station, the influence coefficient was approximately 0.38 in the area connecting to the tunnel while the coefficient was about 0.24 in the center area.

Railroads have long been serving the largest portion of freight ton-miles in the U.S. freight shipment market. The rising demand for rail transportation is expected to continue in the foreseeable future, and considerable network congestion and inefficiency will result. Thus, a systematic methodology is needed to predict freight flow concentrations and congestion patterns in the rail network. A customized network assignment model for rail freight shipment demand is proposed; in this model, single-and double-track lines are represented by an equivalent directed graph. A railroad-specific link cost function adjusted for single and double tracks is developed to capture traffic delay, and an adapted convex combination algorithm is developed to find the shipment routing equilibrium. This model is applied to an empirical case study for the U.S. rail network with national freight shipment demand in 2007. The resulting freight flow pattern is visualized graphically and validated with empirical data. The proposed modeling framework could be used to help public agencies and private companies predict rail network traffic and develop infrastructure investment strategies to reduce adverse social impacts imposed by rail traffic delay.

An O(n) algorithm to sort n2elements on an Illiac IV-like n × n mesh-connected processor array is presented. This algorithm sorts the n2elements into row-major order and is an adaptation of Batcher's bitonic sort. A slight modification of our algorithm yields an O(n) algorithm to sort n2elements into snake-like row-major order. Extensions to the case of a j-dimensional processor array are discussed.