Cognitive Noncoherent Jamming Techniques for Frequency Selective Attacks

The ultimate objective of Software Defined Radio (SDR) is to replace the entire analog signal processing in the wireless transceivers with digital signal processing. This will provide the flexibility, through reconfiguration or reprogramming, to enable the transceivers to work with different air-interfaces standards using a single generic hardware platform. Most of the research in SDR to date has been focused on base stations, which do not have as tight constraints in size and power consumption as handsets. However, in order to realize the promise of integrated services and global roaming capabilities, the design and development of a multi-standard SDR handset with dynamic reconfigurability is crucial. The size and power constraints imposed by handsets with limited resources pose a major design challenge. This special issue brings together 11 papers that address various aspects of this challenge from the perspectives of wireless systems, computing architectures, embedded systems and signal processing. The most important part of an SDR transceiver is the wideband analog-to-digital converter (ADC) that converts the radio frequency signal received by the antenna into digital form for further processing. The first paper, “A multi-mode sigma-delta ADC for GSM/WCDMA/WLAN applications” by Jose et. al. proposed a cascaded reconfigurable sigma-delta modulator that is able to work with three different communication standards. This design, implemented in 0.18 μm CMOS technology, exhibits excellent signal-to-noise plus distortion ratios and has reduced power consumption compared to conventional designs. After ADC, the digitized received signal will need to be separated into signals within the various bands specified by the communication standard. This is performed by the channelizer which has the highest computational requirements of the whole SDR system. The second paper, by Panicker et al., reviews the state-of-the-art filter bank channelizer techniques with low power and dynamic reconfigurability properties. The design of reconfigurable devices can be optimized using the methodology of parametrization which bring together the common aspects of a myriad number of wireless standards into a single processing procedure. In this way, the implementation of the multi-standard SDR will be greatly simplified. “Promising technique of parametrisation for reconfigurable radio, the Common Operators Technique: fundamentals and examples” by Alaus et al. presents the common operator technique for parametrization which is less standards dependent than the more conventional Common Function technique. The direct digitization of the radio frequency (RF) signal requires very high speed ADCs which is not readily available using current technology. Therefore, current SDR implementations typically down-converts the RF A. P. Vinod (*) School of Computer Engineering, Nanyang Technological University, Nanyang, Singapore e-mail: asvinod@ntu.edu.sg

Since the initiation of the Joint Tactical Radio System (JTRS) program, the concept of software defined radio (SDR) has received considerable attention and significant progress has been made. While the raison d'etre of SDR is somewhat different for military and commercial applications, they share similar challenges in implementing a true SDR. A true SDR faces numerous hardware and software challenges, many of them still to be addressed by research. In the literature concerning SDR software architecture and requirements, the technology requirements tend to be sidelined. This is mainly because, in the JTRS program, the focus is on voice and low data rate applications; also, the frequency band is limited to UHF. On the other hand, the implementation cost is less of a concern for now. However, by the emergence of advance warfare technology where it is required to transport more bits per warrior to accommodate video and telemetry data, and also by introducing initiatives similar to the JTRS to other communication systems, the technology requirements of SDR have to be revisited. The paper focuses on the hardware technology aspect of SDR. The main technical objective of SDR is a versatile reconfigurable platform, which provides interoperability. The main blocks of a true SDR are: intelligent antenna; programmable RF modules; high-performance digital-to-analog (DAC) and analog-to-digital converters (ADC); digital signal processing (DSP) techniques/technology; interconnection technology.

A software-defined radio (SDR) for ultrawideband (UWB) communication systems places several stringent requirements on the analog-to-digital converter (ADC). One alternative to using a single ADC is to sample the received signal with an array of lower speed ADCs that were driven by interleaved sampling clocks; however, mismatches among the ADCs will result in signal distortion. This paper makes three important contributions to overcoming this problem: 1) analytical quantification of the impact of ADC gain, offset, and timing mismatches on the performance of a time-interleaved sampling ADC array for UWB signals; 2) demonstration of the efficacy of using a pilot-based matched-filter architecture to mitigate the impact of timing mismatches in the presence of multipath; and 3) implementation of an 8-ADC time-interleaved UWB SDR testbed that operates at an effective sampling frequency of 6.4 GHz. In addition, our findings allow for the design specification of the number of pilots required to obtain a desired system performance. The simulation and measured performance results from this paper demonstrate that ADC mismatches can be controlled to within plusmn10%, yielding acceptable levels of distortion and bit-error-rate (BER) performance on the UWB SDR testbed. Both analytical and simulation results also demonstrate the efficacy of a pilot-based matched filter in mitigating the impact of timing mismatch errors, even in the presence of multipath.

Enhancing security requires sensing devices surveilling over critical infrastructures for early warning of radio frequency (RF) emitter geolocations. Conventional geolocation of RF emitters has adopted active methodologies by illuminating targets, such as radar sensors. However, active geolocation draws unwanted attention of adversary, thus highly increases threats and vulnerabilities of the sensing devices. As security issues become a central concern in sensing applications, we propose a small unmanned‐aerial‐system for passive geolocation of RF emitters. Multiple electronic surveillance sensors are mounted on small unmanned‐aerial‐vehicles (UAVs) to provide geolocation awareness. Both sensors‐to‐UAV and UAVs‐to‐fusion‐center communications are investigated. Different with previous studies, our approach is based on an empirical path loss and log‐normal shadowing model, from a wireless communication and signal processing vision. The communication degradation from UAV to fusion center has been taken into consideration other than assuming lossless performance. The analyzed geolocation error and the error probability of distance shows that this approach provides robust performance at high frequencies, thus offers an effective solution for the security issue in RF emitter geolocation. Copyright © 2012 John Wiley & Sons, Ltd.

New wireless communications standards do not replace old ones, instead the number of standards keeps on increasing and by now an abundance of standards exists. Moreover there is no reason to assume that this trend will ever stop. Therefore, the software-radio concept is emerging as a potential pragmatic solution: a software implementation of the user terminal able to dynamically adapt to the radio environment in which the terminal is located. For manufacturers this could result in shorter development time, cheaper production due to higher volumes. Furthermore software radio has advantages for consumers because it enables only software updates for new functionality without new hardware. Because of the analog nature of the air interface, a software radio will always have an analog front-end. In an ideal software radio, the analog-to-digital converter (ADC) and the digital-to-analog converter (DAC) are positioned directly after the antenna. Such an implementation is not feasible due to the power that such a device would consume and other physical limitations. It is therefore a challenge to design a system that preserves most properties of the ideal software radio while being realizable with current-day technology. Such a system is called a software-defined radio (SDR). A flexible, all-standard radio will consume more energy than a dedicated radio for a single standard. The first flexible radio could be an application where power consumption is less an issue; an example being a flexible radio in a notebook. This thesis presents such a radio with the focus on wireless LAN standards. These standards use phase modulation or OFDM in the $2.4$ GHz or $5$ GHz frequency band, so we decided in our project to combine a receiver of a phase modulation standard (Bluetooth) with an OFDM receiver (HiperLAN/2) first. In our view SDR is an implementation technology: the HiperLAN/2 hardware is that complex to the Bluetooth hardware that the Bluetooth receiver may be added to the HiperLAN/2 one at limited costs. In this thesis we describe how the physical layer of the OSI model of a phase-modulation receiver can be combined with an OFDM receiver at a functional level. The second goal of this research is to investigate whether this combined receiver can be implemented in software running on a General Purpose Processor (GPP) and estimate the costs of such an implementation with respect to power consumption and computational power requirements. For this reason, a testbed has been developed where all baseband physical layer functions have been successfully mapped on a Pentium 4 processor. This has been tested in combination with a CMOS-integrated wideband analog SDR front-end, containing a low noise amplifier, down-conversion mixers and filters. The testbed can be extended to other standards, because the only limitations in our testbed are the maximal channel bandwidth of $20$ MHz, the dynamic range of the wideband SDR analog front-end and the processing capabilities of the used PC. In 1999, Bose showed for second-generation mobile standards that it is possible to perform most baseband functions of the physical layer on a GPP processor. In his research, I/O was one of the main bottlenecks. In thesis we have identified that this is no longer true for current-day computers. Nowadays, an important bottleneck is the latency of the operating system, because wireless standards require fast response times. Major contributions of this thesis to the field of SDR research are extending the work of Bose for wireless LAN standards and developing a functional SDR receiver architecture that is capable of receiving standards that use OFDM or phase modulation.

A tactical network mainly consists of software-defined radios (SDRs) integrated with programmable and reconfigurable features that provide the addition and customization of different waveforms for different scenarios, e.g., situational awareness, video, or voice transmission. The network, which is mission-critical, congested, and delay-sensitive, operates in infrastructure-less terrains with self-forming and self-healing capabilities. It demands reliability and the need to survive by seamlessly maintaining continuous network connectivity during mobility and link failures. SDR platforms transfer large amounts of data that must be processed with low latency transmissions. The state-of-the-art solutions lack the capability to provide high data throughput and incorporate overhead in route discovery and resource distribution that is not appropriate for resource-constrained mission-critical networks. A cross-layer design exploits existing resources to react to environment changes efficiently, enable reliability, and escalate network throughput. A solution that integrates SDR benefits and cross-layer optimization can perform all the mentioned operations efficiently. In tactical networks, SDR’s maximum usable bandwidth can be utilized by exploiting radios’ autonomous behavior. This paper presents a novel virtual sub-nets based cross-layer medium access control (VSCL-MAC) protocol for self-forming multihop tactical radio networks. It is a MAC-centric design with cross-layer optimization that enables dynamic routing and autonomous time-slot scheduling in a multichannel network environment among SDRs. The cross-layer coupling uses link-layer information from the hybrid of time division multiple access and frequency division multiple access (TDMA/FDMA) MAC to proactively enable distributed intelligent routing at the network layer. The virtual sub-nets based distributed algorithm exploits spectrum resources and provides call setup with persistently available k-hop route information and simultaneous collision-free transmission of voice and data. The experimental results over extensive simulations show significant performance improvements in terms of minimum control overhead, processing time in relay nodes, a substantial increase in network throughput, and lower data latency (up to 76.98%) compared to conventional time-slotted MAC protocols. The design is useful for mission-critical, time-sensitive networks and exploits multihop simultaneous communication in a distributed manner.

Radar jamming waveform design is a vital part of radar jamming. Over seven to eight decades of evolution, the field has transitioned from noise signal design to coherent jamming signal design, resulting in a multitude of complex jamming styles capable of achieving deceptive jamming, suppressive jamming, and smart noise jamming, which combines both deception and suppression. For the first time, this article establishes a general formula for unifying jamming waveform design. Building upon this foundation, we systematically categorize jamming techniques, and provide an in-depth summary of the corresponding principles and conduct comparative analysis of their effectiveness against different targets. Finally, we look forward in terms of future research directions in jamming waveform design, including quantifiable jamming effect evaluation indicators, combined jamming styles, and intelligent jamming waveform generation methods to address the continuous advancement of radar technology and the complexity and variability of the electromagnetic environment. In order to fill the gap in the literature by summarizing the current state of the field and highlighting key challenges and opportunities, this review provides a comprehensive overview of radar jamming waveform design, categorizes and compares different jamming techniques, and identifies future research directions.

Short Range Devices (SRD) are increasingly employed in urban sensor networks using different communication protocols. That becomes a key problem in the gateway design, since its cost and energy consumption increase with the number of implemented technologies. This cost and energy can be reduced by using a reconfigurable gateway to perform the biggest part of signal processing digitally, as it is done in Software-Defined Radio (SDR). As several received signals should be simultaneously digitized, Analog-to-Digital Converter (ADC) must be able to treat the whole frequency band used by SRD, with a high enough resolution to properly demodulate the signals. This paper describes what the ADC's constraints are and how to dimension an ADC in SDR for SRD. An example based on the SmartSantander deployment shows that an ADC resolution of 21 bits is required to properly demodulate the data.

In software defined radio (SDR), implementation of RF front-end and analog-to-digital converter (ADC) is an important issue. One type of new schemes proposed for SDR is discrete time receiver (DTR), which processes analog signal directly. In the DTR architecture, the received signal is sampled at radio frequency (RF) and channel selection and demodulation are carried out in the digital domain. This architecture achieves reduction of on-chip components and enables one-chip receiver. However, in this architecture, the sampling jitter generated from phase noise of phase locked loop (PLL) may deteriorate the performance. In this paper, the phase noise of the PLL is modeled and the influence of the phase noise to the DTR is analyzed. Moreover, the performance of the DTR is evaluated in terms of modulation schemes and signal bandwidth

The broadcast nature of wireless communications makes them vulnerable to denial-of-service attacks. Indeed, an adversary can prevent the reception of wireless messages by transmitting signals with high power over the same frequency of the considered channel. This paper presents an experimental dataset of real-world indoor communication scenarios affected by different jamming techniques. Specifically, our dataset includes data acquired from 7 different Software Defined Radios (SDRs), i.e., the USRP Ettus Research X310, operating in an office environment. Each experiment is characterized by a transmitter, a receiver, and a jammer. While the hardware of the transmitter and the receiver are kept the same for all the experiments, the hardware of the jammer is changed adopting 5 different radios of the same brand. The dataset includes different jamming behaviors, based on the type of signal injected by the jammer: no jamming (silent), tone (sinusoidal), and Gaussian noise. Moreover, besides having multiple jamming devices and modes, the dataset also includes different transmission distances and jamming powers. In each experiment, a pre-determined sequence of bits has been modulated using the BPSK scheme, transmitted wirelessly under different jamming conditions, and then stored, at the receiver, as a 2-columns matrix of I/Q samples. Researchers can use this dataset in several ways, including: (i) developing active and reactive techniques for jamming detection, (ii) jamming identification at the physical layer, and finally, (iii) developing mitigation techniques supported by real data.

Software defined radio (SDR) is a vast and emerging field that requires the design of various technologies such as antenna, RF, IF, and digital baseband subsystems. Among all these technologies, data converters that convert signals between analog and digital domains are highly crucial. On the other hand field programmable gate arrays (FPGAs) based platforms are being preferred for evaluating and implementing the digital communication concepts due to their programmability and reconfigurability. As a result they are well suited for the design of SDR technology. In this research work, we develop a platform where high-speed data converters are interfaced with high performance FPGAs. Interfaces are designed for analog-to-digital convertors (ADC) and digital-to-analog convertors (DAC) to communicate with FPGAs. For the interface design between ADC and FPGA, a double data rate and a low voltage differential signalling based serial output is adopted. And, for the interface design between DAC and other FPGA, parallel complementary metal oxide semiconductor outputs are used. To reconfigure the modes and parameters of the data convertors, serial peripheral interface data controllers have been designed. We have through simulations evaluated the performance of our designed interfaces between data convertors and FPGAs.

In this paper we address the problem of designing a back-end for Software Defined Radio (SDR) receiver using only one low-rate Analog-to-Digital Converter (ADC). After the Intermediate Frequency (IF) down-conversion stage, the signals are sampled and all the other demodulation tasks are assigned to a Digital Signal Processor (DSP). In this paper we concentrate on only one Quadrature Amplitude Modulation (QAM) signal. After reduction of the communication chain to a linear model, the issue of proper sampling rate choice is addressed. It is shown how improper sampling rate can lead to a poorly conditioned problem that causes symbol cancelations and poor performances. In the analysis the role of the device noise at the input of the ADC is also addressed by computing autocorrelation and Power Spectral Density (PSD) after undersampling. Some simulations confirm the analysis.

Abstract. An ultra-wideband (UWB) software defined radio (SDR) implementation is presented. The developed impulse radio (IR) transceiver employs first order bandpass (BP) sampling at a conversion frequency which is four times the channel bandwidth. The subsampling architecture directly provides the RF signal avoiding any non-ideal mixer stages and reduces the requirements of digital signal processing implemented in a field programmable gate array (FPGA). The transmitter consists basically of a multi-Nyquist digital to analog converter (DAC), whereas the implemented matched filter (MF) receiver prototype employs a standard digitizing oscilloscope. This design can be adaptively reconfigured in terms of modulation, data rate, and channel equalization. The reconfigurable design is used for an extensive performance analysis of the quadrature phase shift keying (QPSK) modulation scheme investigating the influence of different antennas, amplifiers, narrowband interferers as well as different equalizer lengths. Even for distances up to 7 m in a multipath environment robust communication was achieved.

Compensation of RF impairment in multi-band receiver based on RF sub-sampling

The continuous implementation of new and improved electronic counter measure/electronic counter-counter measure (ECM/ECCM) techniques has always been an information technology battle ever since their inception during WWII. The outcomes of various information exploitation experiments are vital in protecting both manned and unmanned airborne platforms. The development of jamming waveforms and ECM techniques are based upon the exploitation data and circuit analysis of various threat hardware and firmware. Unfortunately these current manual methods are very time consuming and nontrivial. Vast resources are allocated just to the setup and investigation/evaluation of a particular system's circuit design. Several very complex information technology exploitation tests must also be executed for the purpose of deriving basis waveforms from the resultant empirical data. Since the results are empirical and not optimized, additional problems may arise at a later date. Consequently, the use of genetic algorithms (GAs) executing inside special signal-processing platforms that are integrated into existing ECM/ECCM testing systems may offer an innovative computational approach/solution in the development of optimized jamming information technology waveforms and techniques. If successful, the time required for developing these techniques could possibly be reduced from years to days if not hours.