• https://doi.org/10.1007/978-1-4757-3331-0_5Copy DOI Icon

Critical Dimension Patterning Using SPL

  • Jan 1, 2001
  • Hyongsok T Soh +2 more
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Abstract

Transistor gate patterning is the primary application of a high-resolution lithographic system in the semiconductor industry. The gate itself is typically a long, narrow line of polysilicon whose width (known as the transistor gate “length”) determines the device switching speed. The uniformity of the gate is critical for device electrical performance and yield. Gate patterning is performed after significant device processing. Therefore the feature must be accurately aligned to the previously patterned regions. It must also be written over the sample topography created by the prior fabrication steps.KeywordsRapid Thermal AnnealElectron Beam LithographyGate LengthShallow Trench IsolationEffective Channel LengthThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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