Cryptanalytic Attacks on IDEA Block Cipher

At present, there are several pieces of research on designing and implementing new cryptographic algorithms that are lightweight and resistant to several, if not major forms of security attacks. However, some algorithms such as the International Data Encryption Algorithm (IDEA), which has been around for some time is yet to record any real threat against its functionality. To ensure its continued usage, current implementations rely on multiphase encryption where it is combined with other algorithms such as ROTation (ROT) and Data Encryption Standard (DES) for maximum security strength. Multiphase encryption implies that there is a tendency for an increase in hardware area and a reduction in overall speed. In such cases, having fast and reduced area algorithms are much desired. This paper, therefore, proposes an efficient hardware implementation of the IDEA cipher that is based on arithmetic modulo multiplication—one of the main computations of the IDEA—on a novel Vedic multiplier architecture. The increase in efficiency of the IDEA crypto architecture and the reduction in resources utilization is achieved through an enhancement of its structural architecture to utilize a fixed set of resources for all eight identical rounds of computation and the use of a proposed fast and lightweight Vedic hardware multiplier. The proposed hardware modification and resulting architecture are designed using the Xilinx ISE and Vivado tools. The architecture is synthesized using Precision Synthesis Tool (PS) and simulated using Modelsim SE 10.6d and ISIM simulation tools. The proposed IDEA cipher is 100% more efficient when designed based on the Vedic multiplier compared to existing designs. The hardware architecture is implemented on Spartan-6-FGG484 Field Programmable Gate Array (FPGA) using Verilog HDL. Verified results show that the proposed Vedic-based IDEA occupied 212 Slices with the Vedic multiplier only occupying 28 Slices out of the total 212. The proposed architecture operates at a maximum frequency of 253.3 MHz.

<p>Cloud computing has spread widely among different organizations due to its advantages, such as cost reduction, resource pooling, broad network access, and ease of administration. It increases the abilities of physical resources by optimizing shared use. Clients’ valuable items (data and applications) are moved outside of regulatory supervision in a shared environment where many clients are grouped together. However, this process poses security concerns, such as sensitive information theft and personally identifiable data leakage. Many researchers have contributed to reducing the problem of data security in cloud computing by developing a variety of technologies to secure cloud data, including encryption. In this study, a set of encryption algorithms (advance encryption standard (AES), data encryption standard (DES), Blowfish, Rivest-Shamir-Adleman (RSA) encryption, and international data encryption algorithm (IDEA) was compared in terms of security, data encipherment capacity, memory usage, and encipherment time to determine the optimal algorithm for securing cloud information from hackers. Results show that RSA and IDEA are less secure than AES, Blowfish, and DES). The AES algorithm encrypts a huge amount of data, takes the least encipherment time, and is faster than other algorithms, and the Blowfish algorithm requires the least amount of memory space.</p>

Cryptographic algorithms such as International Data Encryption Algorithm(IDEA) have found various applications in secure transmission of the data in networked instrumentation and distributed measurement systems. Modulo 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1 multiplier and squarer play a pivotal role in the implementation of such crypto-algorithms. In this work, an efficient hardware design of the IDEA (International Data Encryption Algorithm) using novel modulo 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1 multiplier and squarer as the basic modules is proposed for faster, smaller and low-power IDEA hardware circuits. Novel hardware implementation of the modulo 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1 multiplier is shown by using the efficient compressors and sparse tree based inverted end around carry adders is given. The novel modules are applied on IDEA algorithm and the resulting implementation is compared both qualitatively and quantitatively with the IDEA implementation using the existing multiplier/squarer implementations. Experimental measurement results show that the proposed design is faster and smaller and also consume less power than similar hardware implementations making it a viable option for efficient hardware designs.

This paper presents new design and implementation for the inverse modulo (216 +1) multiplier to be used in the International Data Encryption Algorithm (IDEA) for key scheduling. The design is done using a novel realization of the power algorithm for Euler?s theorem, which results in the fast inverse modulo multiplier. IDEA key schedule modules are easily implemented, but the only overhead is introduced by the inverse modulo multiplier. The task of the inverse modulo multiplier circuit is to generate 18 inverses modulo multiplicative keys. The new design of the inverse modulo multiplier is based on squaring the output from the modulo multiplication operation then storing this output to use it again and this is done 14 successive times. Consequently, this new design results in fast inverse modulo multiplier realization, which calculates the inverse modulo multiplicative key in only 30 clocks rather than 65535 clocks using Euler's theorem only.

Chapter 9 - Basics of Cryptography

Hackers are usually prepared to hack&nbsp; confidential documents for their vested interests.&nbsp; The most difficult task is to establish a secure link between the secret message and image quality. The proposed scheme combines cryptography and image steganography techniques to avoid illegal attacks by an unknown person. This scheme will enable image security and message security. The International Data Encryption Algorithm (IDEA) cryptographic algorithms and Discrete Cosine Transform (DCT) based steganography algorithms based functional approach.&nbsp;&nbsp; The purpose of cryptography is to encrypt and decrypt the document. Steganography is the technique of hiding documents within an image with increasing payload for the secure transmission of confidential data over the internet. In this paper, we present a single application to hide the information by the sender, which is an essential document and secret file.&nbsp; The form will be invisible to an unauthorized person. PSNR of 90.06 dB with a payload of 52,400 bytes of information in an image.

We explore the design space of field programmable gate arrays (FPGAs), processors and ASICs-hardware-software tri-design-in the framework of encryption for hand-held communication units. The IDEA (International Data Encryption Algorithm) is used to show the tradeoffs for the suggested technologies. The measures for comparing different options are: performance, programmability and power (P/sup 3/). More specifically we use the performance to power, or operations to energy ratio MOPS/Watt and Mbits/s/Watt to compare processors, FPGAs and ASICs. We compare the latest digital signal processor (DSP) from Texas Instruments to Xilinx XC4000 series FPGAs. Many DSP-like applications perform very well on FPGAs. We show the benefits and limitations of FPGA technology for IDEA.

Distributed security is an evolving sub-domain of information and network security. Security applications play a serious role when data exchanging, different volumes of data should be transferred from one site to another safely and at high speed. In this paper, the parallel International Data Encryption Algorithm (IDEA) which is one of the security applications is implemented and evaluated in terms of running time, speedup, and efficiency. The parallel IDEA has been implemented using message passing interface (MPI) library, and the results have been conducted using IMAN1 Supercomputer, where a set of simulation runs carried out on different data sizes to define the best number of processor which can be used to manipulate these data sizes and to build a visualization about the processor number that can be used while the size of data increased. The experimental results show a good performance by reducing the running time, and increasing speed up of encryption and decryption processes for parallel IDEA when the number of processors ranges from 2 to 8 with achieved efficiency 97% to 83% respectively.

The Data Encryption Standard (DES) was a prevalent symmetric key block cipher scheme. It was the most popular used cryptographic algorithm. DES's security was a highly debatable aspect until it became an insecure algorithm in 1999. In this paper, an enhancement that overcomes the security weakness of DES is introduced. The modification employs the chaotic logistic map and the art of the Elliptic Curve Cryptography. The required key generation and distribution are achieved by the enhancement to establish a communication session. Our new DES is applied on image encryption and decryption processes. Experimental results are carried out with detailed analyses, the results demonstrate that the proposed scheme has an absolutely large key space to encounter the brute-force attack and it has a good immunity to the statistical attacks. Accordingly the introduced new DES algorithm could be used as a remarkably secure algorithm.

As we know that the world is been surrounded by the internet and interconnected to it and the different things or we can say the edge devices which helps us to connect to network and communicate to the different alternatives with the surroundings. In this paper we would be discussing about the different algorithms and their and disadvantages and how the advanced standard algorithm is been applied we has an great effect on cryptography and the different process carried out in the encryption and decryption process. In this paper the encryption and the decryption would be given in 128 bit format in hexadecimal, binary or any other format and the key expansion for getting the cipher text. in cryptography their are three classification for the expansion of the key which can be symmetric, asymmetric and the hash function in this paper we have discussed and the symmetric key is been given for both encryption and decryption process.as we know that we are using the 128 bit length which has 10 rounds and the initial round includes the state and the different transformation in the cryptograpy process which is the symmetric key expansion in which the same key is been applied to both encryption and decryption in binary, hexadecimal, etc. As it is lossless operation many applications can be derived using this algorithm as we are using symmetric key block cipher. We are limiting our paper with the 128 bit length of data in verilog language. For encryption and decryption the proposed paper describes the cryptograpy which would be having the fixed size. In this algorithm where we are using the symmetric key block cipher where the key would be given same with respect to encryption. Many applications it can be used as it is lossless operation. We limit our focus on 12b8 bit AES encryption and decryption where coded in VHDL coding. The proposed paper describes the private key cryptosystems which has a key with fixed size.

With the growth in the demand for data exchange between any electronic system, the need for security of the information exchanged has become a necessity. The protection of the information related to the user from getting exposed to unauthorized person becomes a challenging issue. Hence, there is a requirement to encrypt the private user data to maintain the privacy. The paper focuses on maintaining the privacy of the sender information which is used for authentication of the image transmitted in the communication system. By embedding the information of the sender in the encrypted form, privacy for the sender information is obtained. The encryption of the sender data can be performed by using various encryption algorithms. In this work, encryption of the information of the person sending the image which is taken in the form of text file of varying size is performed using blowfish encryption algorithm which is a symmetric key block cipher. The length of the key used in blowfish for encryption and decryption ranges from 32 to 448 bits and the block size used is 64 bits. The structure of the algorithm is fiestal network. The work is implemented using MATLAB.

The world is on the path of digitization, that is, what all things that are done manually are now done with the help of computing devices. Modern era has seen the rise of computing devices, especially hand held devices. Information, in large quantity, can be digitalized and stored on these devices. Also these information must be shared to others devices, connected either via wired or wireless links, which are insecure channels. Information is a long term resource to any individual and/or organization and hence privacy of the information is of great importance. Privacy can be achieved by applying any cryptographic approaches, which transforms meaningful data into meaningless form. There are different ciphers like DES, RC's, AES and so on, which provide high confidentiality of message but these cannot be used on devices which have small amount of processing power and memory. This paper proposes a new symmetric key block cipher which can be used on large as well as small devices. The new cipher has a block cipher of 160-bit and the enciphering of plain-text takes place using 160-bit key, in 8 rounds. The confusion concept is brought into the cipher using a s-box which is dynamic in nature and the s-box contents depend on the key. For each round, the s-box contents vary thereby bringing in strong resilience against basic attacks. The cipher possesses simple xor-ing operations, which is fast, making it ideal for all kinds of applications.

RSA is an encryption algorithm which is used for remote login session, credit card payment systems, transport layer security, secure socket layer, pretty good privacy and email security. Optimal asymmetric encryption padding is used in RSA to avoid chosen-ciphertext attack, coppersmith attack and chosen-plaintext attack. However, encryption in context of high definition video files shows repetitions of parts of ciphertext which can lead to frequency analysis attack. Key length and padding which are used in attack are according to National Institute of Standards and Technology and public key cryptography standards respectively. Security issues in RSA padding are analysed and experimental results are used in removal of defects. New architecture also prevents adaptive-chosen ciphertext attack. Integers which are generated by protocol in PKCS padding are used in new design, thus it does not create overhead in performance and challenges in handling and distribution of integers. Two XOR operations are replaced by one for more speed. RSA combined with new design of padding gets security advantages of both block and stream ciphers.

Tamper-resistant software which implements a block cipher with a fixed embedded cryptographic key is important for securing embedded systems for digital rights management, access control, and other applications. The security of such software is measured by its ability to hide the embedded key against numerous known attacks. A class of methods for constructing tamper-resistant software by using a number of look-up tables is called a white-box implementation or table-network implementation. We developed a method of evaluating the security of table-network implementations of the Data Encryption Standard (DES). Link and Neumann proposed a table-network implementation of DES that is claimed to be resistant against all known attacks, which are effective for table-network implementations of DES proposed by Chow, Eisen, Johnson, and van Oorschot. In this paper, we point out the existence of a new attack, which allows efficient extraction of the hidden key in the Link-Newman table-network implementation of DES. Our result should contribute in completing the list of attacking methodologies and thus help the design of better tamper-resistant software.

From the Publisher: In October 2000, the US National Institute of Standards and Technology selected the block cipher Rijndael as the Advanced Encryption Standard (AES). AES is expected to gradually replace the present Data Encryption Standard (DES) as the most widely applied data encryption technology.|This book by the designers of the block cipher presents Rijndael from scratch. The underlying mathematics and the wide trail strategy as the basic design idea are explained in detail and the basics of differential and linear cryptanalysis are reworked. Subsequent chapters review all known attacks against the Rijndael structure and deal with implementation and optimization issues. Finally, other ciphers related to Rijndael are presented.|This volume is THE authoritative guide to the Rijndael algorithm and AES. Professionals, researchers, and students active or interested in data encryption will find it a valuable source of information and reference.