Chapter 9 - Basics of Cryptography

Chapter 8 - Basics of Cryptography and Encryption

<p>Cloud computing has spread widely among different organizations due to its advantages, such as cost reduction, resource pooling, broad network access, and ease of administration. It increases the abilities of physical resources by optimizing shared use. Clients’ valuable items (data and applications) are moved outside of regulatory supervision in a shared environment where many clients are grouped together. However, this process poses security concerns, such as sensitive information theft and personally identifiable data leakage. Many researchers have contributed to reducing the problem of data security in cloud computing by developing a variety of technologies to secure cloud data, including encryption. In this study, a set of encryption algorithms (advance encryption standard (AES), data encryption standard (DES), Blowfish, Rivest-Shamir-Adleman (RSA) encryption, and international data encryption algorithm (IDEA) was compared in terms of security, data encipherment capacity, memory usage, and encipherment time to determine the optimal algorithm for securing cloud information from hackers. Results show that RSA and IDEA are less secure than AES, Blowfish, and DES). The AES algorithm encrypts a huge amount of data, takes the least encipherment time, and is faster than other algorithms, and the Blowfish algorithm requires the least amount of memory space.</p>

International data encryption algorithm (IDEA) is a secret key or symmetric key block cipher. The purpose of IDEA was to replace data encryption standard (DES) cipher, which became practically insecure due to its small key size of 56 bits and increase in computational power of systems. IDEA cipher mainly to provide data confidentiality in variety of applications such as commercial and financial application e.g. pretty good privacy (PGP) protocol. Till 2015, no successful linear or algebraic weaknesses IDEA of have been reported. In this paper, author explained IDEA cipher, its application in PGP and did a systematic survey of various attacks attempted on IDEA cipher. The best cryptanalysis result which applied to all keys could break IDEA up to 6 rounds out of 8.5 rounds of the full IDEA cipher1. But the attack requires 264 known plaintexts and 2126.8 operations for reduced round version. This attack is practically not feasible due to above mention mammoth data and time requirements. So IDEA cipher is still completely secure for practical usage. PGP v2.0 uses IDEA cipher in place of BassOmatic which was found to be insecure for providing data confidentiality.

At present, there are several pieces of research on designing and implementing new cryptographic algorithms that are lightweight and resistant to several, if not major forms of security attacks. However, some algorithms such as the International Data Encryption Algorithm (IDEA), which has been around for some time is yet to record any real threat against its functionality. To ensure its continued usage, current implementations rely on multiphase encryption where it is combined with other algorithms such as ROTation (ROT) and Data Encryption Standard (DES) for maximum security strength. Multiphase encryption implies that there is a tendency for an increase in hardware area and a reduction in overall speed. In such cases, having fast and reduced area algorithms are much desired. This paper, therefore, proposes an efficient hardware implementation of the IDEA cipher that is based on arithmetic modulo multiplication—one of the main computations of the IDEA—on a novel Vedic multiplier architecture. The increase in efficiency of the IDEA crypto architecture and the reduction in resources utilization is achieved through an enhancement of its structural architecture to utilize a fixed set of resources for all eight identical rounds of computation and the use of a proposed fast and lightweight Vedic hardware multiplier. The proposed hardware modification and resulting architecture are designed using the Xilinx ISE and Vivado tools. The architecture is synthesized using Precision Synthesis Tool (PS) and simulated using Modelsim SE 10.6d and ISIM simulation tools. The proposed IDEA cipher is 100% more efficient when designed based on the Vedic multiplier compared to existing designs. The hardware architecture is implemented on Spartan-6-FGG484 Field Programmable Gate Array (FPGA) using Verilog HDL. Verified results show that the proposed Vedic-based IDEA occupied 212 Slices with the Vedic multiplier only occupying 28 Slices out of the total 212. The proposed architecture operates at a maximum frequency of 253.3 MHz.

A new LabVIEW simulation design was applied to provide a comparison study among several types of the most common symmetric and asymmetric encryption algorithms. Also, the comparison with advanced encryption package program was made. The results showed that the new LabVIEW simulation design had advantages in several points, where the evaluated time required for the encryption and decryption processes will be lesser than it values using advanced encryption package program.In this work, the symmetric encryption algorithms were used: AES (Advanced Encryption Standard), DES (Data Encryption Standard), 3DES (Triple Data Encryption Standard) and RC2 (Rivest Cipher) algorithms, while the asymmetric encryption algorithm used was the RSA (Rivest-Shamir-Aldeman) algorithm. The comparison had been achieved using different sizes of text files with different key sizes. The final results proved that the LabVIEW simulation design is better than the Advanced Encryption Package because it increased the algorithm’s performance by 65% in terms of speed and throughput, and for the algorithms’ comparison, the final results showed the effectiveness of AES algorithm over the other algorithms in terms of speed and throughput for the encryption and decryption processes.

The majority of imaging techniques use symmetric and asymmetric cryptography algorithms to encrypt digital media. Most of the research works contributed in the literature focus primarily on the Advanced Encryption Standard (AES) algorithm for encryption and decryption. This paper propose an analysis for performing image encryption and decryption by hybridization of Elliptic Curve Cryptography (ECC) with Hill Cipher (HC), ECC with Advanced Encryption Standard (AES) and ElGamal with Double Playfair Cipher (DPC). This analysis is based on the following parameters: (i) Encryption and decryption time, (ii) entropy of encrypted image, (iii) loss in intensity of the decrypted image, (iv) Peak Signal to Noise Ratio (PSNR), (v) Number of Pixels Change Rate (NPCR), and (vi) Unified Average Changing Intensity (UACI). The hybrid process involves the speed and ease of implementation from symmetric algorithms, as well as improved security from asymmetric algorithms. ECC and ElGamal cryptosystems provide asymmetric key cryptography, while HC, AES, and DPC are symmetric key algorithms. ECC with AES are perfect for remote or private communications with smaller image sizes based on the amount of time needed for encryption and decryption. The metric measurement with test cases finds that ECC and HC have a good overall solution for image encryption.

With today's development and expansion of networks and internet-connected devices, information security is an issue of increasing concern. Confidentiality is one of the focuses in network security for digital communication systems, where large data blocks go through a cryptographic algorithm with a cipher key that increases the security and complexity of the output ciphertext. For the past several years, multiple security algorithms have been developed and utilized in the data encryption process, such as the Data Encryption Standard (DES), Triple Data Encryption Standard (3DES), and the current one, designated by the U.S. National Institute of Standards and Technology (NIST), the Advanced Encryption Standard (AES). AES is a symmetric encryption algorithm that has a minimum input data block size of 128-bits which undergo a series of permutations, substitutions, and digital logic operations over several rounds. Encryption algorithms are always improving on ciphertext complexity, required hardware storage allocation, and execution time. Field Programmable Gate Arrays (FPGA's) are a hardware alternative for encryption algorithm implementation because, although the logic units in it are fixed, the functions and interconnections between them are based on the user's design which allow for improvement. The research presented focuses on the development and analysis of an efficient AES-128 Mix Columns algorithm implementation, utilized in the data block encryption rounds, on an Altera Cyclone IV FPGA using the Intel Quartus II software and Verilog Hardware Description Language.

File-sharing activities become a bridge for communication in the form of data between one party and another party. File sharing allows users to share data with other users, by uploading data to the server computer and other users can download data from the server computer. A document security system is indispensable to keep document data safe until its destination. File Web Sharing will transmit data with cryptographic methodologies. The algorithm used is Advanced Encryption Standard (AES), Data Encryption Standard (DES), and Blowfish. This study aims to compare the performance of AES, DES, and Blowfish algorithms when implemented to secure file sharing. Performance research results show that the DES algorithm is on average 8.35% faster than AES and the Blowfish algorithm is 7.11% faster than AES. Memory usage capacity testing shows that the AES algorithm requires 4.82% greater memory capacity than Blowfish, and the DES requires 2.41% greater memory capacity than the Blowfish algorithm. Kegiatan file sharing menjadi jembatan komunikasi data antara satu pihak dengan pihak lainnya. File sharing memberikan pengguna kemampuan untuk berbagi data dengan pengguna lain, dengan cara mengunggah data ke komputer server dan pengguna lain dapat mengunduh data dari komputer server. Sistem keamanan terhadap dokumen sangat diperlukan untuk menjaga data dokumen tetap aman sampai tujuannya. Web File Sharing akan mengirimkan data dengan metodologi kriptografi. Algoritma yang digunakan adalah Advanced Encryption Standard (AES), Data Encryption Standard (DES), dan Blowfish. Penelitian ini bertujuan untuk membandingkan kinerja algoritma AES, DES dan Blowfish saat diimplementasikan untuk mengamankan file sharing. Hasil pengujian kinerja menunjukkan bahwa algoritma DES rata-rata 8,35% lebih cepat dibandingkan AES sedangkan Blowfish 7,11% lebih cepat dibandingkan AES. Berdasarkan pengujian kapasitas penggunaan memori terlihat bahwa AES membutuhkan kapasitas memori 4,82% lebih besar dibandingkan Blowfish dan DES membutuhkan kapasitas memori 2,41% lebih besar dari Blowfish.

Cryptographic algorithms such as International Data Encryption Algorithm(IDEA) have found various applications in secure transmission of the data in networked instrumentation and distributed measurement systems. Modulo 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1 multiplier and squarer play a pivotal role in the implementation of such crypto-algorithms. In this work, an efficient hardware design of the IDEA (International Data Encryption Algorithm) using novel modulo 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1 multiplier and squarer as the basic modules is proposed for faster, smaller and low-power IDEA hardware circuits. Novel hardware implementation of the modulo 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</sup> +1 multiplier is shown by using the efficient compressors and sparse tree based inverted end around carry adders is given. The novel modules are applied on IDEA algorithm and the resulting implementation is compared both qualitatively and quantitatively with the IDEA implementation using the existing multiplier/squarer implementations. Experimental measurement results show that the proposed design is faster and smaller and also consume less power than similar hardware implementations making it a viable option for efficient hardware designs.

Data security is the focus of information security. As a primary method, file encryption is adopted for ensuring data security. Encryption algorithms created to meet the Data Encryption Standard (DES) and the Advanced Encryption Standard (AES) are widely used in a variety of systems. These algorithms are computationally highly complex, thus, the efficiency of encrypting or decrypting large files can be drastically reduced. To this end, we propose an optimized algorithm that efficiently encrypts and decrypts large files by parallelizing processing tasks on a single heterogeneous many-core processor in the Sunway TaihuLight computer system. Firstly, we convert the serial DES and AES programs to our experimental platform. Then we implement a task assignment strategy to test the converted algorithms. Finally, in order to optimize parallelized algorithms and improve data transmission performance, we apply the master-slave communication optimization, the three-stage parallel pipeline, and vectorization. Extensive experiments demonstrate that our optimized algorithm is faster than the state-of-the-art open-source implementations of DES and AES. Compared with the serial processing algorithms, our parallelized DES and AES perform nearly 40 times and 72 times faster, respectively. The work described in this paper leverages existing methods and provides a sound basis for the direction of future research in data encryption.

The Advanced Encryption Standard (AES), also known as a specification for the encryption of electronic data. AES is comparatively highly secure and more efficient than well-known other cryptographic algorithms and existing Data Encryption Standard (DES). This work is focused in analyzing selecting valuable research publications on AES. This also discusses some machine learning techniques such as artificial neural network (ANN) used to protect side channel attack for images. Besides this, many other recent developments such as effective differential power analysis (DPA) technique and hybrid encryption algorithm using LZW have been discussed and analyzed in details. Finally, the paper concludes with a systematic analysis of different types of attacks on AES and some future research aspects in this context. Finally, this work also proposes a new model for attack detection in AES.

The National Institute of Standards and Technology (NIST) of US announced Rijndael algorithm as the advanced encryption standard (AES) in October 2000, Despite AES surpassing in security the data encryption standard (DES), it is still rare to be implemented in smart cards, due to the reason of deficient AES coprocessors. Here a chip operation system (COS) called NexCard, which derived from Microsoft's Windows COS, is used as the AES implementation platform. After a suitable COS architecture design for AES and methodology of efficient memory usage, the simulation result shows that direct embedding AES encryption attains 0.56 ms at system clock 15 MHz on the INFINEON SLE66CX322P chip without existence of coprocessor. Corresponding to the development needs in smart card cryptographic algorithm implementations, and different level of the security design specifications, a concept to conjoin numbers of algorithms into single smart card called cipher system on demand (CSOD) method is accomplished in this study concurrently. This is a method utilizing the multiapplication capability of NexCard v2.0 to execute the same AES algorithm as an on-card applet. Although the performance of CSOD is not as good as AES embedded method, CSOD can provide the same result in the situation of adaptability and extendibility.

Security in the wireless networks is the main factor when they are deployed in a harsh environment, and this is the crucial factor in the case of sensor networks. Cryptography has a significant role to achieve this in wireless sensor networks. Though there exist several cryptographic algorithms, but none of them provide desired results for security. In this paper, a new cryptographic technique has been developed that uses both symmetric and asymmetric methods. In the proposed algorithm, advanced encryption standard (AES), data encryption standard (DES), and modified Rivest–Shamir–Adleman (m-RSA) are used in different phases of the algorithm because symmetric techniques provide a high level of security and asymmetric ones provide easier key management. In phase 1 of an algorithm, AES has been used; in phase 2, DES has been used; and in the last phase, m-RSA has been used, and all three phases are executed in parallel. The proposed algorithm is compared with existing techniques in terms of total execution time and decryption time, and it has been analyzed that the proposed algorithm provides a better result as compared to the existing algorithm.

The McEliece public-key cryptography (PKC) has fewer encryption/decryption operations compared to other PKC schemes such as RSA, ECC, and ElGamal. The use of Goppa codes in its implementation ensures the hardness of the decoding problem. Conversely, the original McEliece PKC has a low encryption rate and large key size. In this paper, a new variant of the McEliece cryptosystem is presented based on non-linear convolutional codes. Cascaded convolutional codes are used to be part of the public key with each stage of the cascade separated by a product cipher to increase the security level. Convolutional codes are used as an alternative to Goppa codes since the Viterbi decoding algorithm is suitable for high data-rate applications by providing maximum-likelihood solutions. The convolutional code used in the implementation increases both security and throughput due to its high error-correcting capacity. It is shown that the new variant has small key sizes with enhanced security-complexity trade-off. Cryptanalysis of the new version of the McEliece cryptosystem is performed using existing attacks of the classical cryptosystem to demonstrate the difficulties in breaking the new cryptosystem. Also, it is shown that security levels comparable to the original McEliece cryptosystem could be obtained by using smaller public key sizes of the new version if multiple stages of the generator matrix are employed. This aspect makes the new version of the McEliece cryptosystem attractive in mobile wireless networks since it could be ported onto a single Field Programmable Gate Array (FPGA).

From the Publisher: In October 2000, the US National Institute of Standards and Technology selected the block cipher Rijndael as the Advanced Encryption Standard (AES). AES is expected to gradually replace the present Data Encryption Standard (DES) as the most widely applied data encryption technology.|This book by the designers of the block cipher presents Rijndael from scratch. The underlying mathematics and the wide trail strategy as the basic design idea are explained in detail and the basics of differential and linear cryptanalysis are reworked. Subsequent chapters review all known attacks against the Rijndael structure and deal with implementation and optimization issues. Finally, other ciphers related to Rijndael are presented.|This volume is THE authoritative guide to the Rijndael algorithm and AES. Professionals, researchers, and students active or interested in data encryption will find it a valuable source of information and reference.